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Vladislav Khmelevsky 8459c14c68 [PR] Fix AARCH64 ADR* relocations 
Summary:
The ADRP instructions has 21 bits to store page offsets + 12 lowest bits
are zero, that give us a total of 33 bits (32 bits for address + 1 sign
bit, to address +- 4GB).

Vladislav Khmelevsky,
Advanced Software Technology Lab, Huawei

(cherry picked from FBD30283044)
2021-08-11 22:21:37 +03:00
bolt
[PR] Fix AARCH64 ADR* relocations
2021-08-11 22:21:37 +03:00
Description
llvm with tablegen backend for capstone disassembler
2.1 GiB
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