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9826fe5c9f
For example, an insert %0 = vector.insert %arg0, %arg1[3 : i32] : f32 into vector<4xf32> becomes %0 = llvm.mlir.constant(3 : i32) : !llvm.i32 %1 = llvm.insertelement %arg0, %arg1[%0 : !llvm.i32] : !llvm<"<4 x float>"> A more elaborate example, inserting an element in a higher dimension vector %0 = vector.insert %arg0, %arg1[3 : i32, 7 : i32, 15 : i32] : f32 into vector<4x8x16xf32> becomes %0 = llvm.extractvalue %arg1[3 : i32, 7 : i32] : !llvm<"[4 x [8 x <16 x float>]]"> %1 = llvm.mlir.constant(15 : i32) : !llvm.i32 %2 = llvm.insertelement %arg0, %0[%1 : !llvm.i32] : !llvm<"<16 x float>"> %3 = llvm.insertvalue %2, %arg1[3 : i32, 7 : i32] : !llvm<"[4 x [8 x <16 x float>]]"> PiperOrigin-RevId: 284882443
545 lines
23 KiB
C++
545 lines
23 KiB
C++
//===- VectorToLLVM.cpp - Conversion from Vector to the LLVM dialect ------===//
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//
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// Copyright 2019 The MLIR Authors.
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//
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// Licensed under the Apache License, Version 2.0 (the "License");
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// you may not use this file except in compliance with the License.
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// You may obtain a copy of the License at
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//
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// http://www.apache.org/licenses/LICENSE-2.0
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//
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// Unless required by applicable law or agreed to in writing, software
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// distributed under the License is distributed on an "AS IS" BASIS,
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// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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// See the License for the specific language governing permissions and
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// limitations under the License.
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// =============================================================================
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#include "mlir/Conversion/StandardToLLVM/ConvertStandardToLLVM.h"
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#include "mlir/Conversion/StandardToLLVM/ConvertStandardToLLVMPass.h"
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#include "mlir/Conversion/VectorToLLVM/ConvertVectorToLLVM.h"
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#include "mlir/Dialect/LLVMIR/LLVMDialect.h"
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#include "mlir/Dialect/VectorOps/VectorOps.h"
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#include "mlir/IR/Attributes.h"
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#include "mlir/IR/Builders.h"
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#include "mlir/IR/MLIRContext.h"
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#include "mlir/IR/Module.h"
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#include "mlir/IR/Operation.h"
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#include "mlir/IR/PatternMatch.h"
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#include "mlir/IR/StandardTypes.h"
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#include "mlir/IR/Types.h"
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#include "mlir/Pass/Pass.h"
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#include "mlir/Pass/PassManager.h"
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#include "mlir/Transforms/DialectConversion.h"
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#include "mlir/Transforms/Passes.h"
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#include "llvm/IR/DerivedTypes.h"
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#include "llvm/IR/Module.h"
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#include "llvm/IR/Type.h"
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#include "llvm/Support/Allocator.h"
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#include "llvm/Support/ErrorHandling.h"
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using namespace mlir;
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template <typename T>
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static LLVM::LLVMType getPtrToElementType(T containerType,
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LLVMTypeConverter &lowering) {
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return lowering.convertType(containerType.getElementType())
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.template cast<LLVM::LLVMType>()
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.getPointerTo();
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}
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// Helper to reduce vector type by one rank at front.
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static VectorType reducedVectorTypeFront(VectorType tp) {
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assert((tp.getRank() > 1) && "unlowerable vector type");
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return VectorType::get(tp.getShape().drop_front(), tp.getElementType());
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}
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// Helper to reduce vector type by *all* but one rank at back.
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static VectorType reducedVectorTypeBack(VectorType tp) {
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assert((tp.getRank() > 1) && "unlowerable vector type");
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return VectorType::get(tp.getShape().take_back(), tp.getElementType());
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}
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class VectorBroadcastOpConversion : public LLVMOpLowering {
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public:
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explicit VectorBroadcastOpConversion(MLIRContext *context,
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LLVMTypeConverter &typeConverter)
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: LLVMOpLowering(vector::BroadcastOp::getOperationName(), context,
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typeConverter) {}
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PatternMatchResult
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matchAndRewrite(Operation *op, ArrayRef<Value *> operands,
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ConversionPatternRewriter &rewriter) const override {
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auto broadcastOp = cast<vector::BroadcastOp>(op);
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VectorType dstVectorType = broadcastOp.getVectorType();
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if (lowering.convertType(dstVectorType) == nullptr)
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return matchFailure();
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// Rewrite when the full vector type can be lowered (which
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// implies all 'reduced' types can be lowered too).
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VectorType srcVectorType =
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broadcastOp.getSourceType().dyn_cast<VectorType>();
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rewriter.replaceOp(
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op, expandRanks(operands[0], // source value to be expanded
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op->getLoc(), // location of original broadcast
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srcVectorType, dstVectorType, rewriter));
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return matchSuccess();
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}
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private:
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// Expands the given source value over all the ranks, as defined
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// by the source and destination type (a null source type denotes
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// expansion from a scalar value into a vector).
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//
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// TODO(ajcbik): consider replacing this one-pattern lowering
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// with a two-pattern lowering using other vector
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// ops once all insert/extract/shuffle operations
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// are available with lowering implemention.
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//
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Value *expandRanks(Value *value, Location loc, VectorType srcVectorType,
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VectorType dstVectorType,
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ConversionPatternRewriter &rewriter) const {
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assert((dstVectorType != nullptr) && "invalid result type in broadcast");
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// Determine rank of source and destination.
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int64_t srcRank = srcVectorType ? srcVectorType.getRank() : 0;
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int64_t dstRank = dstVectorType.getRank();
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int64_t curDim = dstVectorType.getDimSize(0);
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if (srcRank < dstRank)
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// Duplicate this rank.
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return duplicateOneRank(value, loc, srcVectorType, dstVectorType, dstRank,
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curDim, rewriter);
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// If all trailing dimensions are the same, the broadcast consists of
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// simply passing through the source value and we are done. Otherwise,
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// any non-matching dimension forces a stretch along this rank.
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assert((srcVectorType != nullptr) && (srcRank > 0) &&
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(srcRank == dstRank) && "invalid rank in broadcast");
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for (int64_t r = 0; r < dstRank; r++) {
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if (srcVectorType.getDimSize(r) != dstVectorType.getDimSize(r)) {
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return stretchOneRank(value, loc, srcVectorType, dstVectorType, dstRank,
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curDim, rewriter);
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}
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}
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return value;
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}
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// Picks the best way to duplicate a single rank. For the 1-D case, a
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// single insert-elt/shuffle is the most efficient expansion. For higher
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// dimensions, however, we need dim x insert-values on a new broadcast
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// with one less leading dimension, which will be lowered "recursively"
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// to matching LLVM IR.
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// For example:
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// v = broadcast s : f32 to vector<4x2xf32>
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// becomes:
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// x = broadcast s : f32 to vector<2xf32>
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// v = [x,x,x,x]
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// becomes:
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// x = [s,s]
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// v = [x,x,x,x]
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Value *duplicateOneRank(Value *value, Location loc, VectorType srcVectorType,
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VectorType dstVectorType, int64_t rank, int64_t dim,
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ConversionPatternRewriter &rewriter) const {
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Type llvmType = lowering.convertType(dstVectorType);
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assert((llvmType != nullptr) && "unlowerable vector type");
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if (rank == 1) {
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Value *undef = rewriter.create<LLVM::UndefOp>(loc, llvmType);
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Value *expand = insertOne(undef, value, loc, llvmType, rank, 0, rewriter);
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SmallVector<int32_t, 4> zeroValues(dim, 0);
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return rewriter.create<LLVM::ShuffleVectorOp>(
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loc, expand, undef, rewriter.getI32ArrayAttr(zeroValues));
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}
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Value *expand =
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expandRanks(value, loc, srcVectorType,
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reducedVectorTypeFront(dstVectorType), rewriter);
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Value *result = rewriter.create<LLVM::UndefOp>(loc, llvmType);
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for (int64_t d = 0; d < dim; ++d) {
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result = insertOne(result, expand, loc, llvmType, rank, d, rewriter);
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}
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return result;
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}
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// Picks the best way to stretch a single rank. For the 1-D case, a
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// single insert-elt/shuffle is the most efficient expansion when at
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// a stretch. Otherwise, every dimension needs to be expanded
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// individually and individually inserted in the resulting vector.
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// For example:
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// v = broadcast w : vector<4x1x2xf32> to vector<4x2x2xf32>
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// becomes:
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// a = broadcast w[0] : vector<1x2xf32> to vector<2x2xf32>
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// b = broadcast w[1] : vector<1x2xf32> to vector<2x2xf32>
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// c = broadcast w[2] : vector<1x2xf32> to vector<2x2xf32>
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// d = broadcast w[3] : vector<1x2xf32> to vector<2x2xf32>
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// v = [a,b,c,d]
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// becomes:
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// x = broadcast w[0][0] : vector<2xf32> to vector <2x2xf32>
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// y = broadcast w[1][0] : vector<2xf32> to vector <2x2xf32>
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// a = [x, y]
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// etc.
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Value *stretchOneRank(Value *value, Location loc, VectorType srcVectorType,
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VectorType dstVectorType, int64_t rank, int64_t dim,
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ConversionPatternRewriter &rewriter) const {
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Type llvmType = lowering.convertType(dstVectorType);
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assert((llvmType != nullptr) && "unlowerable vector type");
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Value *result = rewriter.create<LLVM::UndefOp>(loc, llvmType);
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bool atStretch = dim != srcVectorType.getDimSize(0);
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if (rank == 1) {
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Type redLlvmType = lowering.convertType(dstVectorType.getElementType());
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if (atStretch) {
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Value *one = extractOne(value, loc, redLlvmType, rank, 0, rewriter);
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Value *expand =
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insertOne(result, one, loc, llvmType, rank, 0, rewriter);
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SmallVector<int32_t, 4> zeroValues(dim, 0);
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return rewriter.create<LLVM::ShuffleVectorOp>(
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loc, expand, result, rewriter.getI32ArrayAttr(zeroValues));
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}
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for (int64_t d = 0; d < dim; ++d) {
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Value *one = extractOne(value, loc, redLlvmType, rank, d, rewriter);
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result = insertOne(result, one, loc, llvmType, rank, d, rewriter);
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}
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} else {
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VectorType redSrcType = reducedVectorTypeFront(srcVectorType);
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VectorType redDstType = reducedVectorTypeFront(dstVectorType);
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Type redLlvmType = lowering.convertType(redSrcType);
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for (int64_t d = 0; d < dim; ++d) {
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int64_t pos = atStretch ? 0 : d;
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Value *one = extractOne(value, loc, redLlvmType, rank, pos, rewriter);
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Value *expand = expandRanks(one, loc, redSrcType, redDstType, rewriter);
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result = insertOne(result, expand, loc, llvmType, rank, d, rewriter);
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}
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}
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return result;
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}
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// Picks the proper sequence for inserting.
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Value *insertOne(Value *val1, Value *val2, Location loc, Type llvmType,
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int64_t rank, int64_t pos,
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ConversionPatternRewriter &rewriter) const {
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if (rank == 1) {
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auto idxType = rewriter.getIndexType();
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auto constant = rewriter.create<LLVM::ConstantOp>(
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loc, lowering.convertType(idxType),
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rewriter.getIntegerAttr(idxType, pos));
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return rewriter.create<LLVM::InsertElementOp>(loc, llvmType, val1, val2,
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constant);
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}
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return rewriter.create<LLVM::InsertValueOp>(loc, llvmType, val1, val2,
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rewriter.getI64ArrayAttr(pos));
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}
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// Picks the proper sequence for extracting.
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Value *extractOne(Value *value, Location loc, Type llvmType, int64_t rank,
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int64_t pos, ConversionPatternRewriter &rewriter) const {
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if (rank == 1) {
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auto idxType = rewriter.getIndexType();
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auto constant = rewriter.create<LLVM::ConstantOp>(
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loc, lowering.convertType(idxType),
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rewriter.getIntegerAttr(idxType, pos));
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return rewriter.create<LLVM::ExtractElementOp>(loc, llvmType, value,
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constant);
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}
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return rewriter.create<LLVM::ExtractValueOp>(loc, llvmType, value,
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rewriter.getI64ArrayAttr(pos));
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}
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};
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class VectorExtractOpConversion : public LLVMOpLowering {
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public:
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explicit VectorExtractOpConversion(MLIRContext *context,
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LLVMTypeConverter &typeConverter)
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: LLVMOpLowering(vector::ExtractOp::getOperationName(), context,
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typeConverter) {}
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PatternMatchResult
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matchAndRewrite(Operation *op, ArrayRef<Value *> operands,
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ConversionPatternRewriter &rewriter) const override {
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auto loc = op->getLoc();
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auto adaptor = vector::ExtractOpOperandAdaptor(operands);
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auto extractOp = cast<vector::ExtractOp>(op);
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auto vectorType = extractOp.getVectorType();
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auto resultType = extractOp.getResult()->getType();
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auto llvmResultType = lowering.convertType(resultType);
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auto positionArrayAttr = extractOp.position();
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// Bail if result type cannot be lowered.
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if (!llvmResultType)
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return matchFailure();
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// One-shot extraction of vector from array (only requires extractvalue).
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if (resultType.isa<VectorType>()) {
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Value *extracted = rewriter.create<LLVM::ExtractValueOp>(
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loc, llvmResultType, adaptor.vector(), positionArrayAttr);
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rewriter.replaceOp(op, extracted);
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return matchSuccess();
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}
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// Potential extraction of 1-D vector from array.
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auto *context = op->getContext();
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Value *extracted = adaptor.vector();
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auto positionAttrs = positionArrayAttr.getValue();
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if (positionAttrs.size() > 1) {
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auto oneDVectorType = reducedVectorTypeBack(vectorType);
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auto nMinusOnePositionAttrs =
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ArrayAttr::get(positionAttrs.drop_back(), context);
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extracted = rewriter.create<LLVM::ExtractValueOp>(
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loc, lowering.convertType(oneDVectorType), extracted,
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nMinusOnePositionAttrs);
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}
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// Remaining extraction of element from 1-D LLVM vector
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auto position = positionAttrs.back().cast<IntegerAttr>();
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auto i32Type = LLVM::LLVMType::getInt32Ty(lowering.getDialect());
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auto constant = rewriter.create<LLVM::ConstantOp>(loc, i32Type, position);
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extracted =
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rewriter.create<LLVM::ExtractElementOp>(loc, extracted, constant);
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rewriter.replaceOp(op, extracted);
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return matchSuccess();
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}
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};
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class VectorInsertOpConversion : public LLVMOpLowering {
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public:
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explicit VectorInsertOpConversion(MLIRContext *context,
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LLVMTypeConverter &typeConverter)
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: LLVMOpLowering(vector::InsertOp::getOperationName(), context,
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typeConverter) {}
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PatternMatchResult
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matchAndRewrite(Operation *op, ArrayRef<Value *> operands,
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ConversionPatternRewriter &rewriter) const override {
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auto loc = op->getLoc();
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auto adaptor = vector::InsertOpOperandAdaptor(operands);
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auto insertOp = cast<vector::InsertOp>(op);
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auto sourceType = insertOp.getSourceType();
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auto destVectorType = insertOp.getDestVectorType();
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auto llvmResultType = lowering.convertType(destVectorType);
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auto positionArrayAttr = insertOp.position();
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// Bail if result type cannot be lowered.
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if (!llvmResultType)
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return matchFailure();
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// One-shot insertion of a vector into an array (only requires insertvalue).
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if (sourceType.isa<VectorType>()) {
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Value *inserted = rewriter.create<LLVM::InsertValueOp>(
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loc, llvmResultType, adaptor.dest(), adaptor.source(),
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positionArrayAttr);
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rewriter.replaceOp(op, inserted);
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return matchSuccess();
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}
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// Potential extraction of 1-D vector from array.
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auto *context = op->getContext();
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Value *extracted = adaptor.dest();
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auto positionAttrs = positionArrayAttr.getValue();
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auto position = positionAttrs.back().cast<IntegerAttr>();
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auto oneDVectorType = destVectorType;
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if (positionAttrs.size() > 1) {
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oneDVectorType = reducedVectorTypeBack(destVectorType);
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auto nMinusOnePositionAttrs =
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ArrayAttr::get(positionAttrs.drop_back(), context);
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extracted = rewriter.create<LLVM::ExtractValueOp>(
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loc, lowering.convertType(oneDVectorType), extracted,
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nMinusOnePositionAttrs);
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}
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// Insertion of an element into a 1-D LLVM vector.
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auto i32Type = LLVM::LLVMType::getInt32Ty(lowering.getDialect());
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auto constant = rewriter.create<LLVM::ConstantOp>(loc, i32Type, position);
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Value *inserted = rewriter.create<LLVM::InsertElementOp>(
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loc, lowering.convertType(oneDVectorType), extracted, adaptor.source(),
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constant);
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// Potential insertion of resulting 1-D vector into array.
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if (positionAttrs.size() > 1) {
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auto nMinusOnePositionAttrs =
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ArrayAttr::get(positionAttrs.drop_back(), context);
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inserted = rewriter.create<LLVM::InsertValueOp>(loc, llvmResultType,
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adaptor.dest(), inserted,
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nMinusOnePositionAttrs);
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}
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rewriter.replaceOp(op, inserted);
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return matchSuccess();
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}
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};
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class VectorOuterProductOpConversion : public LLVMOpLowering {
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public:
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explicit VectorOuterProductOpConversion(MLIRContext *context,
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LLVMTypeConverter &typeConverter)
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: LLVMOpLowering(vector::OuterProductOp::getOperationName(), context,
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typeConverter) {}
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PatternMatchResult
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matchAndRewrite(Operation *op, ArrayRef<Value *> operands,
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ConversionPatternRewriter &rewriter) const override {
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auto loc = op->getLoc();
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auto adaptor = vector::OuterProductOpOperandAdaptor(operands);
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auto *ctx = op->getContext();
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auto vLHS = adaptor.lhs()->getType().cast<LLVM::LLVMType>();
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auto vRHS = adaptor.rhs()->getType().cast<LLVM::LLVMType>();
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auto rankLHS = vLHS.getUnderlyingType()->getVectorNumElements();
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auto rankRHS = vRHS.getUnderlyingType()->getVectorNumElements();
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auto llvmArrayOfVectType = lowering.convertType(
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cast<vector::OuterProductOp>(op).getResult()->getType());
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Value *desc = rewriter.create<LLVM::UndefOp>(loc, llvmArrayOfVectType);
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Value *a = adaptor.lhs(), *b = adaptor.rhs();
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Value *acc = adaptor.acc().empty() ? nullptr : adaptor.acc().front();
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SmallVector<Value *, 8> lhs, accs;
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lhs.reserve(rankLHS);
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accs.reserve(rankLHS);
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for (unsigned d = 0, e = rankLHS; d < e; ++d) {
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// shufflevector explicitly requires i32.
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auto attr = rewriter.getI32IntegerAttr(d);
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SmallVector<Attribute, 4> bcastAttr(rankRHS, attr);
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auto bcastArrayAttr = ArrayAttr::get(bcastAttr, ctx);
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Value *aD = nullptr, *accD = nullptr;
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// 1. Broadcast the element a[d] into vector aD.
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aD = rewriter.create<LLVM::ShuffleVectorOp>(loc, a, a, bcastArrayAttr);
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// 2. If acc is present, extract 1-d vector acc[d] into accD.
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if (acc)
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accD = rewriter.create<LLVM::ExtractValueOp>(
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loc, vRHS, acc, rewriter.getI64ArrayAttr(d));
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// 3. Compute aD outer b (plus accD, if relevant).
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Value *aOuterbD =
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accD ? rewriter.create<LLVM::FMulAddOp>(loc, vRHS, aD, b, accD)
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.getResult()
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: rewriter.create<LLVM::FMulOp>(loc, aD, b).getResult();
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// 4. Insert as value `d` in the descriptor.
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desc = rewriter.create<LLVM::InsertValueOp>(loc, llvmArrayOfVectType,
|
|
desc, aOuterbD,
|
|
rewriter.getI64ArrayAttr(d));
|
|
}
|
|
rewriter.replaceOp(op, desc);
|
|
return matchSuccess();
|
|
}
|
|
};
|
|
|
|
class VectorTypeCastOpConversion : public LLVMOpLowering {
|
|
public:
|
|
explicit VectorTypeCastOpConversion(MLIRContext *context,
|
|
LLVMTypeConverter &typeConverter)
|
|
: LLVMOpLowering(vector::TypeCastOp::getOperationName(), context,
|
|
typeConverter) {}
|
|
|
|
PatternMatchResult
|
|
matchAndRewrite(Operation *op, ArrayRef<Value *> operands,
|
|
ConversionPatternRewriter &rewriter) const override {
|
|
auto loc = op->getLoc();
|
|
vector::TypeCastOp castOp = cast<vector::TypeCastOp>(op);
|
|
MemRefType sourceMemRefType =
|
|
castOp.getOperand()->getType().cast<MemRefType>();
|
|
MemRefType targetMemRefType =
|
|
castOp.getResult()->getType().cast<MemRefType>();
|
|
|
|
// Only static shape casts supported atm.
|
|
if (!sourceMemRefType.hasStaticShape() ||
|
|
!targetMemRefType.hasStaticShape())
|
|
return matchFailure();
|
|
|
|
auto llvmSourceDescriptorTy =
|
|
operands[0]->getType().dyn_cast<LLVM::LLVMType>();
|
|
if (!llvmSourceDescriptorTy || !llvmSourceDescriptorTy.isStructTy())
|
|
return matchFailure();
|
|
MemRefDescriptor sourceMemRef(operands[0]);
|
|
|
|
auto llvmTargetDescriptorTy = lowering.convertType(targetMemRefType)
|
|
.dyn_cast_or_null<LLVM::LLVMType>();
|
|
if (!llvmTargetDescriptorTy || !llvmTargetDescriptorTy.isStructTy())
|
|
return matchFailure();
|
|
|
|
int64_t offset;
|
|
SmallVector<int64_t, 4> strides;
|
|
auto successStrides =
|
|
getStridesAndOffset(sourceMemRefType, strides, offset);
|
|
bool isContiguous = (strides.back() == 1);
|
|
if (isContiguous) {
|
|
auto sizes = sourceMemRefType.getShape();
|
|
for (int index = 0, e = strides.size() - 2; index < e; ++index) {
|
|
if (strides[index] != strides[index + 1] * sizes[index + 1]) {
|
|
isContiguous = false;
|
|
break;
|
|
}
|
|
}
|
|
}
|
|
// Only contiguous source tensors supported atm.
|
|
if (failed(successStrides) || !isContiguous)
|
|
return matchFailure();
|
|
|
|
auto int64Ty = LLVM::LLVMType::getInt64Ty(lowering.getDialect());
|
|
|
|
// Create descriptor.
|
|
auto desc = MemRefDescriptor::undef(rewriter, loc, llvmTargetDescriptorTy);
|
|
Type llvmTargetElementTy = desc.getElementType();
|
|
// Set allocated ptr.
|
|
Value *allocated = sourceMemRef.allocatedPtr(rewriter, loc);
|
|
allocated =
|
|
rewriter.create<LLVM::BitcastOp>(loc, llvmTargetElementTy, allocated);
|
|
desc.setAllocatedPtr(rewriter, loc, allocated);
|
|
// Set aligned ptr.
|
|
Value *ptr = sourceMemRef.alignedPtr(rewriter, loc);
|
|
ptr = rewriter.create<LLVM::BitcastOp>(loc, llvmTargetElementTy, ptr);
|
|
desc.setAlignedPtr(rewriter, loc, ptr);
|
|
// Fill offset 0.
|
|
auto attr = rewriter.getIntegerAttr(rewriter.getIndexType(), 0);
|
|
auto zero = rewriter.create<LLVM::ConstantOp>(loc, int64Ty, attr);
|
|
desc.setOffset(rewriter, loc, zero);
|
|
|
|
// Fill size and stride descriptors in memref.
|
|
for (auto indexedSize : llvm::enumerate(targetMemRefType.getShape())) {
|
|
int64_t index = indexedSize.index();
|
|
auto sizeAttr =
|
|
rewriter.getIntegerAttr(rewriter.getIndexType(), indexedSize.value());
|
|
auto size = rewriter.create<LLVM::ConstantOp>(loc, int64Ty, sizeAttr);
|
|
desc.setSize(rewriter, loc, index, size);
|
|
auto strideAttr =
|
|
rewriter.getIntegerAttr(rewriter.getIndexType(), strides[index]);
|
|
auto stride = rewriter.create<LLVM::ConstantOp>(loc, int64Ty, strideAttr);
|
|
desc.setStride(rewriter, loc, index, stride);
|
|
}
|
|
|
|
rewriter.replaceOp(op, {desc});
|
|
return matchSuccess();
|
|
}
|
|
};
|
|
|
|
/// Populate the given list with patterns that convert from Vector to LLVM.
|
|
void mlir::populateVectorToLLVMConversionPatterns(
|
|
LLVMTypeConverter &converter, OwningRewritePatternList &patterns) {
|
|
patterns.insert<VectorBroadcastOpConversion, VectorExtractOpConversion,
|
|
VectorInsertOpConversion, VectorOuterProductOpConversion,
|
|
VectorTypeCastOpConversion>(
|
|
converter.getDialect()->getContext(), converter);
|
|
}
|
|
|
|
namespace {
|
|
struct LowerVectorToLLVMPass : public ModulePass<LowerVectorToLLVMPass> {
|
|
void runOnModule() override;
|
|
};
|
|
} // namespace
|
|
|
|
void LowerVectorToLLVMPass::runOnModule() {
|
|
// Convert to the LLVM IR dialect using the converter defined above.
|
|
OwningRewritePatternList patterns;
|
|
LLVMTypeConverter converter(&getContext());
|
|
populateVectorToLLVMConversionPatterns(converter, patterns);
|
|
populateStdToLLVMConversionPatterns(converter, patterns);
|
|
|
|
ConversionTarget target(getContext());
|
|
target.addLegalDialect<LLVM::LLVMDialect>();
|
|
target.addDynamicallyLegalOp<FuncOp>(
|
|
[&](FuncOp op) { return converter.isSignatureLegal(op.getType()); });
|
|
if (failed(
|
|
applyPartialConversion(getModule(), target, patterns, &converter))) {
|
|
signalPassFailure();
|
|
}
|
|
}
|
|
|
|
OpPassBase<ModuleOp> *mlir::createLowerVectorToLLVMPass() {
|
|
return new LowerVectorToLLVMPass();
|
|
}
|
|
|
|
static PassRegistration<LowerVectorToLLVMPass>
|
|
pass("convert-vector-to-llvm",
|
|
"Lower the operations from the vector dialect into the LLVM dialect");
|