llvm-capstone/bolt/unittests/CMakeLists.txt
Vladislav Khmelevsky e900f0584e [BOLT] Fix AARCH64 registers aliasing
The aarch64 platform has special registers like X0_X1_X2_X3_X4_X5_X6_X7.
Using the downwards propagation this register will become a super
register for all X0..X7 and its super registers which is not right. This
patch replaces the downwards propagation with caching all the aliases using MCRegAliasIterator.

Vladislav Khmelevsky,
Advanced Software Technology Lab, Huawei

Reviewed By: maksfb

Differential Revision: https://reviews.llvm.org/D117394
2022-01-28 01:24:35 +03:00

9 lines
235 B
CMake

add_custom_target(BoltUnitTests)
set_target_properties(BoltUnitTests PROPERTIES FOLDER "BOLT tests")
function(add_bolt_unittest test_dirname)
add_unittest(BoltUnitTests ${test_dirname} ${ARGN})
endfunction()
add_subdirectory(Core)