llvm with tablegen backend for capstone disassembler
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Evan Cheng 99ee78ef63 Clean up my own mess.
X86 lowering normalize vector 0 to v4i32. However DAGCombine can fold (sub x, x) -> 0 after legalization. It can create a zero vector of a type that's not expected (e.g. v8i16). We don't want to disable the optimization since leaving a (sub x, x) is really bad. Add isel patterns for other types of vector 0 to ensure correctness. It's highly unlikely to happen other than in bugpoint reduced test cases.

llvm-svn: 48279
2008-03-12 07:02:50 +00:00
clang Since the rewriter now outputs C++, it no longer makes sense to pipe the output to clang. 2008-03-12 02:07:40 +00:00
llvm Clean up my own mess. 2008-03-12 07:02:50 +00:00