Magic-Mirror/llvm-capstone
1
0
Fork 0
mirror of https://github.com/capstone-engine/llvm-capstone.git synced 2025-01-14 03:45:33 +00:00
Code Issues Actions 4 Packages Projects Releases Wiki Activity
llvm-capstone/llvm/utils/TableGen
History
Daniel Grumberg c835b5cc1d [NFC][TableGen] Fix some clang-tidy warnings
2020-06-18 18:30:49 +01:00
..
GlobalISel
[TableGen] Avoid generating switch with just default
2020-06-02 19:48:07 +01:00
AsmMatcherEmitter.cpp
[MC] Move deprecation infos from MCTargetDesc to MCInstrInfo
2020-03-29 21:20:40 +02:00
AsmWriterEmitter.cpp
[TableGen] Fix non-standard escape warnings for braces in InstAlias
2020-05-28 09:36:24 +00:00
AsmWriterInst.cpp
[MCInstPrinter] Pass Address parameter to MCOI::OPERAND_PCREL typed operands. NFC
2020-03-26 08:21:15 -07:00
AsmWriterInst.h
[MCInstPrinter] Pass Address parameter to MCOI::OPERAND_PCREL typed operands. NFC
2020-03-26 08:21:15 -07:00
Attributes.cpp
Sort EnumAttr so it matches Attribute::operator<
2020-04-26 17:00:25 +02:00
CallingConvEmitter.cpp
[Alignment][NFC] Migrate HandleByVal to Align
2020-06-08 10:50:27 +00:00
CMakeLists.txt
…
CodeEmitterGen.cpp
…
CodeGenDAGPatterns.cpp
[Alignment][NFC] Transitionning more getMachineMemOperand call sites
2020-03-31 08:36:18 +00:00
CodeGenDAGPatterns.h
…
CodeGenHwModes.cpp
…
CodeGenHwModes.h
Explicitly include <cassert> when using assert
2020-03-02 22:45:28 +01:00
CodeGenInstruction.cpp
[TableGen] Handle (outs variable_ops)
2020-06-04 16:07:33 +03:00
CodeGenInstruction.h
Explicitly include <cassert> when using assert
2020-03-02 22:45:28 +01:00
CodeGenIntrinsics.h
Enable align <n> to be used in the intrinsic definition.
2020-05-27 16:38:18 -04:00
CodeGenMapTable.cpp
…
CodeGenRegisters.cpp
[TableGen][GlobalISel] Rework RegisterBankEmitter for easier const correctness.
2020-03-18 19:52:23 +00:00
CodeGenRegisters.h
[TableGen][GlobalISel] Rework RegisterBankEmitter for easier const correctness.
2020-03-18 19:52:23 +00:00
CodeGenSchedule.cpp
Suppress a few -Wunreachable-code warnings.
2020-03-25 13:55:42 -04:00
CodeGenSchedule.h
…
CodeGenTarget.cpp
Enable align <n> to be used in the intrinsic definition.
2020-05-27 16:38:18 -04:00
CodeGenTarget.h
…
CTagsEmitter.cpp
…
DAGISelEmitter.cpp
…
DAGISelMatcher.cpp
…
DAGISelMatcher.h
…
DAGISelMatcherEmitter.cpp
llvm-tblgen -gen-dag-isel: Hoist SmallVector TmpBuf
2020-04-25 20:41:04 -07:00
DAGISelMatcherGen.cpp
[TableGen] Fix register class handling in TableGen's DAG ISel Matcher Generator
2020-05-13 10:17:03 +01:00
DAGISelMatcherOpt.cpp
…
DFAEmitter.cpp
Fix DfaEmitter::visitDfaState() crash in MSVC x86 debug builds (PR44945)
2020-02-25 15:18:41 +01:00
DFAEmitter.h
DFAEmitter.h - remove unnecessary headers. NFC.
2020-05-08 14:53:10 +01:00
DFAPacketizerEmitter.cpp
Move DFA tables into the read-only data segmant.
2020-02-18 14:36:56 +01:00
DisassemblerEmitter.cpp
…
ExegesisEmitter.cpp
…
FastISelEmitter.cpp
…
FixedLenDecoderEmitter.cpp
[TableGen] Support combining AssemblerPredicates with ORs
2020-03-13 17:13:51 +00:00
GICombinerEmitter.cpp
[gicombiner] Allow disable-rule option to disable all-except-...
2020-06-16 16:57:16 -07:00
GlobalISelEmitter.cpp
TableGen/GlobalISel: Fix constraining REG_SEQUENCE operands
2020-04-14 22:05:22 -04:00
InfoByHwMode.cpp
…
InfoByHwMode.h
…
InstrDocsEmitter.cpp
…
InstrInfoEmitter.cpp
TableGen: Don't reconstruct CodeGenDAGTarget
2020-05-23 12:15:44 -04:00
IntrinsicEmitter.cpp
Enable align <n> to be used in the intrinsic definition.
2020-05-27 16:38:18 -04:00
LLVMBuild.txt
…
OptEmitter.cpp
…
OptEmitter.h
…
OptParserEmitter.cpp
[NFC][TableGen] Fix some clang-tidy warnings
2020-06-18 18:30:49 +01:00
OptRSTEmitter.cpp
Avoid including FileSystem.h from MemoryBuffer.h
2020-02-29 12:30:23 -08:00
PredicateExpander.cpp
…
PredicateExpander.h
…
PseudoLoweringEmitter.cpp
…
RegisterBankEmitter.cpp
Revert "[TableGen][GlobalISel] Account for HwMode in RegisterBank register sizes"
2020-03-20 11:02:50 +01:00
RegisterInfoEmitter.cpp
[TBLGEN] Emit register pressure set enum
2020-02-18 10:09:05 -08:00
RISCVCompressInstEmitter.cpp
[RISCV] Support negative constants in CompressInstEmitter
2020-03-26 15:23:38 +00:00
SDNodeProperties.cpp
…
SDNodeProperties.h
…
SearchableTableEmitter.cpp
[TableGen] Diagnose undefined fields when generating searchable tables
2020-02-19 14:03:48 +00:00
SequenceToOffsetTable.h
…
SubtargetEmitter.cpp
[MC] Widen the functional unit type from 32 to 64 bits.
2020-02-24 09:37:00 +01:00
SubtargetFeatureInfo.cpp
[TableGen] Support combining AssemblerPredicates with ORs
2020-03-13 17:13:51 +00:00
SubtargetFeatureInfo.h
…
TableGen.cpp
…
TableGenBackends.h
…
tdtags
…
Types.cpp
…
Types.h
…
WebAssemblyDisassemblerEmitter.cpp
…
WebAssemblyDisassemblerEmitter.h
…
X86DisassemblerShared.h
…
X86DisassemblerTables.cpp
[X86] Shrink lib/Target/X86/X86GenDisassemblerTables.inc
2020-04-25 19:44:32 -07:00
X86DisassemblerTables.h
…
X86EVEX2VEXTablesEmitter.cpp
…
X86FoldTablesEmitter.cpp
…
X86ModRMFilters.cpp
…
X86ModRMFilters.h
…
X86RecognizableInstr.cpp
[X86] Add a new format type for instructions that represent named prefix bytes like data16 and rep. Use it to make a simpler version of isPrefix.
2020-02-21 12:34:59 -08:00
X86RecognizableInstr.h
[X86] Add a new format type for instructions that represent named prefix bytes like data16 and rep. Use it to make a simpler version of isPrefix.
2020-02-21 12:34:59 -08:00