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ad96f25b93
rename it to __AMDGCN_WAVEFRONT_SIZE__ for consistency. __AMDGCN_WAVEFRONT_SIZE will be deprecated in the future. Reviewed by: Matt Arsenault, Johannes Doerfert Differential Revision: https://reviews.llvm.org/D154207
45 lines
1.7 KiB
Plaintext
45 lines
1.7 KiB
Plaintext
// RUN: %clang_cc1 -triple amdgcn-amd-amdhsa -target-cpu gfx906 -x hip -fcuda-is-device -emit-llvm %s \
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// RUN: -o - | FileCheck %s
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// CHECK: define dso_local amdgpu_kernel void @_Z13shufflekernelv()
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// CHECK-NEXT: entry:
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// CHECK-NEXT: [[TMP1:%.*]] = alloca i32, align 4, addrspace(5)
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// CHECK-NEXT: [[TMP2:%.*]] = alloca i32, align 4, addrspace(5)
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// CHECK-NEXT: [[TMP3:%.*]] = addrspacecast ptr addrspace(5) [[TMP1:%.*]] to ptr
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// CHECK-NEXT: [[TMP4:%.*]] = addrspacecast ptr addrspace(5) [[TMP2:%.*]] to ptr
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// CHECK-NEXT: [[TMP5:%.*]] = load i32, ptr [[TMP3:%.*]], align 4
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// CHECK-NEXT: [[TMP6:%.*]] = freeze i32 [[TMP5:%.*]]
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// CHECK-NEXT: %call = call noundef i32 @_Z11__shfl_synciii(i32 noundef [[TMP6:%.*]], i32 noundef 64, i32 noundef 0) #4
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// CHECK-NEXT: store i32 %call, ptr [[TMP4:%.*]], align 4
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// CHECK-NEXT: ret void
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// CHECK: define linkonce_odr noundef i32 @_Z11__shfl_synciii(i32 noundef [[TMP1:%.*]], i32 noundef [[TMP2:%.*]], i32 noundef [[TMP3:%.*]])
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#define __global__ __attribute__((global))
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#define __device__ __attribute__((device))
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#define __maybe_undef __attribute__((maybe_undef))
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#define WARP_SIZE 64
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static constexpr int warpSize = __AMDGCN_WAVEFRONT_SIZE__;
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__device__ static inline unsigned int __lane_id() {
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return __builtin_amdgcn_mbcnt_hi(
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-1, __builtin_amdgcn_mbcnt_lo(-1, 0));
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}
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__device__
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inline
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int __shfl_sync(int __maybe_undef var, int src_lane, int width = warpSize) {
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int self = __lane_id();
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int index = src_lane + (self & ~(width-1));
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return __builtin_amdgcn_ds_bpermute(index<<2, var);
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}
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__global__ void
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shufflekernel()
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{
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int t;
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int res;
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res = __shfl_sync(t, WARP_SIZE, 0);
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}
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