Cullen Rhodes 9816edc9f3 [mlir][vector] add result type to vector.extract assembly format (#66499) ... The vector.extract assembly format currently only contains the source type, for example: %1 = vector.extract %0[1] : vector<3x7x8xf32> it's not immediately obvious if this is the source or result type. This patch improves the assembly format to make this clearer, so the above becomes: %1 = vector.extract %0[1] : vector<7x8xf32> from vector<3x7x8xf32>		2023-09-28 11:11:16 +01:00
..
invalid.mlir	[MLIR][NVGPU] Adding nvgpu.warpgroup.mma Op for Hopper GPUs (#65440)	2023-09-22 11:46:29 +02:00
mma-sync-f32-to-tf32.mlir
mma-sync-f32-to-tf32x3.mlir
optimize-shared-memory.mlir	[mlir][nvgpu] Verify invalid copy size (nfc)	2023-07-17 17:09:33 +02:00
roundtrip.mlir
tmaload-transform.mlir	[MLIR][NVGPU] Introduce nvgpu.mbarrier.group for multiple mbarrier use (#65951)	2023-09-22 17:09:43 +02:00
transform-create-async-groups.mlir	[mlir][NVGPU] Support N-D masks in transform.nvgpu.create_async_groups	2023-08-08 14:30:03 +02:00
transform-matmul-to-nvvm.mlir	[mlir][vector] add result type to vector.extract assembly format (#66499)	2023-09-28 11:11:16 +01:00
transform-pipeline-shared.mlir	[mlir][nvgpu] add simple pipelining for shared memory copies	2023-07-17 14:29:12 +00:00