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f6e22f2f63
The uniformity analysis treated an undef argument to phi to be distinct from any other argument, equivalent to calling PHINode::hasConstantValue() instead of PHINode::hasConstantOrUndefValue(). Such a phi was reported as divergent. This is different from the older divergence analysis which treats such a phi as uniform. Fixed uniformity analysis to match the older behaviour. The original behaviour was added to DivergenceAnalysis in D19013. But it is not clear if relying on the undef value is safe. The defined values are not constant per se; they just happen to be uniform and the non-constant uniform value may not dominate the PHI. Reviewed By: ruiling Differential Revision: https://reviews.llvm.org/D144254
87 lines
2.6 KiB
C++
87 lines
2.6 KiB
C++
//===- MachineSSAContext.cpp ------------------------------------*- C++ -*-===//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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/// \file
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///
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/// This file defines a specialization of the GenericSSAContext<X>
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/// template class for Machine IR.
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///
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//===----------------------------------------------------------------------===//
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#include "llvm/CodeGen/MachineSSAContext.h"
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#include "llvm/CodeGen/MachineBasicBlock.h"
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#include "llvm/CodeGen/MachineFunction.h"
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#include "llvm/CodeGen/MachineInstr.h"
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#include "llvm/CodeGen/MachineRegisterInfo.h"
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#include "llvm/Support/raw_ostream.h"
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using namespace llvm;
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const Register MachineSSAContext::ValueRefNull{};
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void MachineSSAContext::setFunction(MachineFunction &Fn) {
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MF = &Fn;
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RegInfo = &MF->getRegInfo();
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}
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MachineBasicBlock *MachineSSAContext::getEntryBlock(MachineFunction &F) {
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return &F.front();
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}
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void MachineSSAContext::appendBlockTerms(
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SmallVectorImpl<const MachineInstr *> &terms,
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const MachineBasicBlock &block) {
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for (auto &T : block.terminators())
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terms.push_back(&T);
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}
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void MachineSSAContext::appendBlockDefs(SmallVectorImpl<Register> &defs,
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const MachineBasicBlock &block) {
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for (const MachineInstr &instr : block.instrs()) {
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for (const MachineOperand &op : instr.operands()) {
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if (op.isReg() && op.isDef())
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defs.push_back(op.getReg());
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}
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}
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}
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/// Get the defining block of a value.
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MachineBasicBlock *MachineSSAContext::getDefBlock(Register value) const {
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if (!value)
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return nullptr;
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return RegInfo->getVRegDef(value)->getParent();
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}
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bool MachineSSAContext::isConstantOrUndefValuePhi(const MachineInstr &Phi) {
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return Phi.isConstantValuePHI();
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}
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Printable MachineSSAContext::print(const MachineBasicBlock *Block) const {
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if (!Block)
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return Printable([](raw_ostream &Out) { Out << "<nullptr>"; });
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return Printable([Block](raw_ostream &Out) { Block->printName(Out); });
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}
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Printable MachineSSAContext::print(const MachineInstr *I) const {
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return Printable([I](raw_ostream &Out) { I->print(Out); });
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}
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Printable MachineSSAContext::print(Register Value) const {
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auto *MRI = RegInfo;
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return Printable([MRI, Value](raw_ostream &Out) {
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Out << printReg(Value, MRI->getTargetRegisterInfo(), 0, MRI);
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if (Value) {
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// Try to print the definition.
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if (auto *Instr = MRI->getUniqueVRegDef(Value)) {
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Out << ": ";
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Instr->print(Out);
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}
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}
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});
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}
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