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Zachary Turner d16944eefe [CodeView] RelocPtr points to little endian data. 
Don't use a uint32_t*, use a ulittle32_t* to make this correct
on big endian systems.

Patch by James Clarke
Differential Revision: https://reviews.llvm.org/D54421

llvm-svn: 347349
2018-11-20 21:30:11 +00:00
clang
[clang][Parse] Diagnose useless null statements / empty init-statements
2018-11-20 18:59:05 +00:00
clang-tools-extra
[clang-tidy] Don't generate incorrect fixes for class constructed from list-initialized arguments
2018-11-20 15:45:15 +00:00
compiler-rt
[cmake] Fix detecting terminfo library
2018-11-20 18:41:11 +00:00
debuginfo-tests
Set config.lit_tools_dir, which is needed by lit.llvm.initialize.
2018-11-06 21:54:27 +00:00
libclc
r600: Add datalayout to image builtin implementation
2018-11-10 21:43:40 +00:00
libcxx
[libcxx] Fix threads detection on GNU/Hurd
2018-11-20 21:14:05 +00:00
libcxxabi
[CMake] Passthrough CFLAGS when checking the compiler-rt path
2018-11-14 00:09:26 +00:00
libunwind
[CMake] Passthrough CFLAGS when checking the compiler-rt path
2018-11-14 00:09:26 +00:00
lld
[CodeView] RelocPtr points to little endian data.
2018-11-20 21:30:11 +00:00
lldb
[lit] Build and link TestIRMemoryMapWindows explicitly
2018-11-20 16:44:06 +00:00
llgo
Update copyright year to 2018.
2018-06-18 12:22:17 +00:00
llvm
[CodeView] RelocPtr points to little endian data.
2018-11-20 21:30:11 +00:00
openmp
[OPENMP][NVPTX]Improved lock/critical constructs.
2018-11-20 20:19:36 +00:00
parallel-libs
Update copyright year to 2018.
2018-06-18 12:22:17 +00:00
polly
[CMake] Fix generation of exported targets in build directory
2018-11-06 15:18:17 +00:00
README.md
Update the project name in README.md
2018-10-19 00:03:01 +00:00

README.md

The LLVM Compiler Infrastructure

This directory and its subdirectories contain source code for LLVM, a toolkit for the construction of highly optimized compilers, optimizers, and runtime environments.

Description
llvm with tablegen backend for capstone disassembler
Readme 2.1 GiB
Languages
LLVM 34.8%
C++ 32.8%
C 19.6%
Assembly 8.6%
MLIR 1.2%
Other 2.6%