Oliver Stannard e4c3d21ea6 [AArch64] Add ARMv8.2-A FP16 vector instructions ...

ARMv8.2-A adds 16-bit floating point versions of all existing SIMD
floating-point instructions. This is an optional extension, so all of
these instructions require the FeatureFullFP16 subtarget feature.

Note that VFP without SIMD is not a valid combination for any version of
ARMv8-A, but I have ensured that these instructions all depend on both
FeatureNEON and FeatureFullFP16 for consistency.

The ".2h" vector type specifier is now legal (for the scalar pairwise
reduction instructions), so some unrelated tests have been modified as
different error messages are emitted. This is not a problem as the
invalid operands are still caught.

llvm-svn: 255010

2015-12-08 12:16:10 +00:00

clang

[OPENMP 4.5] Parsing/sema for 'num_tasks' clause.

2015-12-08 12:06:20 +00:00

clang-tools-extra

Added coverage check for extensionless headers, and exclude hidden dot directoryies.

2015-12-04 22:42:18 +00:00

compiler-rt

[TSan] Enforce TSan runtime doesn't include system headers with --sysroot flag.

2015-12-07 23:21:36 +00:00

debuginfo-tests

…

libclc

…

libcxx

Cleaned up the intro for the TS status page; really need much more info here

2015-12-08 00:08:23 +00:00

libcxxabi

.gitignore: ignore vim swap files

2015-12-04 02:15:02 +00:00

libunwind

…

lld

[ELF] - fixed mistype in comment, NFC.

2015-12-07 16:54:56 +00:00

lldb

Fixup dotest.py after the configuration package introduction

2015-12-08 12:09:56 +00:00

llgo

[llgo] Force exporting __morestack from llgoi

2015-11-27 04:46:46 +00:00

llvm

[AArch64] Add ARMv8.2-A FP16 vector instructions

2015-12-08 12:16:10 +00:00

openmp

Replace DYNA_* names with KMP_* names

2015-12-03 19:37:20 +00:00

polly

ScopInfo: Add MemoryAccess::isScalar()

2015-12-07 18:06:08 +00:00

Description

llvm with tablegen backend for capstone disassembler

2.1 GiB

Languages

LLVM 34.8%

C++ 32.8%

C 19.6%

Assembly 8.6%

MLIR 1.2%

Other 2.6%