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bc37be1855
This is stricter than the default "ieee", and should probably be the default. This patch leaves the default alone. I can change this in a future patch. There are non-reversible transforms I would like to perform which are legal under IEEE denormal handling, but illegal with flushing zero behavior. Namely, conversions between llvm.is.fpclass and fcmp with zeroes. Under "ieee" handling, it is legal to translate between llvm.is.fpclass(x, fcZero) and fcmp x, 0. Under "preserve-sign" handling, it is legal to translate between llvm.is.fpclass(x, fcSubnormal|fcZero) and fcmp x, 0. I would like to compile and distribute some math library functions in a mode where it's callable from code with and without denormals enabled, which requires not changing the compares with denormals or zeroes. If an IEEE function transforms an llvm.is.fpclass call into an fcmp 0, it is no longer possible to call the function from code with denormals enabled, or write an optimization to move the function into a denormal flushing mode. For the original function, if x was a denormal, the class would evaluate to false. If the function compiled with denormal handling was converted to or called from a preserve-sign function, the fcmp now evaluates to true. This could also be of use for strictfp handling, where code may be changing the denormal mode. Alternative name could be "unknown". Replaces the old AMDGPU custom inlining logic with more conservative logic which tries to permit inlining for callees with dynamic handling and avoids inlining other mismatched modes. |
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.. | ||
GlobalISel | ||
jupyter | ||
AsmMatcherEmitter.cpp | ||
AsmWriterEmitter.cpp | ||
AsmWriterInst.cpp | ||
AsmWriterInst.h | ||
Attributes.cpp | ||
CallingConvEmitter.cpp | ||
CMakeLists.txt | ||
CodeEmitterGen.cpp | ||
CodeGenDAGPatterns.cpp | ||
CodeGenDAGPatterns.h | ||
CodeGenHwModes.cpp | ||
CodeGenHwModes.h | ||
CodeGenInstAlias.cpp | ||
CodeGenInstAlias.h | ||
CodeGenInstruction.cpp | ||
CodeGenInstruction.h | ||
CodeGenIntrinsics.cpp | ||
CodeGenIntrinsics.h | ||
CodeGenMapTable.cpp | ||
CodeGenRegisters.cpp | ||
CodeGenRegisters.h | ||
CodeGenSchedule.cpp | ||
CodeGenSchedule.h | ||
CodeGenTarget.cpp | ||
CodeGenTarget.h | ||
CompressInstEmitter.cpp | ||
CTagsEmitter.cpp | ||
DAGISelEmitter.cpp | ||
DAGISelMatcher.cpp | ||
DAGISelMatcher.h | ||
DAGISelMatcherEmitter.cpp | ||
DAGISelMatcherGen.cpp | ||
DAGISelMatcherOpt.cpp | ||
DecoderEmitter.cpp | ||
DFAEmitter.cpp | ||
DFAEmitter.h | ||
DFAPacketizerEmitter.cpp | ||
DirectiveEmitter.cpp | ||
DisassemblerEmitter.cpp | ||
DXILEmitter.cpp | ||
ExegesisEmitter.cpp | ||
FastISelEmitter.cpp | ||
GICombinerEmitter.cpp | ||
GlobalISelEmitter.cpp | ||
InfoByHwMode.cpp | ||
InfoByHwMode.h | ||
InstrDocsEmitter.cpp | ||
InstrInfoEmitter.cpp | ||
IntrinsicEmitter.cpp | ||
OptEmitter.cpp | ||
OptEmitter.h | ||
OptParserEmitter.cpp | ||
OptRSTEmitter.cpp | ||
PredicateExpander.cpp | ||
PredicateExpander.h | ||
PseudoLoweringEmitter.cpp | ||
RegisterBankEmitter.cpp | ||
RegisterInfoEmitter.cpp | ||
RISCVTargetDefEmitter.cpp | ||
SDNodeProperties.cpp | ||
SDNodeProperties.h | ||
SearchableTableEmitter.cpp | ||
SequenceToOffsetTable.h | ||
SubtargetEmitter.cpp | ||
SubtargetFeatureInfo.cpp | ||
SubtargetFeatureInfo.h | ||
TableGen.cpp | ||
TableGenBackends.h | ||
tdtags | ||
Types.cpp | ||
Types.h | ||
VarLenCodeEmitterGen.cpp | ||
VarLenCodeEmitterGen.h | ||
VTEmitter.cpp | ||
WebAssemblyDisassemblerEmitter.cpp | ||
WebAssemblyDisassemblerEmitter.h | ||
X86DisassemblerShared.h | ||
X86DisassemblerTables.cpp | ||
X86DisassemblerTables.h | ||
X86EVEX2VEXTablesEmitter.cpp | ||
X86FoldTablesEmitter.cpp | ||
X86ManualFoldTables.def | ||
X86MnemonicTables.cpp | ||
X86ModRMFilters.cpp | ||
X86ModRMFilters.h | ||
X86RecognizableInstr.cpp | ||
X86RecognizableInstr.h |