llvm-capstone/polly/test/Simplify/gemm___%bb3---%bb28.jscop
2017-07-11 10:30:45 +00:00

111 lines
3.4 KiB
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{
"arrays" : [
{
"name" : "MemRef_C",
"sizes" : [ "*", "1024" ],
"type" : "float"
},
{
"name" : "MemRef_A",
"sizes" : [ "*", "1024" ],
"type" : "float"
},
{
"name" : "MemRef_B",
"sizes" : [ "*", "1024" ],
"type" : "float"
}
],
"context" : "{ : }",
"name" : "%bb3---%bb28",
"statements" : [
{
"accesses" : [
{
"kind" : "read",
"relation" : "{ Stmt_bb8[i0, i1] -> MemRef_C[i0, i1] }"
},
{
"kind" : "write",
"relation" : "{ Stmt_bb8[i0, i1] -> MemRef_tmp_0__phi[] }"
}
],
"domain" : "{ Stmt_bb8[i0, i1] : 0 <= i0 <= 1023 and 0 <= i1 <= 1023 }",
"name" : "Stmt_bb8",
"schedule" : "{ Stmt_bb8[i0, i1] -> [i0, i1, 0, 0, 0] }"
},
{
"accesses" : [
{
"kind" : "read",
"relation" : "{ Stmt_bb10[i0, i1, i2] -> MemRef_tmp_0__phi[] }"
},
{
"kind" : "write",
"relation" : "{ Stmt_bb10[i0, i1, i2] -> MemRef_tmp_0[] }"
},
{
"kind" : "write",
"relation" : "{ Stmt_bb10[i0, i1, i2] -> MemRef_tmp_0_lcssa__phi[] }"
}
],
"domain" : "{ Stmt_bb10[i0, i1, i2] : 0 <= i0 <= 1023 and 0 <= i1 <= 1023 and 0 <= i2 <= 1024 }",
"name" : "Stmt_bb10",
"schedule" : "{ Stmt_bb10[i0, i1, i2] -> [i0, i1, 1, i2, 0] }"
},
{
"accesses" : [
{
"kind" : "write",
"relation" : "{ Stmt_bb13[i0, i1, i2] -> MemRef_tmp_0__phi[] }"
},
{
"kind" : "read",
"relation" : "{ Stmt_bb13[i0, i1, i2] -> MemRef_A[i0, i2] }"
},
{
"kind" : "read",
"relation" : "{ Stmt_bb13[i0, i1, i2] -> MemRef_B[i2, i1] }"
},
{
"kind" : "read",
"relation" : "{ Stmt_bb13[i0, i1, i2] -> MemRef_tmp_0[] }"
}
],
"domain" : "{ Stmt_bb13[i0, i1, i2] : 0 <= i0 <= 1023 and 0 <= i1 <= 1023 and 0 <= i2 <= 1023 }",
"name" : "Stmt_bb13",
"schedule" : "{ Stmt_bb13[i0, i1, i2] -> [i0, i1, 1, i2, 1] }"
},
{
"accesses" : [
{
"kind" : "read",
"relation" : "{ Stmt_bb11[i0, i1] -> MemRef_tmp_0_lcssa__phi[] }"
},
{
"kind" : "write",
"relation" : "{ Stmt_bb11[i0, i1] -> MemRef_tmp_0_lcssa[] }"
}
],
"domain" : "{ Stmt_bb11[i0, i1] : 0 <= i0 <= 1023 and 0 <= i1 <= 1023 }",
"name" : "Stmt_bb11",
"schedule" : "{ Stmt_bb11[i0, i1] -> [i0, i1, 2, 0, 0] }"
},
{
"accesses" : [
{
"kind" : "write",
"relation" : "{ Stmt_bb21[i0, i1] -> MemRef_C[i0, i1] }"
},
{
"kind" : "read",
"relation" : "{ Stmt_bb21[i0, i1] -> MemRef_tmp_0_lcssa[] }"
}
],
"domain" : "{ Stmt_bb21[i0, i1] : 0 <= i0 <= 1023 and 0 <= i1 <= 1023 }",
"name" : "Stmt_bb21",
"schedule" : "{ Stmt_bb21[i0, i1] -> [i0, i1, 3, 0, 0] }"
}
]
}