llvm-capstone/mlir/test
Matthias Springer fb7ec1f187 [mlir] Use VectorTransferPermutationMapLoweringPatterns in VectorToSCF
VectorTransferPermutationMapLoweringPatterns can be enabled via a pass option. These additional patterns lower permutation maps to minor identity maps with broadcasting, if possible, allowing for more efficient vector load/stores. The option is deactivated by default.

Differential Revision: https://reviews.llvm.org/D102593
2021-05-19 14:46:19 +09:00
..
Analysis
CAPI Add mlirModuleFromOperation to C API 2021-05-17 10:14:16 +00:00
Conversion [mlir][tosa] Fix tosa.avg_pool2d lowering to normalize correctly 2021-05-17 10:00:43 -07:00
Dialect [mlir] Use VectorTransferPermutationMapLoweringPatterns in VectorToSCF 2021-05-19 14:46:19 +09:00
EDSC [mlir] Use ReassociationIndices instead of affine maps in linalg.reshape. 2021-05-05 12:59:57 +02:00
Examples
Integration [mlir] Use VectorTransferPermutationMapLoweringPatterns in VectorToSCF 2021-05-19 14:46:19 +09:00
Interfaces/DataLayoutInterfaces Add default DataLayout support for complex numbers 2021-04-19 11:36:12 +02:00
IR Revert "[IR] Add a Location to BlockArgument." and follow-on commit 2021-05-18 19:26:00 -07:00
lib Enhance InferShapedTypeOpInterface to make it accessible during dialect conversion 2021-05-19 02:51:14 +00:00
mlir-cpu-runner [mlir] Add polynomial approximation for math::ExpM1 2021-05-05 14:31:34 -07:00
mlir-linalg-ods-gen
mlir-lsp-server [mlir-lsp-server] Add support for recording text document versions 2021-05-18 12:57:52 -07:00
mlir-opt [mlir][sparse] fixed typo: sparse -> sparse_tensor 2021-05-03 14:19:09 -07:00
mlir-reduce Use PassPipelineCLParser in mlir-reduce 2021-04-14 14:35:55 -07:00
mlir-spirv-cpu-runner
mlir-tblgen Revert "[IR] Add a Location to BlockArgument." and follow-on commit 2021-05-18 19:26:00 -07:00
mlir-translate
mlir-vulkan-runner
Pass [MLIR] Factor pass timing out into a dedicated timing manager 2021-05-12 18:14:51 +02:00
python [mlir] Add python test for shape dialect 2021-05-13 09:13:47 -07:00
Rewrite
SDBM
Target [mlir][openacc] Translate ExitDataop to LLVM IR 2021-05-17 11:11:59 -04:00
Transforms Revert "[IR] Add a Location to BlockArgument." and follow-on commit 2021-05-18 19:26:00 -07:00
Unit
APITest.h
CMakeLists.txt [mlir][CAPI] Add CAPI bindings for the sparse_tensor dialect. 2021-05-10 16:54:56 +00:00
lit.cfg.py [mlir][mlir-lsp] Add a new C++ LSP server for MLIR named mlir-lsp-server 2021-04-21 14:44:37 -07:00
lit.site.cfg.py.in [mlir] Rename AVX512 dialect to X86Vector 2021-04-12 19:20:04 +02:00