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ARM64 - Add signed extension
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@ -333,6 +333,47 @@ static void opex(RStrBuf *buf, csh handle, cs_insn *insn) {
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r_strbuf_append (buf, "}");
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}
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static int arm64_reg_width(int reg) {
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switch (reg) {
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case ARM64_REG_W0:
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case ARM64_REG_W1:
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case ARM64_REG_W2:
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case ARM64_REG_W3:
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case ARM64_REG_W4:
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case ARM64_REG_W5:
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case ARM64_REG_W6:
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case ARM64_REG_W7:
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case ARM64_REG_W8:
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case ARM64_REG_W9:
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case ARM64_REG_W10:
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case ARM64_REG_W11:
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case ARM64_REG_W12:
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case ARM64_REG_W13:
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case ARM64_REG_W14:
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case ARM64_REG_W15:
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case ARM64_REG_W16:
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case ARM64_REG_W17:
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case ARM64_REG_W18:
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case ARM64_REG_W19:
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case ARM64_REG_W20:
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case ARM64_REG_W21:
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case ARM64_REG_W22:
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case ARM64_REG_W23:
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case ARM64_REG_W24:
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case ARM64_REG_W25:
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case ARM64_REG_W26:
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case ARM64_REG_W27:
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case ARM64_REG_W28:
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case ARM64_REG_W29:
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case ARM64_REG_W30:
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return 32;
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break;
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default:
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break;
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}
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return 64;
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}
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static const char *cc_name64(arm64_cc cc) {
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switch (cc) {
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case ARM64_CC_EQ: // Equal
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@ -1036,6 +1077,39 @@ static int analop64_esil(RAnal *a, RAnalOp *op, ut64 addr, const ut8 *buf, int l
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// XXX: wrongly implemented
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r_strbuf_setf (&op->esil, "%d,%s,=", IMM64 (1), REG64 (0));
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break;
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/* ASR, SXTB, SXTH and SXTW are alias for SBFM */
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case ARM64_INS_ASR:
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op->cycles = 1;
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op->type = R_ANAL_OP_TYPE_SHR;
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OPCALL(">>>>");
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break;
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case ARM64_INS_SXTB:
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if (arm64_reg_width(insn->id) == 32) {
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r_strbuf_setf (&op->esil, "%s,%s,=,8,%s,>>,%s,%s,=,%s,%s,&=,$c,?{,0xffffff00,%s,|=}",
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REG64(1), REG64(0), REG64(1), REG64(1), REG64(0),
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"0xff", REG64(0), REG64(0));
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} else {
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r_strbuf_setf (&op->esil, "%s,%s,=,8,%s,>>,%s,%s,=,%s,%s,&=,$c,?{,0xffffffffffffff00,%s,|=}",
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REG64(1), REG64(0), REG64(1), REG64(1), REG64(0),
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"0xff", REG64(0), REG64(0));
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}
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break;
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case ARM64_INS_SXTH: /* halfword */
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if (arm64_reg_width(insn->id) == 32) {
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r_strbuf_setf (&op->esil, "%s,%s,=,16,%s,>>,%s,%s,=,%s,%s,&=,$c,?{,0xffff0000,%s,|=}",
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REG64(1), REG64(0), REG64(1), REG64(1), REG64(0),
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"0xffff", REG64(0), REG64(0));
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} else {
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r_strbuf_setf (&op->esil, "%s,%s,=,16,%s,>>,%s,%s,=,%s,%s,&=,$c,?{,0xffffffffffffff00,%s,|=}",
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REG64(1), REG64(0), REG64(1), REG64(1), REG64(0),
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"0xffff", REG64(0), REG64(0));
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}
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break;
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case ARM64_INS_SXTW: /* word */
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r_strbuf_setf (&op->esil, "%s,%s,=,32,%s,>>,%s,%s,=,%s,%s,&=,$c,?{,0xffffffffffffff00,%s,|=}",
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REG64(1), REG64(0), REG64(1), REG64(1), REG64(0),
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"0xffffffff", REG64(0), REG64(0));
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break;
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case ARM64_INS_RET:
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r_strbuf_setf (&op->esil, "lr,pc,=");
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break;
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