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Add MIPS opcodes description

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jvoisin 2014-06-19 12:42:44 +02:00
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add=adds two registers, trap on overflow
addu=adds two registers
sub=subtracts two registers, trap on overflow
subu=subtracts two registers
addi=add sign-extended constants (or copy one register to another: addi $1, $2, 0), trap on overflow
addiu=add sign-extended constants (or copy one register to another: addi $1, $2, 0)
mult=int HI, int LO = (64-bit) $s * $t, trap on overflow
multu=int HI, int LO = (64-bit) $s * $t
div=divides two registers and puts the 32-bit integer result in LO and the remainder in HI.
divu=divides two registers and puts the 32-bit integer result in LO and the remainder in HI.
lw=lw $t,C($s), loads the word stored from: MEM[$s+C] and the following 3 bytes.
lh=lh $t,C($s), loads the halfword stored from: MEM[$s+C] and the following byte, sign is extended to width of register.
lhu=lhu $t,C($s), loads the halfword stored from: MEM[$s+C] and the following byte.
lb=lb $t,C($s), loads the byte stored from: MEM[$s+C], sign is extended to width of register
lb=lb $t,C($s), loads the byte stored from: MEM[$s+C].
sw=sw $t,C($s), stores a word into: MEM[$s+C] and the following 3 bytes.
sh=sh $t,C($s), stores the least-significant 16-bit of a register (a halfword) into: MEM[$s+C].
sb=sb $t,C($s), stores the least-significant 8-bit of a register (a byte) into: MEM[$s+C].
lui=loads a 16-bit immediate operand into the upper 16-bits of the register specified.
mfhi=moves a value from HI to a register
mflo=moves a value from LO to a register
mfcZ=moves a 4 byte value from Coprocessor Z Control register to a general purpose register. Sign extension.
mtcZ=moves a 4 byte value from a general purpose register to a Coprocessor Z Control register. Sign extension.
and=bitwise and
andi=bitwise and, leftmost 16 bits are padded with 0s
or=bitwise or
ori=bitwise or, leftmost 16 bits are padded with 0s
xor=bitwise xor
nor=bitwise nor
slt=tests if one register is less than another.
slti=tests if one register is less than a constant.
sll=sll $d,$t,shamt, shifts shamt number of bits to the left (multiply but 2^n)
srl=srl $d,$t,shamt, shifts shamt number of bits to the right - zeros are shifted in.
sra=sda $d,$t,shamt, shifts shamt number of bits - the sign bit is shifted in
sllv=sllv $d,$t,$s, shifts $s number of bits to the left
srlv=srlv $d,$t,$s, shifts $s number of bits to the right - zeros are shifted in
srav=srav $d,$t,$s, shifts $s number of bits - the sign bit is shifted in
beq=beq $s,$t,C, goes to the instruction at the specified address if two registers are equal.
bneq=goes to the instruction at the specified address if two registers are not equal.
j=unconditionally jumps to the instruction at the specified address
jr=jumps to the address contained in the specified register
jal=used to call a subroutine, $31 holds the return address; returning from a subroutine is done by: jr $31. Return address is PC + 8, not PC + 4 due to the use of a branch delay slot which forces the instruction after the jump to be executed