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https://github.com/radareorg/radare2.git
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Add missing files and remaining patches from import
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pancake
pancake
parent
7919b99305
commit
0dbc4ee537
2
.github/workflows/ci.yml
vendored
2
.github/workflows/ci.yml
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@ -138,6 +138,8 @@ jobs:
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path: binr/blob/radare2.xz
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- name: Static static r2 with meson
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run: |
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sudo apt-get --assume-yes install python3-wheel python3-setuptools
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sudo pip3 install meson==0.55.3 ninja==1.10.0
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CFLAGS="-static" LDFLAGS="-static" meson --prefix=${HOME}/.local --buildtype release --default-library static build
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ninja -C build && ninja -C build install
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- name: Pub
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4
dist/plugins-cfg/plugins.static.cfg
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4
dist/plugins-cfg/plugins.static.cfg
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@ -4,7 +4,6 @@ STATIC="anal.8051
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anal.arc
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anal.arm_cs
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anal.arm_gnu
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anal.avr
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anal.i4004
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anal.bf
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anal.chip8
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@ -40,7 +39,6 @@ asm.8051
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asm.arc
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asm.arm_cs
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asm.arm_gnu
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asm.avr
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asm.bf
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asm.chip8
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asm.cris_gnu
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@ -116,7 +114,6 @@ bin.pe64
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bin.pebble
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bin.smd
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bin.sms
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bin.avr
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bin.sfc
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bin.te
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bin.vsf
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@ -216,7 +213,6 @@ lang.vala
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parse.6502_pseudo
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parse.arm_pseudo
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parse.att2intel
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parse.avr_pseudo
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parse.chip8_pseudo
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parse.dalvik_pseudo
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parse.m68k_pseudo
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4
dist/plugins-cfg/plugins.static.nogpl.cfg
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4
dist/plugins-cfg/plugins.static.nogpl.cfg
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@ -4,7 +4,6 @@ STATIC="anal.8051
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anal.arc
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anal.arm_cs
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anal.arm_gnu
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anal.avr
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anal.i4004
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anal.bf
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anal.chip8
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@ -37,7 +36,6 @@ asm.8051
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asm.arc
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asm.arm_cs
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asm.arm_gnu
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asm.avr
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asm.bf
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asm.chip8
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asm.cris_gnu
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@ -109,7 +107,6 @@ bin.pe64
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bin.pebble
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bin.smd
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bin.sms
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bin.avr
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bin.sfc
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bin.te
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bin.vsf
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@ -197,7 +194,6 @@ parse.dalvik_pseudo
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parse.m68k_pseudo
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parse.mips_pseudo
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parse.sh_pseudo
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parse.avr_pseudo
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parse.wasm_pseudo
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parse.x86_pseudo
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parse.z80_pseudo"
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@ -1597,10 +1597,10 @@ OPCODE_DESC opcodes[] = {
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INST_LAST
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};
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static void set_invalid_op(RAnalysisOp *op, ut64 addr) {
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static void set_invalid_op(RAnalOp *op, ut64 addr) {
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// Unknown or invalid instruction.
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op->family = R_ANALYSIS_OP_FAMILY_UNKNOWN;
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op->type = R_ANALYSIS_OP_TYPE_UNK;
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op->family = R_ANAL_OP_FAMILY_UNKNOWN;
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op->type = R_ANAL_OP_TYPE_UNK;
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op->addr = addr;
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op->nopcode = 1;
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op->cycles = 1;
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34
libr/asm/arch/avr/avr_instructionset.h
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34
libr/asm/arch/avr/avr_instructionset.h
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@ -0,0 +1,34 @@
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#ifndef AVR_DISASSEMBLER_INSTRUCTIONSET_H
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#define AVR_DISASSEMBLER_INSTRUCTIONSET_H
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#include <stdint.h>
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/* Total number of assembly instructions, Maximum number of operands */
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#define AVR_TOTAL_INSTRUCTIONS 145
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#define AVR_MAX_NUM_OPERANDS 2
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/* Enumeration for all types of AVR Operands */
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enum AVR_Operand_Types {
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OPERAND_NONE, OPERAND_REGISTER_GHOST,
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OPERAND_REGISTER, OPERAND_REGISTER_STARTR16,
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OPERAND_REGISTER_EVEN_PAIR, OPERAND_REGISTER_EVEN_PAIR_STARTR24,
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OPERAND_BRANCH_ADDRESS, OPERAND_RELATIVE_ADDRESS, OPERAND_LONG_ABSOLUTE_ADDRESS,
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OPERAND_IO_REGISTER, OPERAND_DATA, OPERAND_DES_ROUND, OPERAND_COMPLEMENTED_DATA, OPERAND_BIT, OPERAND_WORD_DATA,
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OPERAND_X, OPERAND_XP, OPERAND_MX,
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OPERAND_Y, OPERAND_YP, OPERAND_MY, OPERAND_YPQ,
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OPERAND_Z, OPERAND_ZP, OPERAND_MZ, OPERAND_ZPQ,
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};
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/* Structure for each instruction in the instruction set */
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struct _instructionInfo {
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char mnemonic[7];
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/* Bitwise AND mask for just the instruction bits */
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uint16_t opcodeMask;
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int numOperands;
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/* Bitwise AND mask for each operand in the opcode */
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uint16_t operandMasks[AVR_MAX_NUM_OPERANDS];
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int operandTypes[AVR_MAX_NUM_OPERANDS];
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};
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typedef struct _instructionInfo instructionInfo;
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#endif /* AVR_DISASSEMBLER_INSTRUCTIONSET_H */
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6
libr/asm/arch/avr/disasm.h
Normal file
6
libr/asm/arch/avr/disasm.h
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@ -0,0 +1,6 @@
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#ifndef AVR_DISASSEMBLER_H
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#define AVR_DISASSEMBLER_H
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int avr_decode (char *out, ut64 addr, cut8 *buf, int len);
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#endif /* AVR_DISASSEMBLER_H */
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@ -165,7 +165,7 @@ static int string_scan_range(RList *list, RBinFile *bf, int min,
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if (is_wide32) {
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str_type = R_STRING_TYPE_WIDE32;
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} else {
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bool is_wide = needle + rc + 2 < to && !w[0] && w[1] && !w[2];
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bool is_wide = needle + rc + 4 < to && !w[0] && w[1] && !w[2] && w[3] && !w[4];
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str_type = is_wide? R_STRING_TYPE_WIDE: R_STRING_TYPE_ASCII;
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}
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} else {
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@ -617,10 +617,10 @@ EXPECT=<<EOF
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0x00000000 2 r1_r0
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0x00000000 2 r17_r16
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0x00000000 2 r19_r18
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0x00000000 2 r21_rz0
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0x00000000 2 r23_rz2
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0x00000000 2 r25_rz4
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0x00000000 2 r27_rz6
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0x00000000 2 r21_r20
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0x00000000 2 r23_r22
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0x00000000 2 r25_r24
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0x00000000 2 r27_r26
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0x00000000 2 r31_r30
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0x00000000 2 x
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0x00000000 2 z
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@ -837,7 +837,7 @@ EXPECT=<<EOF
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0x000035d4 8 fcn.000035d4
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0x000035dc 30 fcn.000035dc
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0x000035fa 1 syscall.0.0
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0x00008000 2 r29_rz8
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0x00008000 2 r29_r28
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0x00008000 2 y
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0x00008000 2 sp
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EOF
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