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tms320: add XACS/XACD fields parsing for the x55x
It was surprising for me that these fields are not parsed properly. Found that by crafting test cases in radare2-regressions. Also, opcode table for the c55x was slighly incorrect. Hope, next patch will fix that confusion.
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@ -210,6 +210,14 @@ int run_f_list(tms320_dasm_t * dasm)
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temp = get_bits(dasm->opcode64, flag->f, 4);
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set_field_value(dasm, FDDD, temp);
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break;
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case TMS320_FLAG_XACS:
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temp = get_bits(dasm->opcode64, flag->f, 4);
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set_field_value(dasm, XACS, temp);
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break;
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case TMS320_FLAG_XACD:
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temp = get_bits(dasm->opcode64, flag->f, 4);
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set_field_value(dasm, XACD, temp);
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break;
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case TMS320_FLAG_SS:
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temp = get_bits(dasm->opcode64, flag->f, 2);
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@ -786,6 +794,13 @@ void decode_registers(tms320_dasm_t * dasm)
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substitute(dasm->syntax, "TAx", "%s", get_freg_str(field_value(dasm, FDDD), NULL));
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}
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if (field_valid(dasm, XACS))
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substitute(dasm->syntax, "XACsrc", "%s", get_xreg_str(field_value(dasm, XACS), NULL));
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if (field_valid(dasm, XACD))
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substitute(dasm->syntax, "XACdst", "%s", get_xreg_str(field_value(dasm, XACD), NULL));
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// source and destination accumulator registers
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code |= field_valid(dasm, SS) ? 0x01 : 0x00;
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@ -180,6 +180,8 @@ typedef struct {
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def_field (FDDD, 4);
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def_field (XSSS, 4);
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def_field (XDDD, 4);
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def_field (XACS, 4);
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def_field (XACD, 4);
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def_field (CCCCCCC, 7);
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def_field (AAAAAAAI, 8);
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