tms320: add XACS/XACD fields parsing for the x55x

It was surprising for me that these fields are not parsed properly. Found that
by crafting test cases in radare2-regressions.

Also, opcode table for the c55x was slighly incorrect. Hope, next patch will fix
that confusion.
This commit is contained in:
Ilya V. Matveychikov 2014-05-07 22:33:22 +04:00 committed by pancake
parent f225edde45
commit 12fd2dffbd
2 changed files with 17 additions and 0 deletions

View File

@ -210,6 +210,14 @@ int run_f_list(tms320_dasm_t * dasm)
temp = get_bits(dasm->opcode64, flag->f, 4);
set_field_value(dasm, FDDD, temp);
break;
case TMS320_FLAG_XACS:
temp = get_bits(dasm->opcode64, flag->f, 4);
set_field_value(dasm, XACS, temp);
break;
case TMS320_FLAG_XACD:
temp = get_bits(dasm->opcode64, flag->f, 4);
set_field_value(dasm, XACD, temp);
break;
case TMS320_FLAG_SS:
temp = get_bits(dasm->opcode64, flag->f, 2);
@ -786,6 +794,13 @@ void decode_registers(tms320_dasm_t * dasm)
substitute(dasm->syntax, "TAx", "%s", get_freg_str(field_value(dasm, FDDD), NULL));
}
if (field_valid(dasm, XACS))
substitute(dasm->syntax, "XACsrc", "%s", get_xreg_str(field_value(dasm, XACS), NULL));
if (field_valid(dasm, XACD))
substitute(dasm->syntax, "XACdst", "%s", get_xreg_str(field_value(dasm, XACD), NULL));
// source and destination accumulator registers
code |= field_valid(dasm, SS) ? 0x01 : 0x00;

View File

@ -180,6 +180,8 @@ typedef struct {
def_field (FDDD, 4);
def_field (XSSS, 4);
def_field (XDDD, 4);
def_field (XACS, 4);
def_field (XACD, 4);
def_field (CCCCCCC, 7);
def_field (AAAAAAAI, 8);