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https://github.com/radareorg/radare2.git
synced 2025-03-04 04:17:25 +00:00
More cleanup for XNU debug
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c7a444cb39
commit
434e9a0986
@ -64,6 +64,22 @@ return strdup (
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"drx dr1 .64 8 0\n"
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"drx dr2 .64 16 0\n"
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"drx dr3 .64 24 0\n"
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"drx dr6 .64 32 0\n"
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"drx dr7 .64 40 0\n"
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"drx dr4 .64 32 0\n"
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"drx dr5 .64 40 0\n"
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"drx dr6 .64 48 0\n"
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"drx dr7 .64 56 0\n"
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);
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/*_STRUCT_X86_DEBUG_STATE64
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{
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__uint64_t dr0;
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__uint64_t dr1;
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__uint64_t dr2;
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__uint64_t dr3;
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__uint64_t dr4;
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__uint64_t dr5;
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__uint64_t dr6;
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__uint64_t dr7;
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};
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*/
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@ -46,6 +46,8 @@ return strdup (
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"drx dr1 .32 4 0\n"
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"drx dr2 .32 8 0\n"
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"drx dr3 .32 12 0\n"
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"drx dr4 .32 16 0\n"
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"drx dr5 .32 20 0\n"
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"drx dr6 .32 24 0\n"
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"drx dr7 .32 28 0\n"
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"seg cs .32 44 0\n"
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@ -54,3 +56,18 @@ return strdup (
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"seg fs .32 56 0\n"
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"seg gs .32 60 0\n"
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);
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/*
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_STRUCT_X86_DEBUG_STATE32
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{
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unsigned int __dr0;
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unsigned int __dr1;
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unsigned int __dr2;
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unsigned int __dr3;
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unsigned int __dr4;
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unsigned int __dr5;
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unsigned int __dr6;
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unsigned int __dr7;
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};
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#else
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*/
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@ -167,9 +167,9 @@ static task_t task_for_pid_workaround(int Pid) {
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bool xnu_step(RDebug *dbg) {
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int ret = false;
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task_t task;
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#if __arm__ || __arm64__ || __aarch64__
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// op-not-permitted ret = ptrace (PT_STEP, dbg->pid, (caddr_t)1, 0); //SIGINT
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task_t task;
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ios_hwstep_enable (dbg, true);
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task = pid_to_task (dbg->pid);
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if (task<1) {
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@ -205,7 +205,11 @@ bool xnu_step(RDebug *dbg) {
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}
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int xnu_attach(RDebug *dbg, int pid) {
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//this should be necessary
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#if XNU_USE_PTRACE
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//XXX it seems that PT_ATTACH will be deprecated
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//but using PT_ATTACHEXC throw errors
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if (pid != dbg->pid && ptrace (PT_ATTACH, pid, 0, 0) == -1) {
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perror ("ptrace (PT_ATTACH)");
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return -1;
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@ -18,22 +18,21 @@ static bool modify_trace_bit(RDebug *dbg, xnu_thread *th, int enable) {
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unsigned int state_count = R_REG_STATE_SZ;
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kern_return_t kr;
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ret = xnu_thread_get_gpr (dbg, th);
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if (ret == R_FALSE) {
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if (!ret) {
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eprintf ("error to get gpr registers in trace bit intel\n");
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return false;
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}
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state = (R_REG_T)th->gpr;
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if (th->flavor == x86_THREAD_STATE32) {
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state = (R_REG_T *)&th->gpr;
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if (state->tsh.flavor == x86_THREAD_STATE32) {
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state->uts.ts32.__eflags = (state->uts.ts32.__eflags & \
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~0x100UL) | (enable ? 0x100UL : 0);
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} else if (th->flavor == x86_THREAD_STATE64) {
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} else if (state->tsh.flavor == x86_THREAD_STATE64) {
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state->uts.ts64.__rflags = (state->uts.ts64.__rflags & \
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~0x100UL) | (enable ? 0x100UL : 0);
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} else {
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eprintf ("Invalid bit size\n");
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return false;
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}
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memcpy (th->state, state->uts, th->count);
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if (!xnu_thread_set_gpr (dbg, th)) {
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eprintf ("error xnu_thread_set_gpr in modify_trace_bit intel\n");
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return false;
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@ -42,7 +41,7 @@ static bool modify_trace_bit(RDebug *dbg, xnu_thread *th, int enable) {
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}
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#elif __POWERPC__ //ppc processor
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//XXX poor support at this stage i don't care so much. Once intel and arm done it could be done
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//TODO add better support for ppc
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static bool modify_trace_bit(RDebug *dbg, xnu_thread *th, int enable) {
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R_REG_T state;
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@ -12,22 +12,22 @@ static void xnu_thread_free(xnu_thread_t *thread) {
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static int xnu_thread_set_drx(RDebug *dbg, xnu_thread_t *thread) {
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R_DEBUG_REG_T *regs;
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if (!thread) {
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thread->count = 0;
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return false;
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}
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kern_return_t rc;
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if (!dbg || !thread) return false;
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regs = (R_DEBUG_REG_T*)&thread->drx;
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if (!regs) return false;
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#if __i386__ || __x86_64__
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thread->flavor = x86_DEBUG_STATE;
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thread->count = x86_DEBUG_STATE_COUNT;
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if (dbg->bits == R_SYS_BITS_64) {
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thread->flavor = regs->dsh.flavor = x86_DEBUG_STATE64;
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thread->count = R_DEBUG_STATE_SZ; //R_MIN (thread->count, sizeof(regs->uds.ds64));
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regs->dsh.flavor = x86_DEBUG_STATE64;
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regs->dsh.count = x86_DEBUG_STATE64_COUNT;
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} else {
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thread->flavor = regs->dsh.flavor = x86_DEBUG_STATE32;
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thread->count = R_DEBUG_STATE_SZ; //R_MIN (thread->count, sizeof(regs->uds.ds32));
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regs->dsh.flavor = x86_DEBUG_STATE32;
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regs->dsh.count = x86_DEBUG_STATE32_COUNT;
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}
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memcpy (®s->uds, thread->state, thread->count);
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#elif __arm || __arm64 || __aarch64
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/* not supported */
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//no supported yet but for no so long
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return false;
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#elif __POWERPC__
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/* not supported */
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@ -40,8 +40,8 @@ static int xnu_thread_set_drx(RDebug *dbg, xnu_thread_t *thread) {
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regs->dsh.flavor = 0;
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thread->count = 0;
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#endif
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kern_return_t rc = thread_set_state (thread->tid, thread->flavor,
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(thread_state_t)thread->state, thread->count);
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rc = thread_set_state (thread->tid, thread->flavor,
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(thread_state_t)regs, thread->count);
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if (rc != KERN_SUCCESS) {
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perror ("thread_set_state");
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thread->count = false;
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@ -123,26 +123,26 @@ static bool xnu_thread_get_gpr(RDebug *dbg, xnu_thread_t *thread) {
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return true;
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}
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//XXX this should work as long as in arm trace bit relies on this
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static bool xnu_thread_get_drx(RDebug *dbg, xnu_thread_t *thread) {
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kern_return_t rc;
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R_DEBUG_REG_T *regs;
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if (!thread) {
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thread->count = 0;
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return false;
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}
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thread->state = regs = (R_DEBUG_REG_T*)&thread->drx;
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thread->state_size = sizeof (thread->drx);
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if (!dbg || !thread) return false;
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regs = (R_DEBUG_REG_T*)&thread->drx;
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#if __x86_64__ || __i386__
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thread->flavor = regs->dsh.flavor = x86_DEBUG_STATE;
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thread->count = regs->dsh.count = R_DEBUG_STATE_SZ;
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thread->flavor = x86_DEBUG_STATE;
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thread->count = x86_DEBUG_STATE_COUNT;
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thread->state_size = (dbg->bits == R_SYS_BITS_64) ?
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sizeof (x86_debug_state64_t) :
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sizeof (x86_debug_state32_t);
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// XXX thread->state = regs->uds;
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#elif __arm || __arm64 || __aarch64
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/* not supported yet */
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thread->flavor = -1;
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thread->count = 0;
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return true;
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//no supported yet but not for so long
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return false;
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#endif
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kern_return_t rc = thread_get_state (thread->tid, thread->flavor,
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thread->state, &thread->count);
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rc = thread_get_state (thread->tid, thread->flavor,
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(thread_state_t)regs, &thread->count);
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if (rc != KERN_SUCCESS) {
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thread->count = 0;
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perror ("xnu_thread_get_drx");
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