mirror of
https://github.com/radareorg/radare2.git
synced 2024-10-07 02:23:58 +00:00
Improve reg profile parsing and error handling ##anal
This commit is contained in:
pancake
pancake
parent
f9d6f394ae
commit
47358feb6d
@ -4658,8 +4658,11 @@ void cmd_anal_reg(RCore *core, const char *str) {
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r_core_cmd_help (core, help_msg);
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} break;
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default:
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r_cons_printf ("%d\n", r_list_length (
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core->dbg->reg->regset[0].pool));
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{
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void *p = core->dbg->reg->regset[0].pool;
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int len = p? r_list_length (p): 0;
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r_cons_printf ("%d\n", len);
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}
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break;
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}
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break;
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@ -600,6 +600,9 @@ static int showreg(RCore *core, const char *str) {
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if (role != -1) {
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rname = r_reg_get_name (core->dbg->reg, role);
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}
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if (!rname) {
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return 0;
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}
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r = r_reg_get (core->dbg->reg, rname , -1);
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if (r) {
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ut64 off;
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@ -2014,6 +2017,10 @@ static void show_drpi(RCore *core) {
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const char *nmi = r_reg_get_type (i);
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r_cons_printf ("regset %d (%s)\n", i, nmi);
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RRegSet *rs = &core->anal->reg->regset[i];
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if (!rs || !rs->arena) {
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r_cons_printf ("* arena %s no\n", r_reg_get_type (i));
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continue;
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}
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r_cons_printf ("* arena %s size %d\n", r_reg_get_type (i), rs->arena->size);
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r_list_foreach (rs->regs, iter, ri) {
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const char *tpe = r_reg_get_type (ri->type);
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@ -2099,7 +2106,9 @@ static void cmd_reg_profile(RCore *core, char from, const char *str) { // "arp"
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RRegSet *rs = r_reg_regset_get (core->dbg->reg, R_REG_TYPE_GPR);
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if (rs) {
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r_cons_printf ("%d\n", rs->arena->size);
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} else eprintf ("Cannot find GPR register arena.\n");
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} else {
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eprintf ("Cannot find GPR register arena.\n");
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}
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}
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break;
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case 'j': // "drpj" "arpj"
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@ -142,6 +142,7 @@ typedef struct r_reg_flags_t {
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R_API void r_reg_free(RReg *reg);
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R_API void r_reg_free_internal(RReg *reg, bool init);
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R_API RReg *r_reg_new(void);
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R_API RReg *r_reg_init(RReg *reg);
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R_API bool r_reg_set_name(RReg *reg, int role, const char *name);
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R_API bool r_reg_set_profile_string(RReg *reg, const char *profile);
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R_API char* r_reg_profile_to_cc(RReg *reg);
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@ -136,6 +136,8 @@ R_API bool r_reg_set_profile_string(RReg *reg, const char *str) {
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// Same profile, no need to change
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if (reg->reg_profile_str && !strcmp (reg->reg_profile_str, str)) {
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// r_reg_free_internal (reg, false);
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// r_reg_init (reg);
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return true;
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}
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@ -150,6 +152,7 @@ R_API bool r_reg_set_profile_string(RReg *reg, const char *str) {
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// Line number
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l = 0;
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bool have_a0 = false;
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// For every line
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do {
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// Increment line number
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@ -206,6 +209,9 @@ R_API bool r_reg_set_profile_string(RReg *reg, const char *str) {
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const char *r = (*first == '=')
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? parse_alias (reg, tok, j)
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: parse_def (reg, tok, j);
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if (!strncmp (first, "=A0", 3)) {
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have_a0 = true;
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}
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// Clean up
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for (i = 0; i < j; i++) {
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free (tok[i]);
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@ -217,10 +223,16 @@ R_API bool r_reg_set_profile_string(RReg *reg, const char *str) {
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//eprintf ("(%s)\n", str);
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// Clean up
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r_reg_free_internal (reg, false);
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r_reg_init (reg);
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return false;
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}
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}
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} while (*p++);
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if (!have_a0) {
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eprintf ("Warning: =A0 not defined\n");
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//r_reg_free_internal (reg, false);
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///return false;
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}
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reg->size = 0;
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for (i = 0; i < R_REG_TYPE_LAST; i++) {
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RRegSet *rs = ®->regset[i];
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@ -244,12 +256,11 @@ R_API bool r_reg_set_profile_string(RReg *reg, const char *str) {
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R_API bool r_reg_set_profile(RReg *reg, const char *profile) {
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r_return_val_if_fail (reg && profile, NULL);
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char *base, *file;
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char *str = r_file_slurp (profile, NULL);
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if (!str) {
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base = r_sys_getenv (R_LIB_ENV);
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char *base = r_sys_getenv (R_LIB_ENV);
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if (base) {
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file = r_str_append (base, profile);
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char *file = r_str_append (base, profile);
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str = r_file_slurp (file, NULL);
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free (file);
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}
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@ -251,13 +251,10 @@ R_API void r_reg_free(RReg *reg) {
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}
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}
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R_API RReg *r_reg_new(void) {
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R_API RReg *r_reg_init(RReg *reg) {
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r_return_val_if_fail (reg, NULL);
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RRegArena *arena;
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RReg *reg = R_NEW0 (RReg);
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int i;
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if (!reg) {
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return NULL;
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}
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size_t i;
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for (i = 0; i < R_REG_TYPE_LAST; i++) {
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arena = r_reg_arena_new (0);
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if (!arena) {
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@ -276,6 +273,10 @@ R_API RReg *r_reg_new(void) {
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return reg;
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}
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R_API RReg *r_reg_new(void) {
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return r_reg_init (R_NEW0 (RReg));
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}
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R_API bool r_reg_is_readonly(RReg *reg, RRegItem *item) {
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const char *name;
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RListIter *iter;
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@ -349,7 +350,7 @@ R_API RList *r_reg_get_list(RReg *reg, int type) {
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}
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regs = reg->regset[type].regs;
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if (r_list_length (regs) == 0) {
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if (regs && r_list_length (regs) == 0) {
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mask = ((int)1 << type);
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for (i = 0; i < R_REG_TYPE_LAST; i++) {
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if (reg->regset[i].maskregstype & mask) {
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@ -15,3 +15,288 @@ EXPECT=<<EOF
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0
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EOF
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RUN
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NAME=arp reg profile
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FILE=-
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CMDS=<<EOF
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e asm.arch=x86
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e asm.bits=64
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arps
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arp~?
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e asm.arch=x86
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e asm.bits=32
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arps
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arp~?
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e asm.arch=arm
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e asm.bits=32
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arps
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arp~?
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e asm.arch=arm
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e asm.bits=64
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arps
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arp~?
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EOF
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EXPECT=<<EOF
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160
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147
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64
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62
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68
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127
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808
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311
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EOF
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RUN
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NAME=arpi reg profile
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FILE=-
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CMDS=<<EOF
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e asm.arch=x86
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e asm.bits=64
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arpi
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EOF
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EXPECT=<<EOF
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Aliases (Reg->name)
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0 PC rip
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1 SP rsp
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2 SR (null)
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3 BP rbp
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4 LR (null)
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5 A0 rdi
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6 A1 rsi
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7 A2 rdx
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8 A3 rcx
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9 A4 r8
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10 A5 r9
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11 A6 r10
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12 A7 r11
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13 A8 (null)
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14 A9 (null)
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15 R0 (null)
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16 R1 (null)
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17 R2 (null)
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18 R3 (null)
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19 ZF (null)
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20 SF (null)
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21 CF (null)
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22 OF (null)
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23 SN rax
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regset 0 (gpr)
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* arena gpr size 160
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rax gpr @ gpr (offset: 80 size: 8)
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eax gpr @ gpr (offset: 80 size: 4)
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ax gpr @ gpr (offset: 80 size: 2)
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al gpr @ gpr (offset: 80 size: 1)
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ah gpr @ gpr (offset: 81 size: 1)
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rbx gpr @ gpr (offset: 40 size: 8)
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ebx gpr @ gpr (offset: 40 size: 4)
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bx gpr @ gpr (offset: 40 size: 2)
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bl gpr @ gpr (offset: 40 size: 1)
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bh gpr @ gpr (offset: 41 size: 1)
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rcx gpr @ gpr (offset: 88 size: 8)
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ecx gpr @ gpr (offset: 88 size: 4)
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cx gpr @ gpr (offset: 88 size: 2)
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cl gpr @ gpr (offset: 88 size: 1)
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ch gpr @ gpr (offset: 89 size: 1)
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rdx gpr @ gpr (offset: 96 size: 8)
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edx gpr @ gpr (offset: 96 size: 4)
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dx gpr @ gpr (offset: 96 size: 2)
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dl gpr @ gpr (offset: 96 size: 1)
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dh gpr @ gpr (offset: 97 size: 1)
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rsi gpr @ gpr (offset: 104 size: 8)
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esi gpr @ gpr (offset: 104 size: 4)
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si gpr @ gpr (offset: 104 size: 2)
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sil gpr @ gpr (offset: 104 size: 1)
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rdi gpr @ gpr (offset: 112 size: 8)
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edi gpr @ gpr (offset: 112 size: 4)
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di gpr @ gpr (offset: 112 size: 2)
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dil gpr @ gpr (offset: 112 size: 1)
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r8 gpr @ gpr (offset: 72 size: 8)
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r8d gpr @ gpr (offset: 72 size: 4)
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r8w gpr @ gpr (offset: 72 size: 2)
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r8b gpr @ gpr (offset: 72 size: 1)
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r9 gpr @ gpr (offset: 64 size: 8)
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r9d gpr @ gpr (offset: 64 size: 4)
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r9w gpr @ gpr (offset: 64 size: 2)
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r9b gpr @ gpr (offset: 64 size: 1)
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r10 gpr @ gpr (offset: 56 size: 8)
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r10d gpr @ gpr (offset: 56 size: 4)
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r10w gpr @ gpr (offset: 56 size: 2)
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r10b gpr @ gpr (offset: 56 size: 1)
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r11 gpr @ gpr (offset: 48 size: 8)
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r11d gpr @ gpr (offset: 48 size: 4)
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r11w gpr @ gpr (offset: 48 size: 2)
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r11b gpr @ gpr (offset: 48 size: 1)
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r12 gpr @ gpr (offset: 24 size: 8)
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r12d gpr @ gpr (offset: 24 size: 4)
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r12w gpr @ gpr (offset: 24 size: 2)
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r12b gpr @ gpr (offset: 24 size: 1)
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r13 gpr @ gpr (offset: 16 size: 8)
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r13d gpr @ gpr (offset: 16 size: 4)
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r13w gpr @ gpr (offset: 16 size: 2)
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r13b gpr @ gpr (offset: 16 size: 1)
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r14 gpr @ gpr (offset: 8 size: 8)
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r14d gpr @ gpr (offset: 8 size: 4)
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r14w gpr @ gpr (offset: 8 size: 2)
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r14b gpr @ gpr (offset: 8 size: 1)
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r15 gpr @ gpr (offset: 0 size: 8)
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r15d gpr @ gpr (offset: 0 size: 4)
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r15w gpr @ gpr (offset: 0 size: 2)
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r15b gpr @ gpr (offset: 0 size: 1)
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rip gpr @ gpr (offset: 128 size: 8)
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rbp gpr @ gpr (offset: 32 size: 8)
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ebp gpr @ gpr (offset: 32 size: 4)
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bp gpr @ gpr (offset: 32 size: 2)
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bpl gpr @ gpr (offset: 32 size: 1)
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rflags flg @ gpr (offset: 144 size: 8)
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eflags flg @ gpr (offset: 144 size: 4)
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cf flg @ gpr (offset: 144 size: 0)
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pf flg @ gpr (offset: 144 size: 0)
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af flg @ gpr (offset: 144 size: 0)
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zf flg @ gpr (offset: 144 size: 0)
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sf flg @ gpr (offset: 144 size: 0)
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tf flg @ gpr (offset: 145 size: 0)
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if flg @ gpr (offset: 145 size: 0)
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df flg @ gpr (offset: 145 size: 0)
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of flg @ gpr (offset: 145 size: 0)
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rsp gpr @ gpr (offset: 152 size: 8)
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esp gpr @ gpr (offset: 152 size: 4)
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sp gpr @ gpr (offset: 152 size: 2)
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spl gpr @ gpr (offset: 152 size: 1)
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regset 1 (drx)
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* arena drx size 64
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dr0 drx @ drx (offset: 0 size: 8)
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dr1 drx @ drx (offset: 8 size: 8)
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dr2 drx @ drx (offset: 16 size: 8)
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dr3 drx @ drx (offset: 24 size: 8)
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dr6 drx @ drx (offset: 48 size: 8)
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dr7 drx @ drx (offset: 56 size: 8)
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regset 2 (fpu)
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* arena fpu size 296
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cwd fpu @ fpu (offset: 0 size: 2)
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swd fpu @ fpu (offset: 2 size: 2)
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ftw fpu @ fpu (offset: 4 size: 2)
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fop fpu @ fpu (offset: 6 size: 2)
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frip fpu @ fpu (offset: 8 size: 8)
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frdp fpu @ fpu (offset: 16 size: 8)
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mxcsr fpu @ fpu (offset: 24 size: 4)
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mxcr_mask fpu @ fpu (offset: 28 size: 4)
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st0 fpu @ fpu (offset: 32 size: 8)
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st1 fpu @ fpu (offset: 48 size: 8)
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st2 fpu @ fpu (offset: 64 size: 8)
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st3 fpu @ fpu (offset: 80 size: 8)
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st4 fpu @ fpu (offset: 96 size: 8)
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st5 fpu @ fpu (offset: 112 size: 8)
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st6 fpu @ fpu (offset: 128 size: 8)
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st7 fpu @ fpu (offset: 144 size: 8)
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xmm0 xmm @ fpu (offset: 160 size: 16)
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xmm0h fpu @ fpu (offset: 160 size: 8)
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xmm0l fpu @ fpu (offset: 168 size: 8)
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xmm1 xmm @ fpu (offset: 176 size: 16)
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xmm1h fpu @ fpu (offset: 176 size: 8)
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xmm1l fpu @ fpu (offset: 184 size: 8)
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xmm2 xmm @ fpu (offset: 192 size: 16)
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xmm2h fpu @ fpu (offset: 192 size: 8)
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xmm2l fpu @ fpu (offset: 200 size: 8)
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xmm3 xmm @ fpu (offset: 208 size: 16)
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xmm3h fpu @ fpu (offset: 208 size: 8)
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xmm3l fpu @ fpu (offset: 216 size: 8)
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xmm4 xmm @ fpu (offset: 224 size: 16)
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xmm4h fpu @ fpu (offset: 224 size: 8)
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xmm4l fpu @ fpu (offset: 232 size: 8)
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xmm5 xmm @ fpu (offset: 240 size: 16)
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xmm5h fpu @ fpu (offset: 240 size: 8)
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xmm5l fpu @ fpu (offset: 248 size: 8)
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xmm6 xmm @ fpu (offset: 256 size: 16)
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xmm6h fpu @ fpu (offset: 256 size: 8)
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xmm6l fpu @ fpu (offset: 264 size: 8)
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xmm7 xmm @ fpu (offset: 272 size: 16)
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xmm7h fpu @ fpu (offset: 272 size: 8)
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xmm7l fpu @ fpu (offset: 280 size: 8)
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x64 fpu @ fpu (offset: 288 size: 8)
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regset 3 (mmx)
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* arena mmx size 1
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regset 4 (xmm)
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* arena xmm size 1
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regset 5 (ymm)
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* arena ymm size 1
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regset 6 (flg)
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* arena flg size 1
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regset 7 (seg)
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* arena seg size 216
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cs seg @ seg (offset: 136 size: 8)
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ss seg @ seg (offset: 160 size: 8)
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fs_base seg @ seg (offset: 168 size: 8)
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gs_base seg @ seg (offset: 176 size: 8)
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ds seg @ seg (offset: 184 size: 8)
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es seg @ seg (offset: 192 size: 8)
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fs seg @ seg (offset: 200 size: 8)
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gs seg @ seg (offset: 208 size: 8)
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EOF
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RUN
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NAME=bad regprofile
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FILE=-
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CMDS=<<EOF
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e asm.arch=x86
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e asm.bits=64
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arps
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arp scripts/badrp.r2
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arps
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ar=
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ar rax
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EOF
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EXPECT=<<EOF
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160
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88
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rax 0x00000000
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0x00000000
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EOF
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EXPECT_ERR=<<EOF
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Warning: =A0 not defined
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EOF
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RUN
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NAME=bad regprofile 2
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FILE=-
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CMDS=<<EOF
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e asm.arch=x86
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e asm.bits=64
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arps
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arp scripts/badrp2.r2
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arps
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ar=
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ar rax
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EOF
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EXPECT=<<EOF
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160
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1
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EOF
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EXPECT_ERR=<<EOF
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r_reg_set_profile_string: Parse error @ line 3 (Invalid syntax: Wrong number of columns)
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EOF
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RUN
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NAME=bad regprofile 2
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FILE=-
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CMDS=<<EOF
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e asm.arch=x86
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e asm.bits=64
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arps
|
||||
arp scripts/badrp2.r2
|
||||
arps
|
||||
e asm.arch=x86
|
||||
e asm.bits=32
|
||||
e asm.bits=64
|
||||
arps
|
||||
EOF
|
||||
EXPECT=<<EOF
|
||||
160
|
||||
1
|
||||
160
|
||||
EOF
|
||||
EXPECT_ERR=<<EOF
|
||||
r_reg_set_profile_string: Parse error @ line 3 (Invalid syntax: Wrong number of columns)
|
||||
EOF
|
||||
RUN
|
||||
|
||||
7
test/scripts/badrp.r2
Normal file
7
test/scripts/badrp.r2
Normal file
@ -0,0 +1,7 @@
|
||||
# this is a broken reg profile
|
||||
=PC 15
|
||||
gpr rax .64 80 0
|
||||
gpr eax .32 80 0
|
||||
gpr ax .16 80 0
|
||||
gpr al .8 80 0
|
||||
gpr ah .8 81 0
|
||||
7
test/scripts/badrp2.r2
Normal file
7
test/scripts/badrp2.r2
Normal file
@ -0,0 +1,7 @@
|
||||
# this is a broken reg profile
|
||||
=A0 15
|
||||
gpr rax .64 30
|
||||
gpr eax .32 -80
|
||||
gpr ax .16 80 0
|
||||
gpr al .8 80 0
|
||||
gpr ah .8 81 0
|
||||
Loading…
Reference in New Issue
Block a user