mirror of
https://github.com/radareorg/radare2.git
synced 2024-10-07 02:23:58 +00:00
move asm.arm_windebg to anal.arm_wd ##refactor
This commit is contained in:
parent
560260dbf0
commit
578e42ffcb
1
dist/plugins-cfg/plugins.bin.cfg
vendored
1
dist/plugins-cfg/plugins.bin.cfg
vendored
@ -73,7 +73,6 @@ io.ptrace
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io.procpid
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io.shm
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io.zip
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asm.arm_winedbg
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asm.sparc
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asm.arm
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asm.x86_nz
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1
dist/plugins-cfg/plugins.def.cfg
vendored
1
dist/plugins-cfg/plugins.def.cfg
vendored
@ -70,7 +70,6 @@ anal.pickle
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anal.propeller
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esil.dummy
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asm.arm
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asm.arm_winedbg
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asm.null
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asm.or1k
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asm.ppc_as
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1
dist/plugins-cfg/plugins.emscripten.cfg
vendored
1
dist/plugins-cfg/plugins.emscripten.cfg
vendored
@ -60,7 +60,6 @@ io.ptrace
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io.procpid
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io.shm
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io.zip
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asm.arm_winedbg
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asm.sparc
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anal.ppc
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anal.sparc
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1
dist/plugins-cfg/plugins.mingw.cfg
vendored
1
dist/plugins-cfg/plugins.mingw.cfg
vendored
@ -63,7 +63,6 @@ anal.pickle
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anal.propeller
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esil.dummy
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asm.arm
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asm.arm_winedbg
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asm.null
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asm.or1k
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asm.ppc_as
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3
dist/plugins-cfg/plugins.nocs.cfg
vendored
3
dist/plugins-cfg/plugins.nocs.cfg
vendored
@ -1,8 +1,8 @@
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STATIC="anal.8051
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anal.amd29k
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anal.arc
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anal.arm_v35
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anal.arm_gnu
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anal.arm_v35
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anal.avr
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anal.i4004
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anal.bf
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@ -50,7 +50,6 @@ anal.pyc
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anal.pickle
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anal.propeller
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esil.dummy
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asm.arm_winedbg
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asm.null
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asm.or1k
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asm.ppc_as
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1
dist/plugins-cfg/plugins.nogpl.cfg
vendored
1
dist/plugins-cfg/plugins.nogpl.cfg
vendored
@ -26,7 +26,6 @@ anal.xcore_cs
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anal.i4004
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esil.dummy
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asm.arm
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asm.arm_winedbg
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asm.x86_nz
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bin.any
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bin.bf
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1
dist/plugins-cfg/plugins.termux.cfg
vendored
1
dist/plugins-cfg/plugins.termux.cfg
vendored
@ -37,7 +37,6 @@ anal.pyc
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anal.i4004
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esil.dummy
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asm.arm
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asm.arm_winedbg
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asm.null
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asm.ppc_as
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asm.m68k_gnu
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@ -14,8 +14,8 @@
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#include "disas-asm.h"
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#include "../../asm/arch/arm/gnu/opcode-arm.h"
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static unsigned int disarm_branch_offset(unsigned int pc, unsigned int insoff) {
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unsigned int add = insoff << 2;
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static ut32 disarm_branch_offset(ut32 pc, ut32 insoff) {
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ut32 add = insoff << 2;
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/* zero extend if higher is 1 (0x02000000) */
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if ((add & 0x02000000) == 0x02000000) {
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add |= 0xFC000000;
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@ -34,7 +34,7 @@ static unsigned int disarm_branch_offset(unsigned int pc, unsigned int insoff) {
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#define API static
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static int op_thumb(RAnal *anal, RAnalOp *op, ut64 addr, const ut8 *data, int len) {
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static int op_thumb(RAnal *anal, RAnalOp *op, ut64 addr, const ut8 *data, int len, ut32 mask) {
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int op_code;
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ut16 *_ins = (ut16 *) data;
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ut16 ins = *_ins;
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@ -49,6 +49,17 @@ static int op_thumb(RAnal *anal, RAnalOp *op, ut64 addr, const ut8 *data, int le
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op->size = arm_disasm_one_insn (arminsn);
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op->jump = arminsn->jmp;
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op->fail = arminsn->fail;
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if (mask & R_ANAL_OP_MASK_DISASM) {
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const char *cpu = r_str_get_fail (anal->config->cpu, "");
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if (!strcmp (cpu, "wd")) {
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const char *asmstr = winedbg_arm_insn_asm (arminsn);
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if (asmstr) {
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op->mnemonic = strdup (asmstr);
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} else {
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op->mnemonic = strdup ("invalid");
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}
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}
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}
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arm_free (arminsn);
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// TODO: handle 32bit instructions (branches are not correctly decoded //
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@ -192,10 +203,11 @@ static void memory_error_func(int status, bfd_vma memaddr, struct disassemble_in
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DECLARE_GENERIC_PRINT_ADDRESS_FUNC()
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DECLARE_GENERIC_FPRINTF_FUNC()
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static R_TH_LOCAL char *oldcpu = NULL;
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static R_TH_LOCAL int oldcpucode = 0;
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static int disassemble(RAnal *a, RAnalOp *op, ut64 addr, const ut8 *buf, int len) {
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const int bits = a->config->bits;
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static R_TH_LOCAL char *oldcpu = NULL;
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static R_TH_LOCAL int oldcpucode = 0;
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int opsize;
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struct disassemble_info obj;
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char *options = (bits == 16)? "force-thumb": "no-force-thumb";
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@ -215,20 +227,6 @@ static int disassemble(RAnal *a, RAnalOp *op, ut64 addr, const ut8 *buf, int len
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/* prepare disassembler */
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memset (&obj, '\0', sizeof (struct disassemble_info));
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arm_mode = bits;
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#if 0
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typedef struct {
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unsigned long core[2];
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unsigned long coproc;
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} arm_feature_set;
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#endif
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#if 0
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arm_feature_set afs = ARM_ARCH_V7EM;
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arm_feature_set afp = FPU_ARCH_VFP_V4D16;
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printf ("v7em = core { 0x%x, 0x%x } copro 0x%x\n", afs.core[0], afs.core[1], afs.coproc);
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cpucode = afs.core[0];
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cpucode = 66471;
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#endif
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// printf ("fpu- = 0x%x\n", FPU_ARCH_VFP_V4D16);
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struct {
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const char name[32];
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@ -298,6 +296,7 @@ cpucode = 66471;
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: print_insn_big_arm ((bfd_vma) Offset, &obj);
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}
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opsize = op->size;
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op->mnemonic = NULL;
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if (op->size == -1) {
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op->mnemonic = strdup ("(data)");
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op->size = 4;
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@ -306,24 +305,26 @@ cpucode = 66471;
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op->size = 2;
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opsize = 2;
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}
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op->mnemonic = r_strbuf_drain (buf_global);
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if (!op->mnemonic) {
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op->mnemonic = r_strbuf_drain (buf_global);
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}
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buf_global = NULL;
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return opsize;
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}
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static int arm_op32(RAnal *anal, RAnalOp *op, ut64 addr, const ut8 *data, int len) {
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static int arm_op32(RAnal *anal, RAnalOp *op, ut64 addr, const ut8 *data, int len, ut32 mask) {
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const ut8 *b = (ut8 *) data;
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ut8 ndata[4] = {0};
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ut32 branch_dst_addr, i = 0;
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ut32 *code = (ut32 *) data;
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struct winedbg_arm_insn *arminsn;
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if (!data) {
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return 0;
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}
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arminsn = arm_new ();
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struct winedbg_arm_insn *arminsn = arm_new ();
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arm_set_thumb (arminsn, false);
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arm_set_input_buffer (arminsn, data);
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arm_set_pc (arminsn, addr);
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op->addr = addr;
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@ -339,9 +340,20 @@ static int arm_op32(RAnal *anal, RAnalOp *op, ut64 addr, const ut8 *data, int le
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}
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if (anal->config->bits == 16) {
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arm_free (arminsn);
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return op_thumb (anal, op, addr, data, len);
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return op_thumb (anal, op, addr, data, len, mask);
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}
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op->size = arm_disasm_one_insn (arminsn);
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if (mask & R_ANAL_OP_MASK_DISASM) {
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const char *cpu = r_str_get_fail (anal->config->cpu, "");
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if (!strcmp (cpu, "wd")) {
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const char *asmstr = winedbg_arm_insn_asm (arminsn);
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if (asmstr) {
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op->mnemonic = strdup (asmstr);
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} else {
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op->mnemonic = strdup ("invalid");
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}
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}
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}
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op->size = 4;
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op->cond = op_cond (data);
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if (b[2] == 0x8f && b[3] == 0xe2) {
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op->type = R_ANAL_OP_TYPE_ADD;
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@ -484,7 +496,6 @@ static int arm_op32(RAnal *anal, RAnalOp *op, ut64 addr, const ut8 *data, int le
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return op->size;
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}
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static ut64 getaddr(ut64 addr, const ut8 *d) {
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if (d[2] >> 7) {
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/// st32 n = (d[0] + (d[1] << 8) + (d[2] << 16) + (0xff << 24));
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@ -546,34 +557,15 @@ static int arm_op64(RAnal *anal, RAnalOp *op, ut64 addr, const ut8 *d, int len)
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static int arm_op(RAnal *anal, RAnalOp *op, ut64 addr, const ut8 *data, int len, RAnalOpMask mask) {
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if (mask & R_ANAL_OP_MASK_DISASM) {
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disassemble (anal, op, addr, data, len);
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#if 0
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struct disassemble_info disasm_obj;
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int n = 0;
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RStrBuf *insn_strbuf = r_strbuf_new ("");
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disasm_obj.stream = insn_strbuf;
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insn_offset = addr;
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/*Looks kind of lame*/
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memcpy (insn_bytes, b, INSNLEN);
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disasm_obj.fprintf_func = &insn_fprintf_func;
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disasm_obj.memory_error_func = &insn_memory_error_func;
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disasm_obj.read_memory_func = &insn_read_func;
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disasm_obj.stream = insn_strbuf;
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n = print_insn_loongarch (addr, &disasm_obj);
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if (n < 0) {
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op->mnemonic = strdup ("invalid");
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} else {
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op->mnemonic = strdup (insn_strbuf->buf);
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const char *cpu = r_str_get_fail (anal->config->cpu, "");
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if (strcmp (cpu, "wd")) {
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disassemble (anal, op, addr, data, len);
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}
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r_strbuf_free (insn_strbuf);
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#endif
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}
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if (anal->config->bits == 64) {
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return arm_op64 (anal, op, addr, data, len);
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}
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return arm_op32 (anal, op, addr, data, len);
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return arm_op32 (anal, op, addr, data, len, mask);
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}
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static bool set_reg_profile(RAnal *anal) {
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@ -633,11 +625,11 @@ static int archinfo(RAnal *anal, int q) {
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RAnalPlugin r_anal_plugin_arm_gnu = {
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.name = "arm.gnu",
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.arch = "arm",
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.cpus = "v2,v2a,v3M,v4,v5,v5t,v5te,v5j,XScale,ep9312,iWMMXt,iWMMXt2",
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.cpus = "v2,v2a,v3M,v4,v5,v5t,v5te,v5j,XScale,ep9312,iWMMXt,iWMMXt2,wd",
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.endian = R_SYS_ENDIAN_LITTLE | R_SYS_ENDIAN_BIG,
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.license = "LGPL3",
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.bits = 16 | 32 | 64,
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.desc = "ARM code analysis plugin",
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.desc = "ARM code analysis plugin (asm.cpu=wd for winedbg disassembler)",
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.archinfo = archinfo,
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.op = &arm_op,
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.set_reg_profile = set_reg_profile,
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@ -9,7 +9,7 @@ r_asm_sources = [
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join_paths('p','asm_null.c'),
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join_paths('p','asm_arm_as.c'),
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join_paths('p','asm_arm.c'),
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join_paths('p','asm_arm_winedbg.c'),
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#join_paths('p','asm_arm_winedbg.c'),
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#join_paths('p','asm_gas.c'),
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'arch/arm/gnu/floatformat.c',
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# join_paths('p','asm_lanai_gnu.c'),
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@ -22,7 +22,7 @@ r_asm_sources = [
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# join_paths('p','asm_z80.c'),
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join_paths('arch','arm','armass.c'),
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join_paths('arch','arm','armass64.c'),
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join_paths('arch','arm','winedbg','be_arm.c'),
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#join_paths('arch','arm','winedbg','be_arm.c'),
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join_paths('arch','avr','avr_disasm.c'),
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join_paths('arch','avr','format.c'),
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join_paths('arch','avr','disasm.c'),
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@ -20,7 +20,7 @@ ALL_TARGETS=
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ARCHS=sparc_gnu.mk java.mk arm_gnu.mk
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ARCHS+=x86_as.mk x86_nz.mk cris_gnu.mk arc.mk
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ARCHS+=ppc_as.mk x86_nasm.mk avr.mk
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ARCHS+=sh.mk arm_winedbg.mk tms320.mk ebc.mk
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ARCHS+=sh.mk tms320.mk ebc.mk
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ARCHS+=cr16.mk v850.mk jdh8.mk riscv.mk
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ARCHS+=v810.mk lm32.mk mcore.mk
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# ARCHS+=loongarch_gnu.mk
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@ -1,13 +0,0 @@
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OBJ_ARM_WINEDBG=asm_arm_winedbg.o
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OBJ_ARM_WINEDBG+=../arch/arm/winedbg/be_arm.o
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STATIC_OBJ+=${OBJ_ARM_WINEDBG}
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TARGET_ARM_WINEDBG=asm_arm_winedbg.${EXT_SO}
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ifeq ($(WITHPIC),1)
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ALL_TARGETS+=${TARGET_ARM_WINEDBG}
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${TARGET_ARM_WINEDBG}: ${OBJ_ARM_WINEDBG}
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${CC} $(call libname,asm_arm_winedbg) ${LDFLAGS} ${CFLAGS} \
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-o asm_arm_winedbg.${EXT_SO} ${OBJ_ARM_WINEDBG}
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endif
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@ -1,52 +0,0 @@
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/* radare - LGPL - Copyright 2009-2022 - nibble, pancake */
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#include <stdio.h>
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#include <stdarg.h>
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#include <string.h>
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#include <r_types.h>
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#include <r_util.h>
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#include <r_lib.h>
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#include <r_asm.h>
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#include "../arch/arm/winedbg/be_arm.h"
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static int disassemble(RAsm *a, RAsmOp *op, const ut8 *buf, int len) {
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ut8 buf2[4];
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struct winedbg_arm_insn *arminsn = arm_new();
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arm_set_pc (arminsn, a->pc);
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arm_set_thumb (arminsn, a->config->bits == 16);
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if (a->config->big_endian && a->config->bits == 32) {
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r_mem_swapendian (buf2, buf, 4);
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arm_set_input_buffer (arminsn, buf2);
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} else {
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arm_set_input_buffer (arminsn, buf);
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}
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op->size = arm_disasm_one_insn (arminsn);
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const char *asmstr = winedbg_arm_insn_asm (arminsn);
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if (asmstr) {
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r_strbuf_set (&op->buf_asm, asmstr);
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r_asm_op_set_hex (op, winedbg_arm_insn_hex (arminsn));
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} else {
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r_strbuf_set (&op->buf_asm, "invalid");
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r_strbuf_set (&op->buf, "");
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}
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arm_free (arminsn);
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return op->size;
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}
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||||
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RAsmPlugin r_asm_plugin_arm_winedbg = {
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.name = "arm.winedbg",
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||||
.arch = "arm",
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||||
.bits = 16 | 32,
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||||
.endian = R_SYS_ENDIAN_LITTLE | R_SYS_ENDIAN_BIG,
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||||
.desc = "WineDBG's ARM disassembler",
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||||
.disassemble = &disassemble,
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||||
.license = "LGPL2"
|
||||
};
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||||
|
||||
#ifndef R2_PLUGIN_INCORE
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||||
R_API RLibStruct radare_plugin = {
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.type = R_LIB_TYPE_ASM,
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||||
.data = &r_asm_plugin_arm_winedbg,
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.version = R2_VERSION
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};
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#endif
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@ -180,7 +180,6 @@ R_API ut8 *r_asm_op_get_buf(RAsmOp *op);
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/* plugin pointers */
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extern RAsmPlugin r_asm_plugin_arm_as;
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extern RAsmPlugin r_asm_plugin_arm;
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extern RAsmPlugin r_asm_plugin_arm_winedbg;
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extern RAsmPlugin r_asm_plugin_null;
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extern RAsmPlugin r_asm_plugin_h8300;
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extern RAsmPlugin r_asm_plugin_nios2;
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@ -120,7 +120,6 @@ if no_user_plugins
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asm_plugins += [
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'arm_as',
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'arm',
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'arm_winedbg',
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||||
'or1k',
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'ppc_as',
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'x86_as',
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||||
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@ -2,3 +2,12 @@ a "add r2, r2, r1" 012082e0
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||||
aB "nop ; (mov r0, r0)" 0000a0e1
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||||
a "bx r2" 12ff2fe1
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a "blx r5" 35ff2fe1
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||||
d "bl 0x00001900" 3e0600eb
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||||
d "b 0x00001900" 3e0600ea
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||||
d "swp r1, r2, [r0]" 921000e1
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||||
d "swpb r1, r2, [r0]" 921040e1
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||||
d "beq 0x00000008" 0000000a
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||||
d "movt r1, 12345" 391043e3
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||||
d "movw r2, 54321" 31240de3
|
||||
d "moveq r0, sl" 0a00a001
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||||
d "svc 0x00000003" 030000ef
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||||
|
@ -1,3 +1,7 @@
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||||
a "add r2, r2, r1" 012082e0
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||||
aB "nop ; (mov r0, r0)" 0000a0e1
|
||||
a "bx r2" 12ff2fe1
|
||||
a "blx r5" 35ff2fe1
|
||||
d "bl 0x1900" 3e0600eb
|
||||
d "b 0x1900" 3e0600ea
|
||||
d "b 0xfffffffffe00d050" 123480ea
|
Loading…
Reference in New Issue
Block a user