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Fix Alignment Check in aae on bit change

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This commit is contained in:
Florian Märkl 2019-12-15 20:24:03 +01:00 committed by radare
parent 6f546149cf
commit 5870b5df85
6 changed files with 63 additions and 19 deletions
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7
libr/core/canal.c
View File

@ -1845,7 +1845,7 @@ R_API int r_core_anal_fcn(RCore *core, ut64 at, ut64 from, int reftype, int dept
//update bits based on the core->offset otherwise we could have the
//last value set and blow everything up
r_core_seek_archbits (core, at);
r_core_seek_arch_bits (core, at);
if (core->io->va) {
if (!r_io_is_valid_offset (core->io, at, !core->anal->opt.noncode)) {
@ -4870,7 +4870,6 @@ R_API void r_core_anal_esil(RCore *core, const char *str, const char *target) {
arch = R2_ARCH_MIPS;
}
int opalign = r_anal_archinfo (core->anal, R_ANAL_ARCHINFO_ALIGN);
const char *sn = r_reg_get_name (core->anal->reg, R_REG_NAME_SN);
if (!sn) {
eprintf ("Warning: No SN reg alias for current architecture.\n");
@ -4905,10 +4904,14 @@ repeat:
r_list_free (list);
}
}
/* realign address if needed */
r_core_seek_arch_bits (core, cur);
int opalign = core->anal->pcalign;
if (opalign > 0) {
cur -= (cur % opalign);
}
r_anal_op_fini (&op);
r_asm_set_pc (core->assembler, cur);
if (!r_anal_op (core->anal, &op, cur, buf + i, iend - i, R_ANAL_OP_MASK_ESIL | R_ANAL_OP_MASK_VAL | R_ANAL_OP_MASK_HINT)) {

44
libr/core/cio.c
View File

@ -333,23 +333,41 @@ static void __choose_bits_anal_hints(RCore *core, ut64 addr, int *bits) {
}
}
R_API void r_core_seek_archbits(RCore *core, ut64 addr) {
// Get address-specific bits and arch at a certain address.
// If there are no specific infos (i.e. asm.bits and asm.arch should apply), the bits and arch will be 0 or NULL respectively!
R_API void r_core_arch_bits_at(RCore *core, ut64 addr, R_OUT R_NULLABLE int *bits, R_OUT R_BORROW R_NULLABLE const char **arch) {
int bitsval = 0;
const char *archval = NULL;
RBinObject *o = r_bin_cur_object (core->bin);
RBinSection *s = o ? r_bin_get_section_at (o, addr, core->io->va) : NULL;
if (s) {
if (!core->fixedarch) {
archval = s->arch;
}
if (!core->fixedbits) {
bitsval = s->bits;
}
}
if (bits && !bitsval && !core->fixedbits) {
//if we found bits related with anal hints pick it up
__choose_bits_anal_hints (core, addr, &bitsval);
}
if (bits) {
*bits = bitsval;
}
if (arch) {
*arch = archval;
}
}
R_API void r_core_seek_arch_bits(RCore *core, ut64 addr) {
int bits = 0;
const char *arch = NULL;
RBinObject *o = r_bin_cur_object (core->bin);
RBinSection *s = o? r_bin_get_section_at (o, addr, core->io->va): NULL;
if (s) {
arch = s->arch;
bits = s->bits;
}
if (!bits && !core->fixedbits) {
//if we found bits related with anal hints pick it up
__choose_bits_anal_hints (core, addr, &bits);
}
if (bits && !core->fixedbits) {
r_core_arch_bits_at (core, addr, &bits, &arch);
if (bits) {
r_config_set_i (core->config, "asm.bits", bits);
}
if (arch && !core->fixedarch) {
if (arch) {
r_config_set (core->config, "asm.arch", arch);
}
}

2
libr/core/core.c
View File

@ -259,7 +259,7 @@ static char *getNameDelta(RCore *core, ut64 addr) {
}
static void archbits(RCore *core, ut64 addr) {
r_core_seek_archbits (core, addr);
r_core_seek_arch_bits (core, addr);
}
static int cfggeti(RCore *core, const char *k) {

4
libr/core/disasm.c
View File

@ -5225,7 +5225,7 @@ toro:
}
}
}
r_core_seek_archbits (core, ds->at); // slow but safe
r_core_seek_arch_bits (core, ds->at); // slow but safe
ds->has_description = false;
ds->hint = r_core_hint_begin (core, ds->hint, ds->at);
ds->printed_str_addr = UT64_MAX;
@ -5710,7 +5710,7 @@ R_API int r_core_print_disasm_instructions(RCore *core, int nb_bytes, int nb_opc
ds->at = core->offset + i;
ds->vat = r_core_pava (core, ds->at);
hasanal = false;
r_core_seek_archbits (core, ds->at);
r_core_seek_arch_bits (core, ds->at);
if (r_cons_is_breaked ()) {
break;
}

3
libr/include/r_core.h
View File

@ -422,7 +422,8 @@ R_API int r_core_seek_base (RCore *core, const char *hex);
R_API void r_core_seek_previous (RCore *core, const char *type);
R_API void r_core_seek_next (RCore *core, const char *type);
R_API int r_core_seek_align(RCore *core, ut64 align, int count);
R_API void r_core_seek_archbits (RCore *core, ut64 addr);
R_API void r_core_arch_bits_at(RCore *core, ut64 addr, R_OUT R_NULLABLE int *bits, R_OUT R_BORROW R_NULLABLE const char **arch);
R_API void r_core_seek_arch_bits(RCore *core, ut64 addr);
R_API int r_core_block_read(RCore *core);
R_API int r_core_block_size(RCore *core, int bsize);
R_API int r_core_seek_size(RCore *core, ut64 addr, int bsize);

22
test/new/db/anal/arm
View File

@ -925,3 +925,25 @@ cycles: 1
esil: 0,sp,+,0xffffffff,&,r7,=
family: cpu
RUN
NAME=arm aae with bit switch
FILE=../bins/arm/elf/hello_world
EXPECT=<<EOF
;-- main:
0x0000050c 80b5 push {r7, lr}
0x0000050e 00af add r7, sp, 0
0x00000510 034b ldr r3, [0x00000520] ; [0x520:4]=94 ; 1312
0x00000512 7b44 add r3, pc ; 0x574 ; "Hello world!"
0x00000514 1846 mov r0, r3
0x00000516 fff75aef blx sym.imp.puts
0x0000051a 0023 movs r3, 0
0x0000051c 1846 mov r0, r3
0x0000051e 80bd pop {r7, pc}
EOF
CMDS=<<EOF
aei
e asm.bits=32
aae 20 @ main
pd 9 @ main
EOF
RUN