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Fix #17850 - Fix sparc disassembler with invalid instructions
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@ -1,4 +1,4 @@
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/* radare2 - LGPL - Copyright 2014-2022 - pancake */
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/* radare2 - LGPL - Copyright 2014-2023 - pancake */
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#include <r_anal.h>
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#include <r_lib.h>
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@ -147,6 +147,11 @@ performed in big-endian byte order.
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int n = cs_disasm (handle, (const ut8*)buf, len, addr, 1, &insn);
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if (n < 1) {
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op->type = R_ANAL_OP_TYPE_ILL;
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op->size = 4;
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if (mask & R_ARCH_OP_MASK_DISASM) {
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free (op->mnemonic);
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op->mnemonic = strdup ("empty");
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}
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} else {
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if (mask & R_ARCH_OP_MASK_OPEX) {
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opex (&op->opex, handle, insn);
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@ -160,7 +160,7 @@ af
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afl
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EOF
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EXPECT=<<EOF
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0x00018c08 360 7628 main
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0x00018c08 360 7376 main
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EOF
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RUN
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@ -494,3 +494,28 @@ EXPECT=<<EOF
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0x0001bcf8 0x0001bd00 00:0000 8
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EOF
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RUN
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NAME=sparc-1 main
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FILE=bins/elf/sparc-1
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ARGS=-e asm.lines=false
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CMDS=<<EOF
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pd 4
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s main
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pd 4
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EOF
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EXPECT=<<EOF
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;-- section..text:
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;-- .text:
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;-- entry0:
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;-- _start:
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0x000100f0 bc100000 mov g0, fp ; [02] -r-x section size 50552 named .text
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0x000100f4 9c23a018 sub sp, 0x18, sp
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0x000100f8 d203a058 ld [sp+0x58], o1
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0x000100fc 9403a05c add sp, 0x5c, o2
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;-- main:
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0x000104b4 fc3ba038 empty
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0x000104b8 9c03bfa0 add sp, -0x60, sp
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0x000104bc bc23bfa0 sub sp, -0x60, fp
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0x000104c0 be10000f mov o7, i7
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EOF
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RUN
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