mirror of
https://github.com/radareorg/radare2.git
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New arm64 instruction support (#8140)
* Add cmp for reg, reg * Add strb instruction to arm64 * Add b.eq instruction arm64 * Add byte store ops * Add str and ldr ops
This commit is contained in:
Sven Steinbauer
radare
parent
f20edcc5ee
commit
6c666bf142
@ -23,6 +23,13 @@ typedef enum regtype_t {
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ARM_SIMD = 16
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} RegType;
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typedef enum shifttype_t {
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ARM_NO_SHIFT = -1,
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ARM_LSL = 0,
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ARM_LSR = 1,
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ARM_ASR = 2
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} ShiftType;
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typedef struct operand_t {
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OpType type;
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union {
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@ -36,8 +43,8 @@ typedef struct operand_t {
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int sign;
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};
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struct {
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ut64 lsl;
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ut64 shift;
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ut64 shift_amount;
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ShiftType shift;
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};
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struct {
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ut32 mem_option;
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@ -60,7 +67,7 @@ static int get_mem_option(char *token) {
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// values 4, 8, 12, are unused. XXX to adjust
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const char *options[] = {"sy", "st", "ld", "xxx", "ish", "ishst",
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"ishld", "xxx", "nsh", "nshst", "nshld",
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"xxx", "osh", "oshst", "oshld", NULL};
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"xxx", "osh", "oshst", "oshld", NULL};
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int i = 0;
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while (options[i]) {
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if (!strcasecmp (token, options[i])) {
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@ -71,6 +78,121 @@ static int get_mem_option(char *token) {
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return -1;
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}
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static int countLeadingZeros(ut32 x) {
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int count = 0;
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while (x) {
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x >>= 1;
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--count;
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}
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return count;
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}
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static int countTrailingZeros(ut32 x) {
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int count = 0;
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while (x > 0) {
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if ((x & 1) == 1) {
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break;
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} else {
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count ++;
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x = x >> 1;
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}
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}
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return count;
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}
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static int calcNegOffset(int n, int shift) {
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int a = n >> shift;
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if (a == 0) {
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return 0xff;
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}
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// find first set bit then invert it and all
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// bits below it
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int t = 0x400;
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while (!(t & a) && a != 0 && t != 0) {
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t = t >> 1;
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}
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t = t & (t - 1);
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a = a ^ t;
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// If bits below 32 are set
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if (countTrailingZeros(n) > shift) {
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a--;
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}
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return 0xff & (0xff - a);
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}
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static int rol(ut32 n, int i) {
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return ((n << i) | (n >> (32 - i))) >> 0;
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}
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static int ror(ut32 n, int i) {
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return ((n >> i) | (n << (32 - i))) >> 0;
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}
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static int encode(int n) {
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int i, m;
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for (i = 0; i < 16; i++) {
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m = rol(n, i * 2);
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if (m < 256) {
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return (i << 8) | m;
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}
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}
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return -1;
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}
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static int countLeadingOnes(ut32 x) {
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return countLeadingZeros (~x);
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}
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static int countTrailingOnes(ut32 x) {
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return countTrailingZeros (~x);
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}
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static bool isMask(ut32 value) {
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return value && ((value + 1) & value) == 0;
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}
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static bool isShiftedMask (ut32 value) {
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return value && isMask ((value - 1) | value);
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}
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static ut32 decodeBitMasks(ut32 imm) {
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// get element size
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int size = 32;
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// determine rot to make element be 0^m 1^n
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ut32 cto, i;
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ut32 mask = ((ut64) - 1LL) >> (64 - size);
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if (isShiftedMask (imm)) {
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i = countTrailingZeros (imm);
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cto = countTrailingOnes (imm >> i);
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} else {
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imm |= ~mask;
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if (!isShiftedMask (imm)) {
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return UT32_MAX;
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}
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ut32 clo = countLeadingOnes (imm);
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i = 64 - clo;
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cto = clo + countTrailingOnes (imm) - (64 - size);
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}
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// Encode in Immr the number of RORs it would take to get *from* 0^m 1^n
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// to our target value, where I is the number of RORs to go the opposite
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// direction
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ut32 immr = (size - i) & (size - 1);
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// If size has a 1 in the n'th bit, create a value that has zeroes in
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// bits [0, n] and ones above that.
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ut64 nimms = ~(size - 1) << 1;
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// Or the cto value into the low bits, which must be below the Nth bit
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// bit mentioned above.
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nimms |= (cto - 1);
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// Extract and toggle seventh bit to make N field.
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ut32 n = ((nimms >> 6) & 1) ^ 1;
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ut64 encoding = (n << 12) | (immr << 6) | (nimms & 0x3f);
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return encoding;
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}
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static ut32 mov(ArmOp *op) {
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int k = 0;
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ut32 data = UT32_MAX;
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@ -112,13 +234,202 @@ static ut32 mov(ArmOp *op) {
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}
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data = k;
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//printf ("Immediate %d\n", op->operands[1].immediate);
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data |= (op->operands[0].reg << 24); // arg(0)
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data |= ((op->operands[1].immediate & 7) << 29); // arg(1)
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data |= (((op->operands[1].immediate >> 3) & 0xff) << 16); // arg(1)
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data |= ((op->operands[1].immediate >> 10) << 7); // arg(1)
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return data;
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}
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static ut32 cmp(ArmOp *op) {
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ut32 data = UT32_MAX;
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int k = 0;
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if (op->operands[0].reg_type & ARM_REG64 && op->operands[1].reg_type & ARM_REG64) {
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k = 0x1f0000eb;
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} else if (op->operands[0].reg_type & ARM_REG32 && op->operands[1].reg_type & ARM_REG32) {
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if (op->operands[2].shift_amount > 31) {
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return UT32_MAX;
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}
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k = 0x1f00006b;
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} else {
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return UT32_MAX;
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}
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data = k | (op->operands[0].reg & 0x18) << 13 | op->operands[0].reg << 29 | op->operands[1].reg << 8;
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if (op->operands[2].shift != ARM_NO_SHIFT) {
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data |= op->operands[2].shift_amount << 18 | op->operands[2].shift << 14;
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}
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return data;
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}
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static ut32 sturop(ArmOp *op, int k) {
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ut32 data = UT32_MAX;
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if (op->operands[1].reg_type & ARM_REG32) {
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return data;
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}
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if (op->operands[0].reg_type & ARM_REG32) {
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k -= 0x40;
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}
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if (op->operands[2].type & ARM_GPR) {
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return data;
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}
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int n = op->operands[2].immediate;
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if (n > 0xff || n < -0x100) {
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return data;
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}
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data = k | op->operands[0].reg << 24 | op->operands[1].reg << 29 | (op->operands[1].reg & 56) << 13;
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if (n < 0) {
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n *= -1;
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data |= ( 0xf & (0xf - (n - 1)) ) << 20;
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if (countTrailingZeros(n) > 3) {
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data |= (0x1f - ((n >> 4) - 1)) << 8;
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} else {
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data |= (0x1f - (n >> 4)) << 8;
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}
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} else {
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data |= (0xf & (n & 63)) << 20;
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if (countTrailingZeros(n) < 4) {
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data |= (n >> 4) << 8;
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} else {
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data |= (0xff & n) << 4;
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}
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data |= (n >> 8) << 8;
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}
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return data;
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}
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// Register Load/store ops
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static ut32 reglsop(ArmOp *op, int k) {
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ut32 data = UT32_MAX;
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if (op->operands[1].reg_type & ARM_REG32) {
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return data;
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}
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if (op->operands[0].reg_type & ARM_REG32) {
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k -= 0x40;
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}
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if (op->operands[2].type & ARM_GPR) {
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k += 0x00682000;
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data = k | op->operands[0].reg << 24 | op->operands[1].reg << 29 | (op->operands[1].reg & 56) << 13;
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data |= op->operands[2].reg << 8;
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} else {
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int n = op->operands[2].immediate;
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if (n > 0x100 || n < -0x100) {
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return UT32_MAX;
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}
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if (n == 0 || (n > 0 && countTrailingZeros(n) >= 4)) {
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k ++;
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}
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data = k | op->operands[0].reg << 24 | op->operands[1].reg << 29 | (op->operands[1].reg & 56) << 13;
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if (n < 0) {
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n *= -1;
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data |= ( 0xf & (0xf - (n - 1)) ) << 20;
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if (countTrailingZeros(n) > 3) {
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data |= (0x1f - ((n >> 4) - 1)) << 8;
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} else {
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data |= (0x1f - (n >> 4)) << 8;
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}
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} else {
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if (op->operands[0].reg_type & ARM_REG32) {
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if (countTrailingZeros(n) < 2) {
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data |= (0xf & (n & 63)) << 20;
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data |= (n >> 4) << 8;
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} else {
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data++;
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data |= (0xff & n) << 16;
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}
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data |= (n >> 8) << 8;
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} else {
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data |= (0xf & (n & 63)) << 20;
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if (countTrailingZeros(n) < 4) {
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data |= (n >> 4) << 8;
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} else {
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data |= (0xff & n) << 15;
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}
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data |= (n >> 8) << 23;
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}
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}
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}
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return data;
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}
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// Byte load/store ops
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static ut32 bytelsop(ArmOp *op, int k) {
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ut32 data = UT32_MAX;
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if (op->operands[0].reg_type & ARM_REG64) {
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return data;
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}
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if (op->operands[1].reg_type & ARM_REG32) {
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return data;
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}
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if (op->operands[2].type & ARM_GPR) {
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if ((k & 0xf) != 8) {
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k--;
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}
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k += 0x00682000;
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data = k | op->operands[0].reg << 24 | op->operands[1].reg << 29 | (op->operands[1].reg & 56) << 13;
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data |= op->operands[2].reg << 8;
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return data;
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}
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int n = op->operands[2].immediate;
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if (n > 0xfff || n < -0x100) {
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return UT32_MAX;
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}
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// Half ops
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int halfop = false;
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if ((k & 0xf) == 8) {
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halfop = true;
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if (n == 0 || (countTrailingZeros(n) && n > 0)) {
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k++;
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}
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} else {
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if (n < 0) {
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k--;
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}
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}
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data = k | op->operands[0].reg << 24 | op->operands[1].reg << 29 | (op->operands[1].reg & 56) << 13;
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int imm = n;
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int low_shift = 20;
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int high_shift = 8;
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int top_shift = 10;
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if (n < 0) {
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imm = 0xfff + (n + 1);
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}
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if (halfop) {
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if (imm & 0x1 || n < 0) {
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data |= (0xf & imm) << low_shift ;
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data |= (0x7 & (imm >> 4)) << high_shift;
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data |= (0x7 & (imm >> 6)) << top_shift;
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} else {
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data |= (0xf & imm) << (low_shift - 3);
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data |= (0x7 & (imm >> 4)) << (high_shift + 13);
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data |= (0x7 & (imm >> 7)) << (top_shift - 2);
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}
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} else {
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if (n < 0) {
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data |= (0xf & imm) << 20;
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data |= (0x1f & (imm >> 4)) << 8;
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} else {
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data |= (0xf & imm) << 18;
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data |= (0x3 & (imm >> 4)) << 22;
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data |= (0x7 & (imm >> 6)) << 8;
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}
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}
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return data;
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}
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static ut32 branch(ArmOp *op, ut64 addr, int k) {
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@ -154,6 +465,37 @@ static ut32 branch(ArmOp *op, ut64 addr, int k) {
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return data;
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}
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static ut32 bdot(ArmOp *op, ut64 addr, int k) {
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ut32 data = UT32_MAX;
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int n = 0;
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int a = 0;
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int tz = 0;
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n = op->operands[0].immediate;
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// I am sure there's a logical way to do negative offsets,
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// but I was unable to find any sensible docs so I did my best
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if (!(n & 0x3 || n > 0x7ffffff)) {
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n -= addr;
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data = k;
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if (n < 0) {
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n *= -1;
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a = (n << 3) - 1;
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data |= (0xff - a) << 24;
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a = calcNegOffset(n, 5);
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data |= a << 16;
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a = calcNegOffset(n, 13);
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data |= a << 8;
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} else {
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data |= (n & 31) << 27;
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data |= (0xff & (n >> 5)) << 16;
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data |= (0xff & (n >> 13)) << 8;
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}
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}
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return data;
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}
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static ut32 mem_barrier (ArmOp *op, ut64 addr, int k) {
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ut32 data = UT32_MAX;
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data = k;
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@ -231,81 +573,6 @@ static ut32 msr(ArmOp *op, int w) {
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return data;
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}
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static int countLeadingZeros(ut32 x) {
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int count = 0;
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while (x) {
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x >>= 1;
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--count;
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}
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return count;
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}
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static int countTrailingZeros(ut32 x) {
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int count = 0;
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while (x > 0) {
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if ((x & 1) == 1) {
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break;
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} else {
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count ++;
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x = x >> 1;
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}
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}
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return count;
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}
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static int countLeadingOnes(ut32 x) {
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return countLeadingZeros (~x);
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}
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static int countTrailingOnes(ut32 x) {
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return countTrailingZeros (~x);
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}
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static bool isMask(ut32 value) {
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return value && ((value + 1) & value) == 0;
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}
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static bool isShiftedMask (ut32 value) {
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return value && isMask ((value - 1) | value);
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}
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static ut32 decodeBitMasks(ut32 imm) {
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// get element size
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int size = 32;
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// determine rot to make element be 0^m 1^n
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ut32 cto, i;
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ut32 mask = ((ut64) - 1LL) >> (64 - size);
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if (isShiftedMask (imm)) {
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i = countTrailingZeros (imm);
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cto = countTrailingOnes (imm >> i);
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} else {
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imm |= ~mask;
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if (!isShiftedMask (imm)) {
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return UT32_MAX;
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}
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ut32 clo = countLeadingOnes (imm);
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i = 64 - clo;
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cto = clo + countTrailingOnes (imm) - (64 - size);
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}
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// Encode in Immr the number of RORs it would take to get *from* 0^m 1^n
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// to our target value, where I is the number of RORs to go the opposite
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// direction
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ut32 immr = (size - i) & (size - 1);
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// If size has a 1 in the n'th bit, create a value that has zeroes in
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// bits [0, n] and ones above that.
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ut64 nimms = ~(size - 1) << 1;
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// Or the cto value into the low bits, which must be below the Nth bit
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// bit mentioned above.
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nimms |= (cto - 1);
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// Extract and toggle seventh bit to make N field.
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ut32 n = ((nimms >> 6) & 1) ^ 1;
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ut64 encoding = (n << 12) | (immr << 6) | (nimms & 0x3f);
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return encoding;
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}
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static ut32 orr(ArmOp *op, int addr) {
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ut32 data = UT32_MAX;
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@ -390,7 +657,6 @@ static ut32 adrp(ArmOp *op, ut64 addr, ut32 k) { //, int reg, ut64 dst) {
|
||||
return data;
|
||||
}
|
||||
|
||||
|
||||
static ut32 adr(ArmOp *op, int addr) {
|
||||
ut32 data = UT32_MAX;
|
||||
ut64 at = 0LL;
|
||||
@ -471,6 +737,30 @@ static bool parseOperands(char* str, ArmOp *op) {
|
||||
}
|
||||
op->operands[operand].type = ARM_NOTYPE;
|
||||
op->operands[operand].reg_type = ARM_UNDEFINED;
|
||||
op->operands[operand].shift = ARM_NO_SHIFT;
|
||||
|
||||
while (token[0] == ' ' || token[0] == '[' || token[0] == ']') {
|
||||
token ++;
|
||||
}
|
||||
|
||||
if (!strncmp (token, "lsl", 3)) {
|
||||
op->operands[operand].shift = ARM_LSL;
|
||||
} else if (!strncmp (token, "lsr", 3)) {
|
||||
op->operands[operand].shift = ARM_LSR;
|
||||
} else if (!strncmp (token, "asr", 3)) {
|
||||
op->operands[operand].shift = ARM_ASR;
|
||||
}
|
||||
if (op->operands[operand].shift != ARM_NO_SHIFT) {
|
||||
op->operands_count ++;
|
||||
op->operands[operand].shift_amount = r_num_math (NULL, token + 4);
|
||||
if (op->operands[operand].shift_amount > 63) {
|
||||
return false;
|
||||
}
|
||||
operand ++;
|
||||
token = next;
|
||||
continue;
|
||||
}
|
||||
|
||||
switch (token[0]) {
|
||||
case 'x':
|
||||
x = strchr (token, ',');
|
||||
@ -481,12 +771,18 @@ static bool parseOperands(char* str, ArmOp *op) {
|
||||
op->operands[operand].type = ARM_GPR;
|
||||
op->operands[operand].reg_type = ARM_REG64;
|
||||
op->operands[operand].reg = r_num_math (NULL, token + 1);
|
||||
if (op->operands[operand].reg > 31) {
|
||||
return false;
|
||||
}
|
||||
break;
|
||||
case 'w':
|
||||
op->operands_count ++;
|
||||
op->operands[operand].type = ARM_GPR;
|
||||
op->operands[operand].reg_type = ARM_REG32;
|
||||
op->operands[operand].reg = r_num_math (NULL, token + 1);
|
||||
if (op->operands[operand].reg > 31) {
|
||||
return false;
|
||||
}
|
||||
break;
|
||||
case 'v':
|
||||
op->operands_count ++;
|
||||
@ -506,7 +802,7 @@ static bool parseOperands(char* str, ArmOp *op) {
|
||||
op->operands_count ++;
|
||||
op->operands[operand].type = ARM_GPR;
|
||||
op->operands[operand].reg_type = ARM_SP | ARM_REG64;
|
||||
op->operands[operand].reg = r_num_math (NULL, token + 1);
|
||||
op->operands[operand].reg = 31;
|
||||
break;
|
||||
}
|
||||
mem_opt = get_mem_option (token);
|
||||
@ -544,6 +840,7 @@ static bool parseOperands(char* str, ArmOp *op) {
|
||||
break;
|
||||
}
|
||||
token = next;
|
||||
|
||||
operand ++;
|
||||
if (operand > MAX_OPERANDS) {
|
||||
free (t);
|
||||
@ -571,13 +868,57 @@ static bool parseOpcode(const char *str, ArmOp *op) {
|
||||
bool arm64ass(const char *str, ut64 addr, ut32 *op) {
|
||||
ArmOp ops = {0};
|
||||
if (!parseOpcode (str, &ops)) {
|
||||
return -1;
|
||||
return false;
|
||||
}
|
||||
/* TODO: write tests for this and move out the regsize logic into the mov */
|
||||
if (!strncmp (str, "mov", 3)) {
|
||||
*op = mov (&ops);
|
||||
return *op != -1;
|
||||
}
|
||||
if (!strncmp (str, "cmp", 3)) {
|
||||
*op = cmp (&ops);
|
||||
return *op != -1;
|
||||
}
|
||||
if (!strncmp (str, "ldrb", 4)) {
|
||||
*op = bytelsop (&ops, 0x00004039);
|
||||
return *op != -1;
|
||||
}
|
||||
if (!strncmp (str, "ldrh", 4)) {
|
||||
*op = bytelsop (&ops, 0x00004078);
|
||||
return *op != -1;
|
||||
}
|
||||
if (!strncmp (str, "ldrsh", 5)) {
|
||||
*op = bytelsop (&ops, 0x0000c078);
|
||||
return *op != -1;
|
||||
}
|
||||
if (!strncmp (str, "ldrsw", 5)) {
|
||||
*op = bytelsop (&ops, 0x000080b8);
|
||||
return *op != -1;
|
||||
}
|
||||
if (!strncmp (str, "ldrsb", 5)) {
|
||||
*op = bytelsop (&ops, 0x0000c039);
|
||||
return *op != -1;
|
||||
}
|
||||
if (!strncmp (str, "strb", 4)) {
|
||||
*op = bytelsop (&ops, 0x00000039);
|
||||
return *op != -1;
|
||||
}
|
||||
if (!strncmp (str, "strh", 4)) {
|
||||
*op = bytelsop (&ops, 0x00000078);
|
||||
return *op != -1;
|
||||
}
|
||||
if (!strncmp (str, "ldr", 3)) {
|
||||
*op = reglsop (&ops, 0x000040f8);
|
||||
return *op != -1;
|
||||
}
|
||||
if (!strncmp (str, "stur", 4)) {
|
||||
*op = sturop (&ops, 0x000000f8);
|
||||
return *op != -1;
|
||||
}
|
||||
if (!strncmp (str, "str", 3)) {
|
||||
*op = reglsop (&ops, 0x000000f8);
|
||||
return *op != -1;
|
||||
}
|
||||
if (!strncmp (str, "sub", 3)) { // w
|
||||
*op = arithmetic (&ops, 0xd1);
|
||||
return *op != -1;
|
||||
@ -591,7 +932,7 @@ bool arm64ass(const char *str, ut64 addr, ut32 *op) {
|
||||
return *op != -1;
|
||||
}
|
||||
if (!strncmp (str, "adrp x", 6)) {
|
||||
*op = adrp (&ops, addr, 0x000000d0);
|
||||
*op = adrp (&ops, addr, 0x00000090);
|
||||
return *op != -1;
|
||||
}
|
||||
if (!strcmp (str, "nop")) {
|
||||
@ -642,6 +983,14 @@ bool arm64ass(const char *str, ut64 addr, ut32 *op) {
|
||||
*op = branch (&ops, addr, 0x14);
|
||||
return *op != -1;
|
||||
}
|
||||
if (!strncmp (str, "b.eq ", 5)) {
|
||||
*op = bdot (&ops, addr, 0x00000054);
|
||||
return *op != -1;
|
||||
}
|
||||
if (!strncmp (str, "b.hs ", 5)) {
|
||||
*op = bdot (&ops, addr, 0x02000054);
|
||||
return *op != -1;
|
||||
}
|
||||
if (!strncmp (str, "bl ", 3)) {
|
||||
*op = branch (&ops, addr, 0x94);
|
||||
return *op != -1;
|
||||
|
||||
Loading…
Reference in New Issue
Block a user