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Add linting to spot misuses of r_strbuf_appendf and fix them all ##refactor

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pancake 2022-09-09 22:54:55 +02:00 committed by pancake
parent 8a2843bede
commit 6db7d19e72
25 changed files with 236 additions and 230 deletions
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4
libr/anal/arch/loongarch/gnu/loongarch-dis.c
View File

@ -96,9 +96,9 @@ static int32_t dis_one_arg(char esc1, char esc2, const char *bit_field, const ch
r_strbuf_appendf (args_buf, " %d", imm);
} else {
abs_imm = abs (imm);
r_strbuf_appendf (args_buf, " ");
r_strbuf_append (args_buf, " ");
if (abs_imm != imm) {
r_strbuf_appendf (args_buf, "-");
r_strbuf_append (args_buf, "-");
}
r_strbuf_appendf (args_buf, "0x%x", abs_imm);
}

2
libr/anal/dwarf_process.c
View File

@ -1362,7 +1362,7 @@ static st32 parse_function_args_and_vars(Context *ctx, ut64 idx, RStrBuf *args,
r_strbuf_fini (&type);
}
} else if (child_depth == 1 && child_die->tag == DW_TAG_unspecified_parameters) {
r_strbuf_appendf (args, "va_args ...,");
r_strbuf_append (args, "va_args ...,");
}
if (child_die->has_children) {
child_depth++;

183
libr/anal/p/anal_arm_v35.c
View File

@ -428,61 +428,61 @@ const char* v35arm_prefix_cond(RAnalOp *op, Condition cond_type) {
switch (cond_type) {
case COND_EQ:
close_type = 1;
r_strbuf_appendf (&op->esil, "zf,?{,");
r_strbuf_append (&op->esil, "zf,?{,");
break;
case COND_NE:
close_type = 1;
r_strbuf_appendf (&op->esil, "zf,!,?{,");
r_strbuf_append (&op->esil, "zf,!,?{,");
break;
case COND_CS:
close_type = 1;
r_strbuf_appendf (&op->esil, "cf,?{,");
r_strbuf_append (&op->esil, "cf,?{,");
break;
case COND_CC:
close_type = 1;
r_strbuf_appendf (&op->esil, "cf,!,?{,");
r_strbuf_append (&op->esil, "cf,!,?{,");
break;
case COND_MI:
close_type = 1;
r_strbuf_appendf (&op->esil, "nf,?{,");
r_strbuf_append (&op->esil, "nf,?{,");
break;
case COND_PL:
close_type = 1;
r_strbuf_appendf (&op->esil, "nf,!,?{,");
r_strbuf_append (&op->esil, "nf,!,?{,");
break;
case COND_VS:
close_type = 1;
r_strbuf_appendf (&op->esil, "vf,?{,");
r_strbuf_append (&op->esil, "vf,?{,");
break;
case COND_VC:
close_type = 1;
r_strbuf_appendf (&op->esil, "vf,!,?{,");
r_strbuf_append (&op->esil, "vf,!,?{,");
break;
case COND_HI:
close_type = 1;
r_strbuf_appendf (&op->esil, "cf,zf,!,&,?{,");
r_strbuf_append (&op->esil, "cf,zf,!,&,?{,");
break;
case COND_LS:
close_type = 1;
r_strbuf_appendf (&op->esil, "cf,!,zf,|,?{,");
r_strbuf_append (&op->esil, "cf,!,zf,|,?{,");
break;
case COND_GE:
close_type = 1;
r_strbuf_appendf (&op->esil, "nf,vf,^,!,?{,");
r_strbuf_append (&op->esil, "nf,vf,^,!,?{,");
break;
case COND_LT:
close_type = 1;
r_strbuf_appendf (&op->esil, "nf,vf,^,?{,");
r_strbuf_append (&op->esil, "nf,vf,^,?{,");
break;
case COND_GT:
// zf == 0 && nf == vf
close_type = 1;
r_strbuf_appendf (&op->esil, "zf,!,nf,vf,^,!,&,?{,");
r_strbuf_append (&op->esil, "zf,!,nf,vf,^,!,&,?{,");
break;
case COND_LE:
// zf == 1 || nf != vf
close_type = 1;
r_strbuf_appendf (&op->esil, "zf,nf,vf,^,|,?{,");
r_strbuf_append (&op->esil, "zf,nf,vf,^,|,?{,");
break;
case COND_AL:
// always executed
@ -534,36 +534,37 @@ static ut64 shifted_imm64(Instruction *insn, int n, int sz) {
InstructionOperand op = INSOP64 (n);
int sft = op.shiftValue;
switch (op.shiftType) {
case ShiftType_MSL:
return (GETIMM64 (n) << sft) | ((1 << sft) - 1);
case ShiftType_LSL:
return GETIMM64 (n) << sft;
case ShiftType_LSR:
return GETIMM64 (n) >> sft;
case ShiftType_ROR:
return (GETIMM64 (n) >> sft)|(GETIMM64 (n) << (sz - sft));
case ShiftType_ASR:
switch (sz) {
case 8:
return (st8)GETIMM64 (n) >> sft;
case 16:
return (st16)GETIMM64 (n) >> sft;
case 32:
return (st32)GETIMM64 (n) >> sft;
case 64:
default:
return (st64)GETIMM64 (n) >> sft;
}
case ShiftType_MSL:
return (GETIMM64 (n) << sft) | ((1 << sft) - 1);
case ShiftType_LSL:
return GETIMM64 (n) << sft;
case ShiftType_LSR:
return GETIMM64 (n) >> sft;
case ShiftType_ROR:
return (GETIMM64 (n) >> sft)|(GETIMM64 (n) << (sz - sft));
case ShiftType_ASR:
switch (sz) {
case 8:
return (st8)GETIMM64 (n) >> sft;
case 16:
return (st16)GETIMM64 (n) >> sft;
case 32:
return (st32)GETIMM64 (n) >> sft;
case 64:
default:
return GETIMM64 (n);
return (st64)GETIMM64 (n) >> sft;
}
default:
return GETIMM64 (n);
}
}
#define DECODE_SHIFT64(x) decode_shift_64(insn->operands[x].shiftType)
#define ARG64_APPEND(sb, n) arg64_append(sb, insn, n, -1, 0)
#define ARG64_SIGN_APPEND(sb, n, s) arg64_append(sb,insn, n, -1, s)
#define VECARG64_APPEND(sb, n, i, s) arg64_append(sb, insn, n, i, s)
#define COMMA(sb) r_strbuf_appendf (sb, ",")
#define COMMA(sb) r_strbuf_append (sb, ",")
// #define VEC64(n) insn->detail->arm64.operands[n].vess
#define VEC64_APPEND(sb, n, i) vector64_append(sb, insn, n, i)
@ -638,7 +639,7 @@ static void arg64_append(RStrBuf *sb, Instruction *insn, int n, int i, int sign)
InstructionOperand op = INSOP64 (n);
int size = 64;
if (ISREG64 (n)) {
size = REGSIZE64 (n)*8;
size = REGSIZE64 (n) * 8;
}
const char *rn;
@ -681,7 +682,7 @@ static void arg64_append(RStrBuf *sb, Instruction *insn, int n, int i, int sign)
r_strbuf_appendf (sb, ",%s", DECODE_SHIFT64 (n));
}
if (signext) {
r_strbuf_appendf (sb, ",~");
r_strbuf_append (sb, ",~");
}
}
@ -700,25 +701,25 @@ static void arm64math(RAnal *a, RAnalOp *op, ut64 addr, const ut8 *buf, int len,
for (i = 0; i < end; i++) {
VECARG64_APPEND (&op->esil, 2, i, sign);
if (negate) {
r_strbuf_appendf (&op->esil, ",-1,^");
r_strbuf_append (&op->esil, ",-1,^");
}
COMMA (&op->esil);
VECARG64_APPEND (&op->esil, 1, i, sign);
r_strbuf_appendf (&op->esil, ",%s,", opchar);
VEC64_DST_APPEND (&op->esil, 0, i);
r_strbuf_appendf (&op->esil, ",=");
if (i < end-1) COMMA (&op->esil);
r_strbuf_append (&op->esil, ",=");
if (i < end - 1) COMMA (&op->esil);
}
} else {
VECARG64_APPEND(&op->esil, c+1, -1, sign);
if (negate) {
r_strbuf_appendf (&op->esil, ",-1,^");
r_strbuf_append (&op->esil, ",-1,^");
}
COMMA (&op->esil);
VECARG64_APPEND (&op->esil, c, -1, sign);
r_strbuf_appendf (&op->esil, ",%s,", opchar);
VEC64_DST_APPEND (&op->esil, 0, -1);
r_strbuf_appendf (&op->esil, ",=");
r_strbuf_append (&op->esil, ",=");
}
}
@ -727,9 +728,8 @@ static void arm64math(RAnal *a, RAnalOp *op, ut64 addr, const ut8 *buf, int len,
// floating point math instruction helper
static void arm64fpmath(RAnal *a, RAnalOp *op, ut64 addr, const ut8 *buf, int len, Instruction *insn, const char *opchar, int negate) {
int i, size = REGSIZE64 (1)*8;
InstructionOperand dst = INSOP64 (0);
int i, size = REGSIZE64 (1)*8;
int start = -1;
int end = 0;
int convert = size == 64 ? 0 : 1;
@ -738,13 +738,16 @@ static void arm64fpmath(RAnal *a, RAnalOp *op, ut64 addr, const ut8 *buf, int le
start = 0;
end = count;
}
for (i = start; i < end; i++) {
if (convert) r_strbuf_appendf (&op->esil, "%d,DUP,", size);
if (convert) {
r_strbuf_appendf (&op->esil, "%d,DUP,", size);
}
VEC64_APPEND (&op->esil, 2, i);
if (convert) r_strbuf_appendf (&op->esil, ",F2D");
if (convert) {
r_strbuf_append (&op->esil, ",F2D");
}
if (negate) {
r_strbuf_appendf (&op->esil, ",-F");
r_strbuf_append (&op->esil, ",-F");
}
if (convert) r_strbuf_appendf (&op->esil, ",%d", size);
COMMA (&op->esil);
@ -755,8 +758,10 @@ static void arm64fpmath(RAnal *a, RAnalOp *op, ut64 addr, const ut8 *buf, int le
r_strbuf_appendf (&op->esil, ",F%s,", opchar);
}
VEC64_DST_APPEND (&op->esil, 0, i);
r_strbuf_appendf (&op->esil, ",=");
if (i < end-1) COMMA (&op->esil);
r_strbuf_append (&op->esil, ",=");
if (i < end-1) {
COMMA (&op->esil);
}
}
}
@ -1451,7 +1456,7 @@ static int analop_esil(RAnal *a, RAnalOp *op, ut64 addr, const ut8 *buf, int len
OPCALL(">>>");
break;
case ARM64_NOP:
r_strbuf_setf (&op->esil, ",");
r_strbuf_set (&op->esil, ",");
break;
case ARM64_MOV:
case ARM64_MOVI:
@ -1462,9 +1467,9 @@ static int analop_esil(RAnal *a, RAnalOp *op, ut64 addr, const ut8 *buf, int len
REG64 (1), REG64 (0), REG64 (1), REG64 (0));
} else {
ARG64_APPEND (&op->esil, 1);
r_strbuf_appendf (&op->esil, ",");
r_strbuf_append (&op->esil, ",");
VEC64_DST_APPEND (&op->esil, 0, -1);
r_strbuf_appendf (&op->esil, ",=");
r_strbuf_append (&op->esil, ",=");
}
break;
}
@ -1493,10 +1498,10 @@ static int analop_esil(RAnal *a, RAnalOp *op, ut64 addr, const ut8 *buf, int len
}
if (insn->operation == ARM64_FCCMP || insn->operation == ARM64_FCCMPE) {
r_strbuf_appendf (&op->esil, ",");
r_strbuf_append (&op->esil, ",");
//arm_prefix_cond(op, insn->operands[1].cond);
r_strbuf_appendf (&op->esil, "}{,pstate,1,28,1,<<,-,&,0x%"PFMT64x",|,pstate,:=",
GETIMM64(2) << 28);
GETIMM64 (2) << 28);
}
break;
case ARM64_FCVT:
@ -1506,16 +1511,16 @@ static int analop_esil(RAnal *a, RAnalOp *op, ut64 addr, const ut8 *buf, int len
case ARM64_SCVTF:
r_strbuf_setf (&op->esil, "%d,", REGBITS64 (0));
ARG64_SIGN_APPEND(&op->esil, 1, REGBITS64 (1));
r_strbuf_appendf (&op->esil, ",I2D,D2F,");
r_strbuf_append (&op->esil, ",I2D,D2F,");
VEC64_DST_APPEND(&op->esil, 0, -1);
r_strbuf_appendf (&op->esil, ",=");
r_strbuf_append (&op->esil, ",=");
break;
case ARM64_UCVTF:
r_strbuf_setf (&op->esil, "%d,", REGBITS64 (0));
ARG64_APPEND(&op->esil, 1);
r_strbuf_appendf (&op->esil, ",U2D,D2F,");
r_strbuf_append (&op->esil, ",U2D,D2F,");
VEC64_DST_APPEND(&op->esil, 0, -1);
r_strbuf_appendf (&op->esil, ",=");
r_strbuf_append (&op->esil, ",=");
break;
case ARM64_FCVTAU:
case ARM64_FCVTAS:
@ -1530,10 +1535,10 @@ static int analop_esil(RAnal *a, RAnalOp *op, ut64 addr, const ut8 *buf, int len
// TODO: unsigned int won't be right, idk entirely what it even means
// also the rounding mode... idk i hate floats
r_strbuf_setf (&op->esil, "%d,", REGBITS64 (1));
ARG64_APPEND(&op->esil, 1);
r_strbuf_appendf (&op->esil, ",F2D,D2I,");
VEC64_DST_APPEND(&op->esil, 0, -1);
r_strbuf_appendf (&op->esil, ",=");
ARG64_APPEND (&op->esil, 1);
r_strbuf_append (&op->esil, ",F2D,D2I,");
VEC64_DST_APPEND (&op->esil, 0, -1);
r_strbuf_append (&op->esil, ",=");
break;
case ARM64_FRINTA:
case ARM64_FRINTI:
@ -1557,7 +1562,7 @@ static int analop_esil(RAnal *a, RAnalOp *op, ut64 addr, const ut8 *buf, int len
ARG64_APPEND(&op->esil, 1);
r_strbuf_appendf (&op->esil, ",F2D,%s,D2F,", rounder);
VEC64_DST_APPEND(&op->esil, 0, -1);
r_strbuf_appendf (&op->esil, ",=");
r_strbuf_append (&op->esil, ",=");
break;
}
case ARM64_FABS:
@ -1627,14 +1632,14 @@ static int analop_esil(RAnal *a, RAnalOp *op, ut64 addr, const ut8 *buf, int len
// arm64 does not have a div-by-zero exception, just quietly sets R0 to 0
r_strbuf_setf (&op->esil, "%s,!,?{,0,%s,=,}{,", REG64 (2), REG64 (0));
OPCALL_SIGN ("~/", REGBITS64 (1));
r_strbuf_appendf (&op->esil, ",}");
r_strbuf_append (&op->esil, ",}");
break;
case ARM64_UDIV:
/* TODO: support WZR XZR to specify 32, 64bit op */
// arm64 does not have a div-by-zero exception, just quietly sets R0 to 0
r_strbuf_setf (&op->esil, "%s,!,?{,0,%s,=,}{,", REG64 (2), REG64 (0));
OPCALL("/");
r_strbuf_appendf (&op->esil, ",}");
OPCALL ("/");
r_strbuf_append (&op->esil, ",}");
break;
// TODO actually implement some kind of fake PAC or at least clear the bits
// PAC B* instructions will not work without clearing PAC bits
@ -1674,46 +1679,46 @@ static int analop_esil(RAnal *a, RAnalOp *op, ut64 addr, const ut8 *buf, int len
case ARM64_B_VS:
switch (insn->operation) {
case ARM64_B_CC:
v35arm_prefix_cond(op, COND_CC);
v35arm_prefix_cond (op, COND_CC);
break;
case ARM64_B_CS:
v35arm_prefix_cond(op, COND_CS);
v35arm_prefix_cond (op, COND_CS);
break;
case ARM64_B_EQ:
v35arm_prefix_cond(op, COND_EQ);
v35arm_prefix_cond (op, COND_EQ);
break;
case ARM64_B_GE:
v35arm_prefix_cond(op, COND_GE);
v35arm_prefix_cond (op, COND_GE);
break;
case ARM64_B_GT:
v35arm_prefix_cond(op, COND_GT);
v35arm_prefix_cond (op, COND_GT);
break;
case ARM64_B_HI:
v35arm_prefix_cond(op, COND_HI);
v35arm_prefix_cond (op, COND_HI);
break;
case ARM64_B_LE:
v35arm_prefix_cond(op, COND_LE);
v35arm_prefix_cond (op, COND_LE);
break;
case ARM64_B_LS:
v35arm_prefix_cond(op, COND_LS);
v35arm_prefix_cond (op, COND_LS);
break;
case ARM64_B_LT:
v35arm_prefix_cond(op, COND_LT);
v35arm_prefix_cond (op, COND_LT);
break;
case ARM64_B_MI:
v35arm_prefix_cond(op, COND_MI);
v35arm_prefix_cond (op, COND_MI);
break;
case ARM64_B_NE:
v35arm_prefix_cond(op, COND_NE);
v35arm_prefix_cond (op, COND_NE);
break;
case ARM64_B_PL:
v35arm_prefix_cond(op, COND_PL);
v35arm_prefix_cond (op, COND_PL);
break;
case ARM64_B_VC:
v35arm_prefix_cond(op, COND_VC);
v35arm_prefix_cond (op, COND_VC);
break;
case ARM64_B_VS:
v35arm_prefix_cond(op, COND_VS);
v35arm_prefix_cond (op, COND_VS);
break;
default:
// unhandled
@ -1841,7 +1846,7 @@ static int analop_esil(RAnal *a, RAnalOp *op, ut64 addr, const ut8 *buf, int len
if (ISPREINDEX32 () || ISPOSTINDEX32 ()) {
r_strbuf_appendf (&op->esil, ",DUP,tmp,=");
r_strbuf_append (&op->esil, ",DUP,tmp,=");
}
// I assume the DUPs here previously were to handle preindexing
@ -1987,7 +1992,7 @@ static int analop_esil(RAnal *a, RAnalOp *op, ut64 addr, const ut8 *buf, int len
REGBITS64 (0) - 1, REGBITS64 (0), REGBITS64 (0) -1);
if (insn->operation == ARM64_CCMP || insn->operation == ARM64_CCMN) {
r_strbuf_appendf (&op->esil, ",");
r_strbuf_append (&op->esil, ",");
v35arm_prefix_cond(op, insn->operands[3].cond);
r_strbuf_appendf (&op->esil, "}{,pstate,1,28,1,<<,-,&,28,%"PFMT64u",<<,|,pstate,:=", GETIMM64 (2));
}
@ -2001,7 +2006,7 @@ static int analop_esil(RAnal *a, RAnalOp *op, ut64 addr, const ut8 *buf, int len
REGBITS64 (0) - 1, REGBITS64 (0), REGBITS64 (0) -1);
if (insn->operation == ARM64_CCMN) {
r_strbuf_appendf (&op->esil, ",");
r_strbuf_append (&op->esil, ",");
v35arm_prefix_cond(op, insn->operands[3].cond);
r_strbuf_appendf (&op->esil, "}{,pstate,1,28,1,<<,-,&,28,%"PFMT64u",<<,|,pstate,:=", GETIMM64 (2));
}
@ -2330,9 +2335,9 @@ static int analop_esil(RAnal *a, RAnalOp *op, ut64 addr, const ut8 *buf, int len
REG64 (1), REG64 (0), REG64 (1), REG64 (0));
} else {
ARG64_APPEND (&op->esil, 1);
r_strbuf_appendf (&op->esil, ",-1,^,");
r_strbuf_append (&op->esil, ",-1,^,");
VEC64_DST_APPEND (&op->esil, 0, -1);
r_strbuf_appendf (&op->esil, ",=");
r_strbuf_append (&op->esil, ",=");
}
break;
}
@ -2413,12 +2418,12 @@ static int analop_esil(RAnal *a, RAnalOp *op, ut64 addr, const ut8 *buf, int len
case ARM64_RETAA:
case ARM64_RETAB:
case ARM64_RET:
r_strbuf_setf (&op->esil, "lr,pc,=");
r_strbuf_set (&op->esil, "lr,pc,=");
break;
case ARM64_ERETAA:
case ARM64_ERETAB:
case ARM64_ERET:
r_strbuf_setf (&op->esil, "lr,pc,=");
r_strbuf_set (&op->esil, "lr,pc,=");
break;
case ARM64_BFI: // bfi w8, w8, 2, 1
case ARM64_BFXIL:

84
libr/anal/p/anal_h8300.c
View File

@ -12,17 +12,17 @@
#define emit(frag) r_strbuf_appendf(&op->esil, frag)
#define emitf(...) r_strbuf_appendf(&op->esil, __VA_ARGS__)
//setting the appropriate flags, NOTE: semicolon included
#define setZ r_strbuf_appendf(&op->esil, ",$z,Z,:=") //zero flag
#define setN r_strbuf_appendf(&op->esil, ",15,$s,N,=") //negative(sign) flag
#define setZ r_strbuf_append (&op->esil, ",$z,Z,:=") //zero flag
#define setN r_strbuf_append (&op->esil, ",15,$s,N,=") //negative(sign) flag
#define setV(val) r_strbuf_appendf(&op->esil, ",%s,V,=", val) //overflow flag
#define setC_B r_strbuf_appendf(&op->esil, ",7,$c,C,:=") //carry flag for byte op
#define setC_W r_strbuf_appendf(&op->esil, ",15,$c,C,:=") //carryflag for word op
#define setCb_B r_strbuf_appendf(&op->esil, ",7,$b,C,:=") //borrow flag for byte
#define setCb_W r_strbuf_appendf(&op->esil, ",15,$b,C,:=") //borrow flag for word
#define setH_B r_strbuf_appendf(&op->esil, ",3,$c,H,:=") //half carry(byte)-bcd
#define setH_W r_strbuf_appendf(&op->esil, ",11,$c,H,:=") //half carry(word)-bcd
#define setHb_B r_strbuf_appendf(&op->esil, ",3,$b,H,:=") //half borrow(byte)-bcd
#define setHb_W r_strbuf_appendf(&op->esil, ",11,$b,H,:=") //halfborrow(word)-bcd
#define setC_B r_strbuf_append (&op->esil, ",7,$c,C,:=") //carry flag for byte op
#define setC_W r_strbuf_append (&op->esil, ",15,$c,C,:=") //carryflag for word op
#define setCb_B r_strbuf_append (&op->esil, ",7,$b,C,:=") //borrow flag for byte
#define setCb_W r_strbuf_append (&op->esil, ",15,$b,C,:=") //borrow flag for word
#define setH_B r_strbuf_append (&op->esil, ",3,$c,H,:=") //half carry(byte)-bcd
#define setH_W r_strbuf_append (&op->esil, ",11,$c,H,:=") //half carry(word)-bcd
#define setHb_B r_strbuf_append (&op->esil, ",3,$b,H,:=") //half borrow(byte)-bcd
#define setHb_W r_strbuf_append (&op->esil, ",11,$b,H,:=") //halfborrow(word)-bcd
//get reg. from opcodes
#define rs() (buf[1]&0x70)>>4 //upper nibble used as source generally
@ -370,53 +370,53 @@ static int analop_esil(RAnal *a, RAnalOp *op, ut64 addr, const ut8 *buf) {
r_strbuf_appendf(&op->esil, "0x%02x,pc,+=", buf[1]);
return 0;
case H8300_BRN:
r_strbuf_appendf(&op->esil,",");
r_strbuf_append (&op->esil,",");
return 0;
case H8300_BHI:
r_strbuf_appendf(&op->esil, "C,Z,|,!,?{0x%02x,pc,+=}", buf[1]);
r_strbuf_appendf (&op->esil, "C,Z,|,!,?{0x%02x,pc,+=}", buf[1]);
return 0;
case H8300_BLS:
r_strbuf_appendf(&op->esil, "C,Z,|,?{0x%02x,pc,+=}", buf[1]);
r_strbuf_appendf (&op->esil, "C,Z,|,?{0x%02x,pc,+=}", buf[1]);
return 0;
case H8300_BCC:
r_strbuf_appendf(&op->esil, "C,!,?{0x%02x,pc,+=}", buf[1]);
r_strbuf_appendf (&op->esil, "C,!,?{0x%02x,pc,+=}", buf[1]);
return 0;
case H8300_BCS:
r_strbuf_appendf(&op->esil, "C,?{0x%02x,pc,+=}", buf[1]);
r_strbuf_appendf (&op->esil, "C,?{0x%02x,pc,+=}", buf[1]);
return 0;
case H8300_BNE:
r_strbuf_appendf(&op->esil, "Z,!,?{0x%02x,pc,+=}", buf[1]);
r_strbuf_appendf (&op->esil, "Z,!,?{0x%02x,pc,+=}", buf[1]);
return 0;
case H8300_BEQ:
r_strbuf_appendf(&op->esil, "Z,?{0x%02x,pc,+=}", buf[1]);
r_strbuf_appendf (&op->esil, "Z,?{0x%02x,pc,+=}", buf[1]);
return 0;
case H8300_BVC:
r_strbuf_appendf(&op->esil, "V,!,?{0x%02x,pc,+=}", buf[1]);
r_strbuf_appendf (&op->esil, "V,!,?{0x%02x,pc,+=}", buf[1]);
return 0;
case H8300_BVS:
r_strbuf_appendf(&op->esil, "V,?{0x%02x,pc,+=}", buf[1]);
r_strbuf_appendf (&op->esil, "V,?{0x%02x,pc,+=}", buf[1]);
return 0;
case H8300_BPL:
r_strbuf_appendf(&op->esil, "N,!,?{0x%02x,pc,+=}", buf[1]);
r_strbuf_appendf (&op->esil, "N,!,?{0x%02x,pc,+=}", buf[1]);
return 0;
case H8300_BMI:
r_strbuf_appendf(&op->esil, "N,?{0x%02x,pc,+=}", buf[1]);
r_strbuf_appendf (&op->esil, "N,?{0x%02x,pc,+=}", buf[1]);
return 0;
case H8300_BGE:
r_strbuf_appendf(&op->esil, "N,V,^,!,?{0x%02x,pc,+=}", buf[1]);
r_strbuf_appendf (&op->esil, "N,V,^,!,?{0x%02x,pc,+=}", buf[1]);
return 0;
case H8300_BLT:
r_strbuf_appendf(&op->esil, "N,V,^,?{0x%02x,pc,+=}", buf[1]);
r_strbuf_appendf (&op->esil, "N,V,^,?{0x%02x,pc,+=}", buf[1]);
return 0;
case H8300_BGT:
r_strbuf_appendf(&op->esil, "Z,N,V,^,|,!,?{0x%02x,pc,+=}", buf[1]);
r_strbuf_appendf (&op->esil, "Z,N,V,^,|,!,?{0x%02x,pc,+=}", buf[1]);
return 0;
case H8300_BLE:
r_strbuf_appendf(&op->esil, "Z,N,V,^,|,?{0x%02x,pc,+=}", buf[1]);
r_strbuf_appendf (&op->esil, "Z,N,V,^,|,?{0x%02x,pc,+=}", buf[1]);
return 0;
case H8300_MULXU:
//Refer to pg. 100 of the manual linked at the beginning
r_strbuf_appendf(&op->esil, "r%u%c,r%ul,*,r%u,=",
r_strbuf_appendf (&op->esil, "r%u%c,r%ul,*,r%u,=",
rsB(), rd(), rd());
return 0;
case H8300_DIVXU: /*TODO*/ return 0;
@ -433,24 +433,24 @@ static int analop_esil(RAnal *a, RAnalOp *op, ut64 addr, const ut8 *buf) {
//NOTE - cases marked with TODO have mem. access also(not impl.)
case H8300_BSET_1: /*TODO*/
//set rs&0x7th bit of rd. expr.- rd|= 1<<(rs&0x07)
r_strbuf_appendf(&op->esil, "0x7,r%u%c,&,1,<<,r%u%c,|=", rsB(), rdB(1));
r_strbuf_appendf (&op->esil, "0x7,r%u%c,&,1,<<,r%u%c,|=", rsB(), rdB(1));
return 0;
case H8300_BNOT_1: /*TODO*/
//invert rs&0x7th bit of rd. expr.- rd^= 1<<(rs&0x07)
r_strbuf_appendf(&op->esil,"0x07,r%u%c,&,1,<<,r%u%c,^=", rsB(), rdB(1));
r_strbuf_appendf (&op->esil,"0x07,r%u%c,&,1,<<,r%u%c,^=", rsB(), rdB(1));
return 0;
case H8300_BCLR_R2R8: /*TODO*/
//clear rs&0x7th bit of rd. expr.- rd&= !(1<<(rs&0x07))
r_strbuf_appendf(&op->esil, "0x7,r%u%c,&,1,<<,!,r%u%c,&=", rsB(), rdB(1));
r_strbuf_appendf (&op->esil, "0x7,r%u%c,&,1,<<,!,r%u%c,&=", rsB(), rdB(1));
return 0;
case H8300_BTST_R2R8: /*TODO*/
//¬ (<Bit No.> of <EAd>) → Z, extract bit value and shift it back
r_strbuf_appendf(&op->esil, "0x7,r%u%c,&,0x7,r%u%c,&,1,<<,r%u%c,&,>>,!,Z,=",
r_strbuf_appendf (&op->esil, "0x7,r%u%c,&,0x7,r%u%c,&,1,<<,r%u%c,&,>>,!,Z,=",
rsB(), rsB(), rdB(1));
return 0;
case H8300_BST_BIST: /*TODO*/
if (!(buf[1] & 0x80)) { //BST
r_strbuf_appendf(&op->esil,"%d,C,<<,r%u%c,|=",rs(),rdB(1));
r_strbuf_appendf (&op->esil,"%d,C,<<,r%u%c,|=",rs(),rdB(1));
} else { //BIST
r_strbuf_appendf (&op->esil, "%d,C,!,<<,r%u%c,|=", rs (), rdB (1));
}
@ -466,25 +466,25 @@ static int analop_esil(RAnal *a, RAnalOp *op, ut64 addr, const ut8 *buf) {
return 0;
case H8300_BSET_2: /*TODO*/
//set imm bit of rd. expr.- rd|= (1<<imm)
r_strbuf_appendf(&op->esil, "%d,1,<<,r%u%c,|=", rs(), rdB(1));
r_strbuf_appendf (&op->esil, "%d,1,<<,r%u%c,|=", rs(), rdB(1));
return 0;
case H8300_BNOT_2: /*TODO*/
//inv. imm bit of rd. expr.- rd^= (1<<imm)
r_strbuf_appendf(&op->esil,"%d,1,<<,r%u%c,^=",rs(),rdB(1));
r_strbuf_appendf (&op->esil,"%d,1,<<,r%u%c,^=",rs(),rdB(1));
return 0;
case H8300_BCLR_IMM2R8:
//clear imm bit of rd. expr.- rd&= !(1<<imm)
r_strbuf_appendf(&op->esil, "%d,1,<<,!,r%u%c,&=", rs(), rdB(1));
r_strbuf_appendf (&op->esil, "%d,1,<<,!,r%u%c,&=", rs(), rdB(1));
return 0;
case H8300_BTST: /*TODO*/
//see BTST above
r_strbuf_appendf(&op->esil, "%d,%d,1,<<,r%u%c,&,>>,!,Z,=",
r_strbuf_appendf (&op->esil, "%d,%d,1,<<,r%u%c,&,>>,!,Z,=",
rs(), rs(), rdB(1));
return 0;
case H8300_BOR_BIOR: /*TODO*/
if (!(buf[1] & 0x80)) { //BOR
//C|=(rd&(1<<imm))>>imm
r_strbuf_appendf(&op->esil, "%d,%d,1,<<,r%u%c,&,>>,C,|=",
r_strbuf_appendf (&op->esil, "%d,%d,1,<<,r%u%c,&,>>,C,|=",
rs(), rs(), rdB(1));
} else { //BIOR
//C|=!(rd&(1<<imm))>>imm
@ -495,7 +495,7 @@ static int analop_esil(RAnal *a, RAnalOp *op, ut64 addr, const ut8 *buf) {
case H8300_BXOR_BIXOR: /*TODO*/
if (!(buf[1] & 0x80)) { //BXOR
//C^=(rd&(1<<imm))>>imm
r_strbuf_appendf(&op->esil, "%d,%d,1,<<,r%u%c,&,>>,C,^=",
r_strbuf_appendf (&op->esil, "%d,%d,1,<<,r%u%c,&,>>,C,^=",
rs(), rs(), rdB(1));
} else { //BIXOR
r_strbuf_appendf (&op->esil, "%d,%d,1,<<,r%u%c,&,>>,!,C,^=",
@ -506,7 +506,7 @@ static int analop_esil(RAnal *a, RAnalOp *op, ut64 addr, const ut8 *buf) {
/*TODO check functionality*/
//C&=(rd&(1<<imm))>>imm
if (!(buf[1] & 0x80)) { //BAND
r_strbuf_appendf(&op->esil, "%d,%d,1,<<,r%u%c,&,>>,C,&=",
r_strbuf_appendf (&op->esil, "%d,%d,1,<<,r%u%c,&,>>,C,&=",
rs(), rs(), rdB(1));
} else { //BIAND
r_strbuf_appendf (&op->esil, "%d,%d,1,<<,r%u%c,&,>>,!,C,&=",
@ -516,7 +516,7 @@ static int analop_esil(RAnal *a, RAnalOp *op, ut64 addr, const ut8 *buf) {
case H8300_BILD_IMM2R8:
/*TODO*/
if (!(buf[1] & 0x80)) { //BLD
r_strbuf_appendf(&op->esil, "%d,%d,1,<<,r%u%c,&,>>,C,=",
r_strbuf_appendf (&op->esil, "%d,%d,1,<<,r%u%c,&,>>,C,=",
rs(), rs(), rdB(1));
} else { //BILD
r_strbuf_appendf (&op->esil, "%d,%d,1,<<,r%u%c,&,>>,!,C,=",
@ -536,9 +536,7 @@ static int analop_esil(RAnal *a, RAnalOp *op, ut64 addr, const ut8 *buf) {
return ret;
}
static int h8300_op(RAnal *anal, RAnalOp *op, ut64 addr,
const ut8 *buf, int len, RAnalOpMask mask)
{
static int h8300_op(RAnal *anal, RAnalOp *op, ut64 addr, const ut8 *buf, int len, RAnalOpMask mask) {
int ret;
ut8 opcode = buf[0];
struct h8300_cmd cmd;
@ -684,7 +682,7 @@ static int h8300_op(RAnal *anal, RAnalOp *op, ut64 addr,
}
static bool set_reg_profile(RAnal *anal) {
char *p =
const char * const p =
"=PC pc\n"
"=SP r7\n"
"=A0 r0\n"

6
libr/anal/p/anal_mips_cs.c
View File

@ -99,7 +99,7 @@ static inline void es_sign_n_64(RAnal *a, RAnalOp *op, const char *arg, int bit)
if (a->config->bits == 64) {
r_strbuf_appendf (&op->esil, ",%d,%s,~,%s,=,", bit, arg, arg);
} else {
r_strbuf_append (&op->esil,",");
r_strbuf_append (&op->esil, ",");
}
}
@ -112,7 +112,7 @@ static inline void es_add_ck(RAnalOp *op, const char *a1, const char *a2, const
#define PROTECT_ZERO() \
if (REG(0)[0] == 'z') {\
r_strbuf_appendf (&op->esil, ",");\
r_strbuf_append (&op->esil, ",");\
} else /**/
#define ESIL_LOAD(size) \
@ -219,7 +219,7 @@ static int analop_esil(RAnal *a, RAnalOp *op, ut64 addr, const ut8 *buf, int len
if (insn) {
switch (insn->id) {
case MIPS_INS_NOP:
r_strbuf_setf (&op->esil, ",");
r_strbuf_set (&op->esil, ",");
break;
case MIPS_INS_BREAK:
r_strbuf_setf (&op->esil, "%"PFMT64d",%" PFMT64d ",TRAP", (st64)IMM (0), (st64)IMM (0));

2
libr/anal/p/anal_mips_gnu.c
View File

@ -777,7 +777,7 @@ static int analop_esil(RAnal *a, RAnalOp *op, ut64 addr, gnu_insn *insn) {
switch (insn->id) {
case MIPS_INS_NOP:
r_strbuf_setf (&op->esil, ",");
r_strbuf_set (&op->esil, ",");
break;
case MIPS_INS_BREAK:
// r_strbuf_setf (&op->esil, "%d,%d,TRAP", IMM (0), IMM (0));

8
libr/anal/p/anal_pic.c
View File

@ -779,7 +779,7 @@ static int anal_pic_pic18_op(RAnal *anal, RAnalOp *op, ut64 addr, const ut8 *buf
case 0xf: //nop
op->type = R_ANAL_OP_TYPE_NOP;
op->cycles = 1;
r_strbuf_setf (&op->esil, ",");
r_strbuf_set (&op->esil, ",");
return op->size;
case 0xc: //movff
if (len < 4) {
@ -980,12 +980,12 @@ static int anal_pic_pic18_op(RAnal *anal, RAnalOp *op, ut64 addr, const ut8 *buf
case 0x13: //return
op->type = R_ANAL_OP_TYPE_RET;
op->cycles = 2;
r_strbuf_setf (&op->esil, "tos,pc,=,");
r_strbuf_set (&op->esil, "tos,pc,=,");
return op->size;
case 0x12: //return
op->type = R_ANAL_OP_TYPE_RET;
op->cycles = 2;
r_strbuf_setf (&op->esil, "tos,pc,=");
r_strbuf_set (&op->esil, "tos,pc,=");
return op->size;
case 0x11: //retfie
case 0x10: //retfie
@ -1012,7 +1012,7 @@ static int anal_pic_pic18_op(RAnal *anal, RAnalOp *op, ut64 addr, const ut8 *buf
case 0x0: //nop
op->type = R_ANAL_OP_TYPE_NOP;
op->cycles = 1;
r_strbuf_setf (&op->esil, ",");
r_strbuf_set (&op->esil, ",");
return op->size;
};
beach:

2
libr/anal/p/anal_riscv_cs.c
View File

@ -152,7 +152,7 @@ static int analop_esil(RAnal *a, RAnalOp *op, ut64 addr, const ut8 *buf, int len
}
switch (insn->id) {
//case RISCV_INS_NOP:
// r_strbuf_setf (&op->esil, ",");
// r_strbuf_set (&op->esil, ",");
// break;
}
}

22
libr/anal/p/anal_sh.c
View File

@ -281,14 +281,14 @@ static int first_nibble_is_0(RAnal* anal, RAnalOp* op, ut16 code) { //STOP
op->type = R_ANAL_OP_TYPE_RET;
op->delay = 1;
op->eob = true;
r_strbuf_setf (&op->esil, "pr,pc,=");
r_strbuf_set (&op->esil, "pr,pc,=");
} else if (IS_RTE (code)) {
op->type = R_ANAL_OP_TYPE_RET;
op->delay = 1;
op->eob = true;
//r_strbuf_setf (&op->esil, "1,SETD,r15,[4],4,+,pc,=,r15,4,+,[4],0xFFF0FFF,&,sr,=,8,r15,+=");
// r_strbuf_set (&op->esil, "1,SETD,r15,[4],4,+,pc,=,r15,4,+,[4],0xFFF0FFF,&,sr,=,8,r15,+=");
//not sure if should be added 4 to pc
r_strbuf_setf (&op->esil, "1,SETD,r15,[4],pc,=,r15,4,+,[4],0xFFF0FFF,&,sr,=,8,r15,+=");
r_strbuf_set (&op->esil, "1,SETD,r15,[4],pc,=,r15,4,+,[4],0xFFF0FFF,&,sr,=,8,r15,+=");
} else if (IS_MOVB_REG_TO_R0REL (code)) { //0000nnnnmmmm0100 mov.b <REG_M>,@(R0,<REG_N>)
op->type = R_ANAL_OP_TYPE_STORE;
op->src[0] = anal_fill_ai_rg (anal, GET_SOURCE_REG (code));
@ -321,19 +321,19 @@ static int first_nibble_is_0(RAnal* anal, RAnalOp* op, ut16 code) { //STOP
r_strbuf_setf (&op->esil, "r0,r%d,+,[4],r%d,=", GET_SOURCE_REG (code), GET_TARGET_REG (code));
} else if (IS_NOP (code)) {
op->type = R_ANAL_OP_TYPE_NOP;
r_strbuf_setf (&op->esil, " ");
r_strbuf_set (&op->esil, " ");
} else if (IS_CLRT (code)) {
op->type = R_ANAL_OP_TYPE_UNK;
r_strbuf_setf (&op->esil, "0xFFFFFFFE,sr,&=");
r_strbuf_set (&op->esil, "0xFFFFFFFE,sr,&=");
} else if (IS_SETT (code)) {
op->type = R_ANAL_OP_TYPE_UNK;
r_strbuf_setf (&op->esil, "0x1,sr,|=");
r_strbuf_set (&op->esil, "0x1,sr,|=");
} else if (IS_CLRMAC (code)) {
op->type = R_ANAL_OP_TYPE_UNK;
r_strbuf_setf (&op->esil, "0,mach,=,0,macl,=");
r_strbuf_set (&op->esil, "0,mach,=,0,macl,=");
} else if (IS_DIV0U (code)) {
op->type = R_ANAL_OP_TYPE_DIV;
r_strbuf_setf (&op->esil, "0xFFFFFCFE,sr,&=");
r_strbuf_set (&op->esil, "0xFFFFFCFE,sr,&=");
} else if (IS_MOVT (code)) {
op->type = R_ANAL_OP_TYPE_MOV;
op->dst = anal_fill_ai_rg (anal, GET_TARGET_REG (code));
@ -345,7 +345,7 @@ static int first_nibble_is_0(RAnal* anal, RAnalOp* op, ut16 code) { //STOP
r_strbuf_setf (&op->esil, "r%d,r%d,*,macl,=", GET_TARGET_REG (code), GET_SOURCE_REG (code));
} else if (IS_SLEEP (code)) {
op->type = R_ANAL_OP_TYPE_UNK;
r_strbuf_setf (&op->esil, "sleep_called,TRAP");
r_strbuf_set (&op->esil, "sleep_called,TRAP");
} else if (IS_STSMACH (code)) { //0000nnnn0000101_ sts MAC*,<REG_N>
op->type = R_ANAL_OP_TYPE_MOV;
op->dst = anal_fill_ai_rg (anal, GET_TARGET_REG (code));
@ -375,7 +375,6 @@ static int first_nibble_is_0(RAnal* anal, RAnalOp* op, ut16 code) { //STOP
default:
r_strbuf_setf (&op->esil, "%s", "");
break;
}
} else if (IS_STSPR (code)) { //0000nnnn00101010 sts PR,<REG_N>
op->type = R_ANAL_OP_TYPE_MOV;
@ -779,7 +778,6 @@ static int movl_rdisp_reg(RAnal* anal, RAnalOp* op, ut16 code) {
return op->size;
}
static int first_nibble_is_6(RAnal* anal, RAnalOp* op, ut16 code) {
if (IS_MOV_REGS (code)) {
op->type = R_ANAL_OP_TYPE_MOV;
@ -820,7 +818,7 @@ static int first_nibble_is_6(RAnal* anal, RAnalOp* op, ut16 code) {
r_strbuf_setf (&op->esil, "r%d,0xFFFF,&,DUP,0x8000,&,?{,0xFFFF0000,|,},r%d,=", GET_SOURCE_REG (code), GET_TARGET_REG (code));
break;
default:
r_strbuf_setf (&op->esil, "TODO,NOT IMPLEMENTED");
r_strbuf_set (&op->esil, "TODO,NOT IMPLEMENTED");
break;
}
} else if (IS_MOVB_POP (code)) {

8
libr/anal/p/anal_v810.c
View File

@ -253,19 +253,19 @@ static int v810_op(RAnal *anal, RAnalOp *op, ut64 addr, const ut8 *buf, int len,
op->type = R_ANAL_OP_TYPE_LOAD;
r_strbuf_appendf (&op->esil, "r%u,%hd,+,[1],r%u,=",
REG1(word1), word2, REG2(word1));
r_strbuf_appendf (&op->esil, ",DUP,0x80,&,?{,0xffffff00,|,}");
r_strbuf_append (&op->esil, ",DUP,0x80,&,?{,0xffffff00,|,}");
break;
case V810_LDH:
op->type = R_ANAL_OP_TYPE_LOAD;
r_strbuf_appendf (&op->esil, "r%u,%hd,+,0xfffffffe,&,[2],r%u,=",
REG1(word1), word2, REG2(word1));
r_strbuf_appendf (&op->esil, ",DUP,0x8000,&,?{,0xffffff00,|,}");
r_strbuf_append (&op->esil, ",DUP,0x8000,&,?{,0xffffff00,|,}");
break;
case V810_LDW:
op->type = R_ANAL_OP_TYPE_LOAD;
r_strbuf_appendf (&op->esil, "r%u,%hd,+,0xfffffffc,&,[4],r%u,=",
REG1(word1), word2, REG2(word1));
r_strbuf_appendf (&op->esil, ",DUP,0x80000000,&,?{,0xffffff00,|,}");
r_strbuf_append (&op->esil, ",DUP,0x80000000,&,?{,0xffffff00,|,}");
break;
case V810_STB:
op->type = R_ANAL_OP_TYPE_STORE;
@ -296,7 +296,7 @@ static int v810_op(RAnal *anal, RAnalOp *op, ut64 addr, const ut8 *buf, int len,
break;
case V810_RETI:
op->type = R_ANAL_OP_TYPE_RET;
//r_strbuf_appendf (&op->esil, "np,?{,fepc,fepsw,}{,eipc,eipsw,},psw,=,pc,=");
// r_strbuf_append (&op->esil, "np,?{,fepc,fepsw,}{,eipc,eipsw,},psw,=,pc,=");
break;
case V810_JAL:
case V810_JR:

20
libr/anal/p/anal_x86_cs.c
View File

@ -688,23 +688,23 @@ static void anop_esil(RAnal *a, RAnalOp *op, ut64 addr, const ut8 *buf, int len,
break;
case X86_INS_STOSB:
if (bits < 32) {
r_strbuf_appendf (&op->esil, "al,di,=[1],df,?{,1,di,-=,},df,!,?{,1,di,+=,}");
r_strbuf_append (&op->esil, "al,di,=[1],df,?{,1,di,-=,},df,!,?{,1,di,+=,}");
} else {
r_strbuf_appendf (&op->esil, "al,edi,=[1],df,?{,1,edi,-=,},df,!,?{,1,edi,+=,}");
r_strbuf_append (&op->esil, "al,edi,=[1],df,?{,1,edi,-=,},df,!,?{,1,edi,+=,}");
}
break;
case X86_INS_STOSW:
if (bits < 32) {
r_strbuf_appendf (&op->esil, "ax,di,=[2],df,?{,2,di,-=,},df,!,?{,2,di,+=,}");
r_strbuf_append (&op->esil, "ax,di,=[2],df,?{,2,di,-=,},df,!,?{,2,di,+=,}");
} else {
r_strbuf_appendf (&op->esil, "ax,edi,=[2],df,?{,2,edi,-=,},df,!,?{,2,edi,+=,}");
r_strbuf_append (&op->esil, "ax,edi,=[2],df,?{,2,edi,-=,},df,!,?{,2,edi,+=,}");
}
break;
case X86_INS_STOSD:
r_strbuf_appendf (&op->esil, "eax,edi,=[4],df,?{,4,edi,-=,},df,!,?{,4,edi,+=,}");
r_strbuf_append (&op->esil, "eax,edi,=[4],df,?{,4,edi,-=,},df,!,?{,4,edi,+=,}");
break;
case X86_INS_STOSQ:
r_strbuf_appendf (&op->esil, "rax,rdi,=[8],df,?{,8,edi,-=,},df,!,?{,8,edi,+=,}");
r_strbuf_append (&op->esil, "rax,rdi,=[8],df,?{,8,edi,-=,},df,!,?{,8,edi,+=,}");
break;
case X86_INS_LODSB:
r_strbuf_appendf (&op->esil, "%s,[1],al,=,df,?{,1,%s,-=,},df,!,?{,1,%s,+=,}", si, si, si);
@ -713,13 +713,13 @@ static void anop_esil(RAnal *a, RAnalOp *op, ut64 addr, const ut8 *buf, int len,
r_strbuf_appendf (&op->esil, "%s,[2],ax,=,df,?{,2,%s,-=,},df,!,?{,2,%s,+=,}", si, si, si);
break;
case X86_INS_LODSD:
r_strbuf_appendf (&op->esil, "esi,[4],eax,=,df,?{,4,esi,-=,},df,!,?{,4,esi,+=,}");
r_strbuf_append (&op->esil, "esi,[4],eax,=,df,?{,4,esi,-=,},df,!,?{,4,esi,+=,}");
break;
case X86_INS_LODSQ:
r_strbuf_appendf (&op->esil, "rsi,[8],rax,=,df,?{,8,rsi,-=,},df,!,?{,8,rsi,+=,}");
r_strbuf_append (&op->esil, "rsi,[8],rax,=,df,?{,8,rsi,-=,},df,!,?{,8,rsi,+=,}");
break;
case X86_INS_PEXTRB:
r_strbuf_appendf (&op->esil, "TODO");
r_strbuf_append (&op->esil, "TODO");
break;
// string mov
// PS: MOVSD can correspond to one of the two instruction (yes, intel x86
@ -731,7 +731,7 @@ static void anop_esil(RAnal *a, RAnalOp *op, ut64 addr, const ut8 *buf, int len,
// https://mudongliang.github.io/x86/html/file_module_x86_id_204.html
case X86_INS_MOVSD:
// Handle "Move Scalar Double-Precision Floating-Point Value"
if (is_xmm_reg (INSOP(0)) || is_xmm_reg (INSOP(1))) {
if (is_xmm_reg (INSOP (0)) || is_xmm_reg (INSOP (1))) {
src = getarg (&gop, 1, 0, NULL, SRC_AR, NULL);
dst = getarg (&gop, 0, 1, NULL, DST_AR, NULL);
if (src && dst) {

6
libr/anal/p/anal_xtensa.c
View File

@ -1184,14 +1184,14 @@ static void esil_branch_compare_imm(xtensa_isa isa, xtensa_opcode opcode,
esil_push_signed_imm (&op->esil, cmp_imm);
r_strbuf_appendf (&op->esil, "%s" CM, compare_op);
r_strbuf_appendf (&op->esil, "?{" CM);
r_strbuf_append (&op->esil, "?{" CM);
// ISA defines branch target as offset + 4,
// but at the time of ESIL evaluation
// PC will be already incremented by 3
esil_push_signed_imm (&op->esil, branch_imm + 4 - 3);
r_strbuf_appendf (&op->esil, "pc" CM "+=" CM "}");
r_strbuf_append (&op->esil, "pc" CM "+=" CM "}");
}
static void esil_branch_compare(xtensa_isa isa, xtensa_opcode opcode,
@ -1868,7 +1868,7 @@ static void analop_esil(xtensa_isa isa, xtensa_opcode opcode, xtensa_format form
break;
case 98: /* ret */
case 35: /* ret.n */
r_strbuf_setf (&op->esil, "a0,pc,=");
r_strbuf_set (&op->esil, "a0,pc,=");
break;
case 82: /* l16ui */
case 83: /* l16si */

30
libr/asm/arch/arm/winedbg/be_arm.c
View File

@ -189,7 +189,7 @@ static ut32 arm_disasm_dataprocessing(struct winedbg_arm_insn *arminsn, ut32 ins
if (!no_dst) {
arminsn->str_asm = r_str_appendf (arminsn->str_asm, " %s, ", tbl_regs[get_nibble (inst, 3)]);
} else {
arminsn->str_asm = r_str_appendf (arminsn->str_asm, " ");
arminsn->str_asm = r_str_append (arminsn->str_asm, " ");
}
if (no_op1) {
if (immediate) {
@ -380,7 +380,7 @@ static ut16 thumb_disasm_hireg(struct winedbg_arm_insn *arminsn, ut16 inst) {
}
if (op == 2 && dst == src) { /* mov rx, rx */
arminsn->str_asm = r_str_appendf (arminsn->str_asm, "nop");
arminsn->str_asm = r_str_append (arminsn->str_asm, "nop");
return 0;
}
@ -419,7 +419,7 @@ static ut16 thumb_disasm_pushpop(struct winedbg_arm_insn *arminsn, ut16 inst) {
arminsn->str_asm = r_str_appendf (arminsn->str_asm, "%s%s", first ? "" : ", ", load ? "pc" : "lr");
}
arminsn->str_asm = r_str_appendf (arminsn->str_asm, "}");
arminsn->str_asm = r_str_append (arminsn->str_asm, "}");
return 0;
}
@ -437,7 +437,7 @@ static ut16 thumb_disasm_blocktrans(struct winedbg_arm_insn *arminsn, ut16 inst)
}
}
arminsn->str_asm = r_str_appendf (arminsn->str_asm, "}");
arminsn->str_asm = r_str_append (arminsn->str_asm, "}");
return 0;
}
@ -479,7 +479,7 @@ static ut16 thumb_disasm_swi(struct winedbg_arm_insn *arminsn, ut16 inst) {
}
static ut16 thumb_disasm_nop(struct winedbg_arm_insn *arminsn, ut16 inst) {
arminsn->str_asm = r_str_appendf (arminsn->str_asm, "nop");
arminsn->str_asm = r_str_append (arminsn->str_asm, "nop");
return 0;
}
@ -590,16 +590,16 @@ static ut32 thumb2_disasm_misc(struct winedbg_arm_insn *arminsn, ut32 inst) {
if (op1 == 1) {
switch (op2) {
case 0:
arminsn->str_asm = r_str_appendf (arminsn->str_asm, "rev ");
arminsn->str_asm = r_str_append (arminsn->str_asm, "rev ");
break;
case 1:
arminsn->str_asm = r_str_appendf (arminsn->str_asm, "rev16 ");
arminsn->str_asm = r_str_append (arminsn->str_asm, "rev16 ");
break;
case 2:
arminsn->str_asm = r_str_appendf (arminsn->str_asm, "rbit ");
arminsn->str_asm = r_str_append (arminsn->str_asm, "rbit ");
break;
case 3:
arminsn->str_asm = r_str_appendf (arminsn->str_asm, "revsh ");
arminsn->str_asm = r_str_append (arminsn->str_asm, "revsh ");
break;
}
arminsn->str_asm = r_str_appendf (arminsn->str_asm, "%s, %s ", tbl_regs[get_nibble (inst, 2)], tbl_regs[get_nibble (inst, 0)]);
@ -650,16 +650,16 @@ static ut32 thumb2_disasm_longmuldiv(struct winedbg_arm_insn *arminsn, ut32 inst
if (op2 == 0) {
switch (op1) {
case 0:
arminsn->str_asm = r_str_appendf (arminsn->str_asm, "smull ");
arminsn->str_asm = r_str_append (arminsn->str_asm, "smull ");
break;
case 2:
arminsn->str_asm = r_str_appendf (arminsn->str_asm, "umull ");
arminsn->str_asm = r_str_append (arminsn->str_asm, "umull ");
break;
case 4:
arminsn->str_asm = r_str_appendf (arminsn->str_asm, "smlal ");
arminsn->str_asm = r_str_append (arminsn->str_asm, "smlal ");
break;
case 6:
arminsn->str_asm = r_str_appendf (arminsn->str_asm, "umlal ");
arminsn->str_asm = r_str_append (arminsn->str_asm, "umlal ");
break;
default:
return inst;
@ -673,10 +673,10 @@ static ut32 thumb2_disasm_longmuldiv(struct winedbg_arm_insn *arminsn, ut32 inst
if (op2 == 0xffff) {
switch (op1) {
case 1:
arminsn->str_asm = r_str_appendf (arminsn->str_asm, "sdiv ");
arminsn->str_asm = r_str_append (arminsn->str_asm, "sdiv ");
break;
case 3:
arminsn->str_asm = r_str_appendf (arminsn->str_asm, "udiv ");
arminsn->str_asm = r_str_append (arminsn->str_asm, "udiv ");
break;
default:
return inst;

10
libr/core/cmd_anal.c
View File

@ -2101,11 +2101,11 @@ R_API char *cmd_syscall_dostr(RCore *core, st64 n, ut64 addr) {
res = r_str_appendf (res, "0x%08" PFMT64x, arg);
}
if (i + 1 < item->args) {
res = r_str_appendf (res, ", ");
res = r_str_append (res, ", ");
}
}
r_syscall_item_free (item);
return r_str_appendf (res, ")");
return r_str_append (res, ")");
}
static bool mw(RAnalEsil *esil, ut64 addr, const ut8 *buf, int len) {
@ -12376,7 +12376,7 @@ static void cmd_anal_aC(RCore *core, const char *input) {
(*fcn_type && fcn_type[strlen (fcn_type) - 1] == '*') ? "" : " ",
r_str_getf (key));
if (!nargs) {
r_strbuf_appendf (sb, "void)\n");
r_strbuf_append (sb, "void)\n");
}
} else {
R_LOG_ERROR ("Cannot find any function signature");
@ -12426,7 +12426,7 @@ static void cmd_anal_aC(RCore *core, const char *input) {
free (res);
}
}
r_strbuf_appendf (sb, ")");
r_strbuf_append (sb, ")");
} else {
// function name not resolved
int i, nargs = 4; // DEFAULT_NARGS;
@ -12444,7 +12444,7 @@ static void cmd_anal_aC(RCore *core, const char *input) {
ut64 v = r_debug_arg_get (core->dbg, cc, i);
r_strbuf_appendf (sb, "%s0x%"PFMT64x, i?", ":"", v);
}
r_strbuf_appendf (sb, ")");
r_strbuf_append (sb, ")");
}
}
r_list_free (list);

4
libr/core/cmd_print.c
View File

@ -6703,7 +6703,7 @@ static int cmd_print(void *data, const char *input) {
}
if (!ch) {
if (core->print->cur_enabled && core->print->cur == i) {
r_strbuf_appendf (sb, Color_INVERT"."Color_RESET);
r_strbuf_append (sb, Color_INVERT"."Color_RESET);
}
if (!hasnl) {
char *s = r_strbuf_drain (sb);
@ -6726,7 +6726,7 @@ static int cmd_print(void *data, const char *input) {
}
} else {
if (core->print->cur_enabled && core->print->cur == i) {
r_strbuf_appendf (sb, Color_INVERT"."Color_RESET);
r_strbuf_append (sb, Color_INVERT"."Color_RESET);
}
}
}

2
libr/core/panels.c
View File

@ -765,7 +765,7 @@ static void __update_help_title(RCore *core, RPanel *panel) {
r_strbuf_setf (title, "[X] %s ", panel->model->title);
if (panel->view->pos.w > 24) {
r_strbuf_setf (cache_title, "[Cache] %s", panel->model->cache ? "On" : "Off");
// r_strbuf_setf (cache_title, "[Cache] N/A");
// r_strbuf_set (cache_title, "[Cache] N/A");
}
}
if (panel->view->pos.w > 16) {

30
libr/core/visual.c
View File

@ -616,8 +616,8 @@ repeat:
ret = r_cons_less_str (r_strbuf_get (p), "?");
break;
case 'v':
r_strbuf_appendf (p, "Visual Views:\n\n");
r_strbuf_appendf (p,
r_strbuf_append (p, "Visual Views:\n\n");
r_strbuf_append (p,
" \\ toggle horizonal split mode\n"
" tt create a new tab (same as t+)\n"
" t= give a name to the current tab\n"
@ -631,16 +631,16 @@ repeat:
ret = r_cons_less_str (r_strbuf_get (p), "?");
break;
case 'p':
r_strbuf_appendf (p, "Visual Print Modes:\n\n");
r_strbuf_appendf (p,
r_strbuf_append (p, "Visual Print Modes:\n\n");
r_strbuf_append (p,
" pP -> change to the next/previous print mode (hex, dis, ..)\n"
" TAB -> rotate between all the configurations for the current print mode\n"
);
ret = r_cons_less_str (r_strbuf_get (p), "?");
break;
case 'e':
r_strbuf_appendf (p, "Visual Evals:\n\n");
r_strbuf_appendf (p,
r_strbuf_append (p, "Visual Evals:\n\n");
r_strbuf_append (p,
" E toggle asm.hint.lea\n"
" & rotate asm.bits=16,32,64\n"
);
@ -651,8 +651,8 @@ repeat:
r_strbuf_free (p);
return ret;
case 'i':
r_strbuf_appendf (p, "Visual Insertion Help:\n\n");
r_strbuf_appendf (p,
r_strbuf_append (p, "Visual Insertion Help:\n\n");
r_strbuf_append (p,
" i -> insert bits, bytes or text depending on view\n"
" a -> assemble instruction and write the bytes in the current offset\n"
" A -> visual assembler\n"
@ -662,8 +662,8 @@ repeat:
ret = r_cons_less_str (r_strbuf_get (p), "?");
break;
case 'd':
r_strbuf_appendf (p, "Visual Debugger Help:\n\n");
r_strbuf_appendf (p,
r_strbuf_append (p, "Visual Debugger Help:\n\n");
r_strbuf_append (p,
" $ -> set the program counter (PC register)\n"
" s -> step in\n"
" S -> step over\n"
@ -673,8 +673,8 @@ repeat:
ret = r_cons_less_str (r_strbuf_get (p), "?");
break;
case 'm':
r_strbuf_appendf (p, "Visual Moving Around:\n\n");
r_strbuf_appendf (p,
r_strbuf_append (p, "Visual Moving Around:\n\n");
r_strbuf_append (p,
" g type flag/offset/register name to seek\n"
" hl seek to the next/previous byte\n"
" jk seek to the next row (core.offset += hex.cols)\n"
@ -687,8 +687,8 @@ repeat:
ret = r_cons_less_str (r_strbuf_get (p), "?");
break;
case 'a':
r_strbuf_appendf (p, "Visual Analysis:\n\n");
r_strbuf_appendf (p,
r_strbuf_append (p, "Visual Analysis:\n\n");
r_strbuf_append (p,
" df -> define function\n"
" du -> undefine function\n"
" dc -> define as code\n"
@ -1548,7 +1548,7 @@ repeat:
// TODO: show disasm with context. not seek addr
// dis = r_core_cmd_strf (core, "pd $r-4 @ 0x%08"PFMT64x, refi->addr);
dis = NULL;
res = r_str_appendf (res, "; ---------------------------\n");
res = r_str_append (res, "; ---------------------------\n");
switch (printMode) {
case 0:
dis = r_core_cmd_strf (core, "pd--6 @ 0x%08"PFMT64x, refi->addr);

2
libr/core/vmenus.c
View File

@ -4420,7 +4420,7 @@ R_API void r_core_visual_colors(RCore *core) {
}
sprintf (color, rgb_xxx_fmt, rcolor.r, rcolor.g, rcolor.b);
if (rcolor.r2 || rcolor.g2 || rcolor.b2) {
color = r_str_appendf (color, " ");
color = r_str_append (color, " ");
color = r_str_appendf (color, rgb_xxx_fmt, rcolor.r2, rcolor.g2, rcolor.b2);
rcolor.a = ALPHA_FGBG;
} else {

4
libr/util/asn1.c
View File

@ -229,7 +229,7 @@ static RASN1String* r_asn1_print_hexdump_padded(RASN1Object *object, ut32 depth)
pad = " : ";
} else {
pad = r_str_pad (' ', depth * 2);
r_strbuf_appendf (sb, " ");
r_strbuf_append (sb, " ");
}
for (i = 0, j = 0; i < object->length; i++, j++) {
@ -244,7 +244,7 @@ static RASN1String* r_asn1_print_hexdump_padded(RASN1Object *object, ut32 depth)
}
while ((i % 16) != 0) {
r_strbuf_appendf (sb, " ");
r_strbuf_append (sb, " ");
i++;
}
r_strbuf_appendf (sb, "|%-16s|", readable);

10
libr/util/axml.c
View File

@ -223,7 +223,7 @@ static bool dump_element(RStrBuf *sb, string_pool_t *pool, namespace_t *namespac
char *name = string_lookup (pool, data, data_size, r_read_le32 (&element->name), NULL);
for (i = 0; i < *depth; i++) {
r_strbuf_appendf (sb, "\t");
r_strbuf_append (sb, "\t");
}
if (start) {
@ -238,14 +238,14 @@ static bool dump_element(RStrBuf *sb, string_pool_t *pool, namespace_t *namespac
}
if (count * sizeof (attribute_t) > element_size) {
r_strbuf_appendf (sb, " />");
r_strbuf_append (sb, " />");
R_LOG_ERROR ("Invalid element count");
free (name);
return false;
}
if (count != 0) {
r_strbuf_appendf (sb, " ");
r_strbuf_append (sb, " ");
}
for (i = 0; i < count; i++) {
@ -279,7 +279,7 @@ static bool dump_element(RStrBuf *sb, string_pool_t *pool, namespace_t *namespac
r_strbuf_appendf (sb, "%s=\"%s\"", key, value);
}
if (i != count - 1) {
r_strbuf_appendf (sb, " ");
r_strbuf_append (sb, " ");
}
if (!resource_key) {
free ((char *)key);
@ -290,7 +290,7 @@ static bool dump_element(RStrBuf *sb, string_pool_t *pool, namespace_t *namespac
r_strbuf_appendf (sb, "</%s", name);
}
r_strbuf_appendf (sb, ">\n");
r_strbuf_append (sb, ">\n");
free (name);
return true;
}

2
libr/util/pkcs7.c
View File

@ -505,7 +505,7 @@ R_API char *r_pkcs7_cms_to_string(RCMS *container) {
}
}
r_strbuf_appendf (sb, " SignerInfos:\n");
r_strbuf_append (sb, " SignerInfos:\n");
if (container->signedData.signerinfos.elements) {
for (i = 0; i < container->signedData.signerinfos.length; i++) {
r_x509_signedinfo_dump (container->signedData.signerinfos.elements[i], " ", sb);

12
libr/util/protobuf.c
View File

@ -35,7 +35,7 @@ static const char* s_wire(const ut8 byte) {
static void pad(RStrBuf *sb, ut32 count) {
ut32 i;
for (i = 0; i < count; i++) {
r_strbuf_appendf (sb, " ");
r_strbuf_append (sb, " ");
}
}
@ -55,7 +55,7 @@ static void decode_array(RStrBuf *sb, const ut8* start, const ut8* end) {
r_strbuf_appendf (sb, "%02x ", *start);
start++;
}
r_strbuf_appendf (sb, "\n");
r_strbuf_append (sb, "\n");
}
static void decode_buffer(RStrBuf *sb, const ut8* start, const ut8* end, ut32 padcnt, bool debug) {
@ -111,10 +111,10 @@ static void decode_buffer(RStrBuf *sb, const ut8* start, const ut8* end, ut32 pa
if (is_string (ps, pe)) {
r_strbuf_appendf (sb, ": \"%.*s\"\n", (int)var64, (const char*) ps);
} else {
r_strbuf_appendf (sb, " {\n");
r_strbuf_append (sb, " {\n");
decode_buffer (sb, ps, pe, padcnt + 1, debug);
pad (sb, padcnt);
r_strbuf_appendf (sb, "}\n");
r_strbuf_append (sb, "}\n");
}
bytes_read += var64;
} else {
@ -124,7 +124,7 @@ static void decode_buffer(RStrBuf *sb, const ut8* start, const ut8* end, ut32 pa
}
break;
case WIRE_START_GRP:
r_strbuf_appendf (sb, " {\n");
r_strbuf_append (sb, " {\n");
padcnt++;
break;
case WIRE_END_GRP:
@ -132,7 +132,7 @@ static void decode_buffer(RStrBuf *sb, const ut8* start, const ut8* end, ut32 pa
padcnt--;
}
pad (sb, padcnt);
r_strbuf_appendf (sb, "}\n");
r_strbuf_append (sb, "}\n");
break;
case WIRE_32_BIT:
{

2
libr/util/str.c
View File

@ -3929,7 +3929,7 @@ R_API char *r_str_version(const char *program) {
(R_SYS_BITS & 8)? 64: 32,
*R2_GITTAP ? R2_GITTAP: "");
if (*R2_GITTIP) {
s = r_str_appendf (s, "commit: "R2_GITTIP" build: "R2_BIRTH);
s = r_str_append (s, "commit: "R2_GITTIP" build: "R2_BIRTH);
}
return s;
}

6
libr/util/table.c
View File

@ -489,7 +489,7 @@ R_API char *r_table_tor2cmds(RTable *t) {
RTableColumn *col;
RListIter *iter, *iter2;
r_strbuf_appendf (sb, ",h ");
r_strbuf_append (sb, ",h ");
r_list_foreach (t->cols, iter, col) {
char fmt = col->type == &r_table_type_string? 's': 'x';
r_strbuf_appendf (sb, "%c", fmt);
@ -502,7 +502,7 @@ R_API char *r_table_tor2cmds(RTable *t) {
r_list_foreach (t->rows, iter, row) {
char *item;
int c = 0;
r_strbuf_appendf (sb, ",r");
r_strbuf_append (sb, ",r");
r_list_foreach (row->items, iter2, item) {
RTableColumn *col = r_list_get_n (t->cols, c);
if (col) {
@ -534,7 +534,7 @@ R_API char *r_table_tosql(RTable *t) {
free (s);
primary_key = false;
}
r_strbuf_appendf (sb, ");\n");
r_strbuf_append (sb, ");\n");
r_list_foreach (t->rows, iter, row) {
const char *item;

5
sys/lint.sh
View File

@ -23,6 +23,11 @@ cd "$(dirname $0)"/..
(git grep eprintf libr| grep -i error | grep -v '/native/' | grep -v spp | grep -v cons) && exit 1
# (git grep strbuf_appendf libr | grep -v '%') && exit 1
(git grep appendf libr | grep '"' | grep -v '%') && exit 1
(git grep strbuf_setf libr | grep '"' | grep -v '%') && exit 1
(git grep 'strbuf_append (' libr | grep '"' | grep '%') && exit 1
(git grep -i unkown libr ) && exit 1
(git grep '=0' libr| grep c:|grep -v '"' |grep -v '=0x') && exit 1