From 80012aff7b2249792714a57534ace81193501d1a Mon Sep 17 00:00:00 2001
From: pancake <pancake@nopcode.org>
Date: Fri, 3 Feb 2023 10:38:04 +0100
Subject: [PATCH] Set refptr for Xtensa l32r opcode for better disassembly
 output ##anal

* Cherry-picked from https://github.com/rizinorg/rizin/commit/ca3c77e981e60fff9f11bc62b0c24305f6ecd415
* Patch done by @bucienator
---
 libr/arch/p/xtensa/plugin.c |  1 +
 test/db/anal/xtensa         | 14 ++++++++++++++
 2 files changed, 15 insertions(+)

diff --git a/libr/arch/p/xtensa/plugin.c b/libr/arch/p/xtensa/plugin.c
index 29f4e3634e..c5e28697c9 100644
--- a/libr/arch/p/xtensa/plugin.c
+++ b/libr/arch/p/xtensa/plugin.c
@@ -171,6 +171,7 @@ static void xtensa_shr_op(RArchSession *anal, RAnalOp *op, ut64 addr, const ut8
 static void xtensa_l32r_op(RArchSession *anal, RAnalOp *op, ut64 addr, const ut8 *buf) {
 	op->type = R_ANAL_OP_TYPE_LOAD;
 	op->ptr = ((addr + 3) & ~3) + ((buf[2] << 8 | buf[1]) << 2) - 0x40000;
+	op->refptr = 4;
 }
 
 static void xtensa_snm0_op(RArchSession *anal, RAnalOp *op, ut64 addr, const ut8 *buf) {
diff --git a/test/db/anal/xtensa b/test/db/anal/xtensa
index a503bbdcc8..6de477ab27 100644
--- a/test/db/anal/xtensa
+++ b/test/db/anal/xtensa
@@ -27,3 +27,17 @@ var int32_t var_8h @ a1+0x8
 var int32_t var_4h @ a1+0xc
 EOF
 RUN
+
+NAME=xtensa l32r refptr
+FILE=malloc://512
+CMDS=<<EOF
+e asm.arch=xtensa
+e asm.bits=32
+wx 00000000ff11ff1121ffff0df0ff
+pD 3 @ 8
+EOF
+EXPECT=<<EOF
+            0x00000008      21ffff         l32r a2, 0x00000004         ; [0x4:4]=0x11ff11ff
+EOF
+RUN
+