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Support the new Apple Watch arm64_32 mach0 cputype ##bin (#11842)

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radare 2018-10-18 01:38:25 +02:00 committed by GitHub
parent 55bdcbb94c
commit 8eba01c534
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GPG Key ID: 4AEE18F83AFDEB23
2 changed files with 11 additions and 1 deletions
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8
libr/bin/format/mach0/mach0.c
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@ -2393,6 +2393,9 @@ int MACH0_(get_bits_from_hdr)(struct MACH0_(mach_header)* hdr) {
if (hdr->magic == MH_MAGIC_64 || hdr->magic == MH_CIGAM_64) {
return 64;
}
if (hdr->cputype == CPU_TYPE_ARM64_32) { // new apple watch aka arm64_32
return 64;
}
if ((hdr->cpusubtype & CPU_SUBTYPE_MASK) == (CPU_SUBTYPE_ARM_V7K << 24)) {
return 16;
}
@ -2447,6 +2450,7 @@ const char* MACH0_(get_cputype_from_hdr)(struct MACH0_(mach_header) *hdr) {
break;
case CPU_TYPE_ARM:
case CPU_TYPE_ARM64:
case CPU_TYPE_ARM64_32:
archstr = "arm";
break;
case CPU_TYPE_SPARC:
@ -2461,6 +2465,10 @@ const char* MACH0_(get_cputype_from_hdr)(struct MACH0_(mach_header) *hdr) {
case CPU_TYPE_POWERPC:
case CPU_TYPE_POWERPC64:
archstr = "ppc";
break;
default:
eprintf ("Unknown arch %d\n", hdr->cputype);
break;
}
return archstr;
}

4
libr/bin/format/mach0/mach0_defines.h
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@ -1062,7 +1062,8 @@ static inline void SET_COMM_ALIGN (uint16_t *n_desc, uint8_t align) {
enum {
// Capability bits used in the definition of cpu_type.
CPU_ARCH_MASK = 0xff000000, // Mask for architecture bits
CPU_ARCH_ABI64 = 0x01000000 // 64 bit ABI
CPU_ARCH_ABI64 = 0x01000000, // 64 bit ABI
CPU_ARCH_ABI32 = 0x02000000 // Used for ARM64_32 (new Apple Watch)
};
// Constants for the cputype field.
@ -1078,6 +1079,7 @@ enum CPUType {
CPU_TYPE_HPPA = 11,
CPU_TYPE_ARM = 12,
CPU_TYPE_ARM64 = CPU_TYPE_ARM | CPU_ARCH_ABI64,
CPU_TYPE_ARM64_32 = CPU_TYPE_ARM | CPU_ARCH_ABI32,
CPU_TYPE_MC88000 = 13,
CPU_TYPE_SPARC = 14,
CPU_TYPE_I860 = 15,