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[v850] V850_ADD_IMM5 fix #8308 (#9797)

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* GR [reg2] <= GR [reg1] + sign-extend (imm16)
* fixed missing cast to signed 32 for esil of immediate value
This commit is contained in:
Giovanni 2018-04-04 12:58:13 +02:00 committed by radare
parent 17061a7b61
commit b3f5853316
1 changed files with 2 additions and 5 deletions
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7
libr/anal/p/anal_v850.c
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@ -215,13 +215,10 @@ static int v850_op(RAnal *anal, RAnalOp *op, ut64 addr, const ut8 *buf, int len)
op->type = R_ANAL_OP_TYPE_ADD;
if (F6_REG2(word1) == V850_SP) {
op->stackop = R_ANAL_STACK_INC;
// Not so sure about the fix but
// F6_IMM works only for 32 bit words.
// word1 is 16 bits long.
op->stackptr = F2_IMM (word1);
op->stackptr = (st64) word2;
op->val = op->stackptr;
}
r_strbuf_appendf (&op->esil, "%hd,%s,+,%s,=", word2, F6_RN1 (word1), F6_RN2 (word1));
r_strbuf_appendf (&op->esil, "%d,%s,+,%s,=", (st32) word2, F6_RN1 (word1), F6_RN2 (word1));
update_flags (op, -1);
break;
case V850_SHR_IMM5: