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https://github.com/radareorg/radare2.git
synced 2024-11-23 21:29:49 +00:00
Set asm.cpu for mips.gnu derived from the ISA defined in the ELF ##bin (#17555)
This commit is contained in:
junchao-loongson
GitHub
parent
61a1e15af5
commit
ca9b6ac1a0
@ -326,9 +326,9 @@ struct mips_abi_choice
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struct mips_abi_choice mips_abi_choices[] =
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{
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{ "numeric", mips_gpr_names_numeric, mips_fpr_names_numeric },
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{ "32", mips_gpr_names_oldabi, mips_fpr_names_32 },
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{ "o32", mips_gpr_names_oldabi, mips_fpr_names_32 },
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{ "n32", mips_gpr_names_newabi, mips_fpr_names_n32 },
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{ "64", mips_gpr_names_newabi, mips_fpr_names_64 },
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{ "n64", mips_gpr_names_newabi, mips_fpr_names_64 },
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};
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struct mips_arch_choice
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@ -620,6 +620,16 @@ parse_mips_dis_option (const char *option, unsigned int len)
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val = option + (optionlen + 1);
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vallen = len - (optionlen + 1);
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if (strlen ("abi") == optionlen
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&& !strncmp ("abi", option, optionlen)) {
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chosen_abi = choose_abi_by_name (val, vallen);
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if (chosen_abi) {
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mips_gpr_names = chosen_abi->gpr_names;
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mips_fpr_names = chosen_abi->fpr_names;
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}
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return;
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}
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if (strncmp ("gpr-names", option, optionlen) == 0
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&& strlen ("gpr-names") == optionlen)
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{
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@ -17,8 +17,10 @@ static int mips_mode = 0;
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static unsigned long Offset = 0;
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static RStrBuf *buf_global = NULL;
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static unsigned char bytes[4];
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static char *pre_cpu = NULL;
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static char *pre_features = NULL;
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static int mips_buffer_read_memory (bfd_vma memaddr, bfd_byte *myaddr, unsigned int length, struct disassemble_info *info) {
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static int mips_buffer_read_memory(bfd_vma memaddr, bfd_byte *myaddr, unsigned int length, struct disassemble_info *info) {
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memcpy (myaddr, bytes, length);
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return 0;
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}
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@ -43,8 +45,37 @@ static int disassemble(struct r_asm_t *a, struct r_asm_op_t *op, const ut8 *buf,
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Offset = a->pc;
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memcpy (bytes, buf, 4); // TODO handle thumb
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if ((a->cpu != pre_cpu) && (a->features != pre_features)) {
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free (disasm_obj.disassembler_options);
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memset (&disasm_obj, '\0', sizeof (struct disassemble_info));
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}
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/* prepare disassembler */
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memset (&disasm_obj,'\0', sizeof (struct disassemble_info));
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if (a->cpu && (!pre_cpu || !strcmp(a->cpu, pre_cpu))) {
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if (!r_str_casecmp (a->cpu, "mips64r2")) {
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disasm_obj.mach = bfd_mach_mipsisa64r2;
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} else if (!r_str_casecmp (a->cpu, "mips32r2")) {
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disasm_obj.mach = bfd_mach_mipsisa32r2;
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} else if (!r_str_casecmp (a->cpu, "mips64")) {
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disasm_obj.mach = bfd_mach_mipsisa64;
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} else if (!r_str_casecmp (a->cpu, "mips32")) {
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disasm_obj.mach = bfd_mach_mipsisa32;
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}
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pre_cpu = r_str_dup (pre_cpu, a->cpu);
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}
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if (a->features && (!pre_features || !strcmp (a->features, pre_features))) {
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free (disasm_obj.disassembler_options);
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if (strstr (a->features, "n64")) {
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disasm_obj.disassembler_options = r_str_new ("abi=n64");
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} else if (strstr (a->features, "n32")) {
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disasm_obj.disassembler_options = r_str_new ("abi=n32");
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} else if (strstr (a->features, "o32")) {
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disasm_obj.disassembler_options = r_str_new ("abi=o32");
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}
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pre_features = r_str_dup (pre_features, a->features);
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}
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mips_mode = a->bits;
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disasm_obj.arch = CPU_LOONGSON_2F;
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disasm_obj.buffer = bytes;
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@ -57,7 +88,6 @@ static int disassemble(struct r_asm_t *a, struct r_asm_op_t *op, const ut8 *buf,
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disasm_obj.endian = !a->big_endian;
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disasm_obj.fprintf_func = &generic_fprintf_func;
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disasm_obj.stream = stdout;
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op->size = (disasm_obj.endian == BFD_ENDIAN_LITTLE)
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? print_insn_little_mips ((bfd_vma)Offset, &disasm_obj)
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: print_insn_big_mips ((bfd_vma)Offset, &disasm_obj);
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@ -1068,8 +1068,9 @@ R_API void r_bin_list_archs(RBin *bin, int mode) {
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pj_ki (pj, "bits", bits);
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pj_kn (pj, "offset", boffset);
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pj_kn (pj, "size", obj_size);
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if (!strcmp (arch, "mips") && h_flag) {
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pj_ks (pj, "isa", h_flag);
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if (!strcmp (arch, "mips")) {
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pj_ks (pj, "isa", info->cpu);
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pj_ks (pj, "features", info->features);
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}
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if (machine) {
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pj_ks (pj, "machine", machine);
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@ -1078,7 +1079,7 @@ R_API void r_bin_list_archs(RBin *bin, int mode) {
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break;
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default:
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str_fmt = h_flag && strcmp (h_flag, "unknown_flag")? sdb_fmt ("%s_%i %s", arch, bits, h_flag) \
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: sdb_fmt ("%s_%i", arch, bits);
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: sdb_fmt ("%s_%i", arch, bits);
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r_table_add_rowf (table, "nXnss", i, boffset, obj_size, str_fmt , machine);
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bin->cb_printf ("%s\n", r_table_tostring(table));
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}
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@ -1099,8 +1100,9 @@ R_API void r_bin_list_archs(RBin *bin, int mode) {
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pj_ki (pj, "bits", bits);
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pj_kn (pj, "offset", boffset);
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pj_kn (pj, "size", obj_size);
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if (!strcmp (arch, "mips") && h_flag) {
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pj_ks (pj, "isa", h_flag);
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if (!strcmp (arch, "mips")) {
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pj_ks (pj, "isa", info->cpu);
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pj_ks (pj, "features", info->features);
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}
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if (machine) {
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pj_ks (pj, "machine", machine);
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@ -1109,7 +1111,7 @@ R_API void r_bin_list_archs(RBin *bin, int mode) {
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break;
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default:
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str_fmt = h_flag && strcmp (h_flag, "unknown_flag")? sdb_fmt ("%s_%i %s", arch, bits, h_flag) \
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: sdb_fmt ("%s_%i", arch, bits);
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: sdb_fmt ("%s_%i", arch, bits);
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r_table_add_rowf (table, "nsnss", i, sdb_fmt ("0x%08" PFMT64x , boffset), obj_size, str_fmt, "");
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bin->cb_printf ("%s\n", r_table_tostring(table));
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}
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@ -59,6 +59,39 @@ static inline int UTX_MUL(ut64 *r, ut64 a, ut64 b) {
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#define round_up(a) ((((a) + (4) - (1)) / (4)) * (4))
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#define EF_MIPS_ABI_O32 0x00001000 /* O32 ABI. */
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#define EF_MIPS_ABI_O64 0x00002000 /* O32 extended for 64 bit. */
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#define EF_MIPS_ABI 0x0000f000
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static inline bool is_elfclass64(Elf_(Ehdr) *h) {
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return h->e_ident[EI_CLASS] == ELFCLASS64;
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}
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static bool is_mips_o32(Elf_(Ehdr) *h) {
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if (h->e_ident[EI_CLASS] != ELFCLASS32) {
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return false;
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}
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if ((h->e_flags & EF_MIPS_ABI2) != 0) {
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return false;
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}
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if (((h->e_flags & EF_MIPS_ABI) != 0) &&
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((h->e_flags & EF_MIPS_ABI) != EF_MIPS_ABI_O32)) {
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return false;
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}
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return true;
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}
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static bool is_mips_n32(Elf_(Ehdr) *h) {
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if (h->e_ident[EI_CLASS] != ELFCLASS32) {
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return false;
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}
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if (((h->e_flags & EF_MIPS_ABI2) == 0) ||
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((h->e_flags & EF_MIPS_ABI) != 0)) {
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return false;
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}
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return true;
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}
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enum {
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X86,
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X86_64,
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@ -2085,8 +2118,24 @@ char* Elf_(r_bin_elf_get_arch)(ELFOBJ *bin) {
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default: return strdup ("x86");
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}
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}
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char* Elf_(r_bin_elf_get_abi)(ELFOBJ *bin) {
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Elf_(Ehdr)* ehdr = (Elf_(Ehdr) *) &bin->ehdr;
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char* Elf_(r_bin_elf_get_head_flag)(ELFOBJ *bin) {
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if (ehdr->e_machine == EM_MIPS) {
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if (is_elfclass64 (ehdr)) {
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return strdup ("n64");
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}
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if (is_mips_n32 (ehdr)) {
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return strdup ("n32");
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}
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if (is_mips_o32 (ehdr)) {
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return strdup ("o32");
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}
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}
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return NULL;
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}
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char* Elf_(r_bin_elf_get_cpu)(ELFOBJ *bin) {
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if (bin->phdr && bin->ehdr.e_machine == EM_MIPS) {
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const ut32 mipsType = bin->ehdr.e_flags & EF_MIPS_ARCH;
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switch (mipsType) {
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@ -2102,8 +2151,23 @@ char* Elf_(r_bin_elf_get_head_flag)(ELFOBJ *bin) {
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default : return strdup (" Unknown mips ISA");
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}
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}
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//TODO: Fill other arch
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return strdup("unknown_flag");
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return NULL;
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}
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char* Elf_(r_bin_elf_get_head_flag)(ELFOBJ *bin) {
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char *head_flag = NULL;
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char *str = Elf_(r_bin_elf_get_cpu) (bin);
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if (str) {
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head_flag = r_str_append (head_flag, str);
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}
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str = Elf_(r_bin_elf_get_abi) (bin);
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if (str) {
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head_flag = r_str_appendf (head_flag, " %s", str);
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}
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if (R_STR_ISEMPTY (head_flag)) {
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head_flag = r_str_append (head_flag, "unknown_flag");
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}
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return head_flag;
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}
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// http://www.sco.com/developers/gabi/latest/ch4.eheader.html
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@ -185,7 +185,9 @@ bool Elf_(r_bin_elf_is_static)(struct Elf_(r_bin_elf_obj_t) *bin);
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char* Elf_(r_bin_elf_get_data_encoding)(struct Elf_(r_bin_elf_obj_t) *bin);
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char* Elf_(r_bin_elf_get_arch)(struct Elf_(r_bin_elf_obj_t) *bin);
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char* Elf_(r_bin_elf_get_machine_name)(struct Elf_(r_bin_elf_obj_t) *bin);
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char* Elf_(r_bin_elf_get_head_flag)(struct Elf_(r_bin_elf_obj_t) *bin); //yin
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char* Elf_(r_bin_elf_get_head_flag)(ELFOBJ *bin); //yin
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char* Elf_(r_bin_elf_get_abi)(ELFOBJ *bin);
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char* Elf_(r_bin_elf_get_cpu)(ELFOBJ *bin);
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char* Elf_(r_bin_elf_get_file_type)(struct Elf_(r_bin_elf_obj_t) *bin);
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char* Elf_(r_bin_elf_get_elf_class)(struct Elf_(r_bin_elf_obj_t) *bin);
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int Elf_(r_bin_elf_get_bits)(struct Elf_(r_bin_elf_obj_t) *bin);
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@ -1125,6 +1125,14 @@ static RBinInfo* info(RBinFile *bf) {
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return NULL;
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}
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ret->arch = str;
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if ((str = Elf_(r_bin_elf_get_cpu) (obj))) {
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ret->cpu = str;
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}
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if ((str = Elf_(r_bin_elf_get_abi) (obj))) {
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ret->features = str;
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}
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ret->rclass = strdup ("elf");
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ret->bits = Elf_(r_bin_elf_get_bits) (obj);
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if (!strcmp (ret->arch, "avr")) {
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@ -796,6 +796,9 @@ static int bin_info(RCore *r, int mode, ut64 laddr) {
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if (info->cpu && *info->cpu) {
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r_config_set (r->config, "asm.cpu", info->cpu);
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}
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if (info->features && *info->features) {
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r_config_set (r->config, "asm.features", info->features);
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}
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r_config_set (r->config, "anal.arch", info->arch);
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snprintf (str, R_FLAG_NAME_SIZE, "%i", info->bits);
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r_config_set (r->config, "asm.bits", str);
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@ -209,6 +209,7 @@ typedef struct r_bin_info_t {
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char *cpu;
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char *machine;
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char *head_flag;
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char *features;
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char *os;
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char *subsystem;
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char *rpath;
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@ -344,9 +344,9 @@ iA
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iAj
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EOF
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EXPECT=<<EOF
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0 0x00000000 266108 mips_32 mips1
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0 0x00000000 266108 mips_32 mips1 o32
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{"bins":[{"arch":"mips","bits":32,"offset":0,"size":266108,"isa":"mips1","machine":"MIPS R3000"}]}
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{"bins":[{"arch":"mips","bits":32,"offset":0,"size":266108,"isa":"mips1","features":"o32","machine":"MIPS R3000"}]}
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EOF
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RUN
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@ -357,9 +357,9 @@ iA
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iAj
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EOF
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EXPECT=<<EOF
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0 0x00000000 1039368 mips_64 mips64r2
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0 0x00000000 1039368 mips_64 mips64r2 n64
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{"bins":[{"arch":"mips","bits":64,"offset":0,"size":1039368,"isa":"mips64r2","machine":"MIPS R3000"}]}
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{"bins":[{"arch":"mips","bits":64,"offset":0,"size":1039368,"isa":"mips64r2","features":"n64","machine":"MIPS R3000"}]}
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EOF
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RUN
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@ -72,6 +72,23 @@ EXPECT=<<EOF
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EOF
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RUN
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NAME=MIPS new abi
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FILE=bins/elf/analysis/mips64r2-busybox-loongson
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CMDS=<<EOF
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e asm.arch=mips.gnu
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s 0x120005978
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pd 6
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EOF
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EXPECT=<<EOF
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0x120005978 1800bfff sd ra, 24(sp)
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0x12000597c 3800a7ff sd a3, 56(sp)
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0x120005980 4000a8ff sd a4, 64(sp)
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0x120005984 4800a9ff sd a5, 72(sp)
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0x120005988 5000aaff sd a6, 80(sp)
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0x12000598c 5800abff sd a7, 88(sp)
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EOF
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RUN
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NAME=mac ls pdsf
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FILE=bins/mach0/mac-ls
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CMDS=<<EOF
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