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Fixed ESIL for cbz and cbnz on arm16 -- checks reg instead of zf (#8983)
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@ -1502,10 +1502,12 @@ r4,r5,r6,3,sp,[*],12,sp,+=
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r_strbuf_appendf (&op->esil, "%s,%s,=", ARG(1), REG(0));
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break;
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case ARM_INS_CBZ:
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r_strbuf_appendf (&op->esil, "zf,?{,%s,pc,=", ARG(0));
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r_strbuf_appendf (&op->esil, "%s,!,?{,%"PFMT32u",pc,=,}",
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REG(0), IMM(1));
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break;
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case ARM_INS_CBNZ:
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r_strbuf_appendf (&op->esil, "zf,!,?{,%s,pc,=", ARG(0));
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r_strbuf_appendf (&op->esil, "%s,?{,%"PFMT32u",pc,=,}",
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REG(0), IMM(1));
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break;
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// TODO (maybe?): ARM Cortex allows for a STRD "double word" 64-bit store
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// e.g. 'strD r1, r2, [r3]'
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