mirror of
https://github.com/radareorg/radare2.git
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Remove armthumb plugin
Moved to radare2-extras Replaced by arm.winedbg
This commit is contained in:
Roi Martin (@nibble_ds)
parent
3df277d84b
commit
d37ce1da7b
@ -9,6 +9,8 @@
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/* DEPRECATE ?? */
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#include "arm/arm.h"
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#include "../asm/arch/arm/arm.h"
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#include "../asm/arch/arm/winedbg/be_arm.h"
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static unsigned int disarm_branch_offset (unsigned int pc, unsigned int insoff) {
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unsigned int add = insoff << 2;
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@ -41,13 +43,18 @@ static unsigned int disarm_branch_offset (unsigned int pc, unsigned int insoff)
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(IS_BRANCH (x) || IS_RETURN (x) || IS_UNKJMP (x))
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#define API static
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#include "../../asm/arch/arm/armthumb.c"
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static int op_thumb(RAnal *anal, RAnalOp *op, ut64 addr, const ut8 *data, int len) {
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int op_code;
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ut16 *_ins = (ut16*)data;
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ut16 ins = *_ins;
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op->length = armthumb_length (ins);
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struct arm_insn *arminsn = arm_new();
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arm_set_thumb(arminsn, R_TRUE);
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arm_set_input_buffer(arminsn, data);
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op->length = arm_disasm_one_insn(arminsn);
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arm_free(arminsn);
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// TODO: handle 32bit instructions (branches are not correctly decoded //
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/* CMP */
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@ -1,4 +1,4 @@
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OBJ_ARM=anal_arm.o
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OBJ_ARM=anal_arm.o $(TOP)/libr/asm/arch/arm/winedbg/be_arm.o
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STATIC_OBJ+=${OBJ_ARM}
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TARGET_ARM=anal_arm.${EXT_SO}
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@ -1,8 +1,22 @@
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#ifndef _INCLUDE_ARMTHUMB_H_
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#define _INCLUDE_ARMTHUMB_H_
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#ifndef _INCLUDE_ARMASS_H_
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#define _INCLUDE_ARMASS_H_
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#define B1111 15
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#define B1110 14
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#define B1101 13
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#define B1100 12
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#define B1011 11
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#define B1010 10
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#define B1001 9
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#define B1000 8
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#define B0111 7
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#define B0110 6
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#define B0101 5
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#define B0100 4
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#define B0011 3
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#define B0010 2
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#define _(a,b,c,d) ((a<<12)|(b<<8)|(c<<4)|(d))
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int armthumb_length(unsigned int ins);
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int armthumb_disassemble(char *buf, unsigned long pc, unsigned int ins);
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int armass_assemble(const char *str, unsigned long off, int thumb);
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#endif
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@ -1,318 +0,0 @@
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/*
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* This code is a port in C of the C++ THUMB ARM disassembler done by KennyTM
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* http://networkpx.googlecode.com
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* This code is licensed under the GPL
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*
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* Author: KennyTM
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* -- pancake<nopcode.org> Copyright 2010
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*/
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// TODO: remove/integrate code analysis stuff
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#include <stdio.h>
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#include <string.h>
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// TODO: move into r_types.h .. _() is used by gettext() can conflict ?
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#define B1111 15
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#define B1110 14
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#define B1101 13
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#define B1100 12
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#define B1011 11
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#define B1010 10
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#define B1001 9
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#define B1000 8
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#define B0111 7
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#define B0110 6
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#define B0101 5
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#define B0100 4
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#define B0011 3
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#define B0010 2
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#define _(a,b,c,d) ((a<<12)|(b<<8)|(c<<4)|(d))
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#ifndef API
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#define API
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#endif
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#define regname(x) (x>=0&&x<16)?regNames[x]:"r?"
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static const char* regNames[] = {
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"r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
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"r8", "r9", "sl", "fp", "ip", "sp", "lr", "pc"
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};
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static const char* ops_cond[] = {
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"eq","ne","cs","cc","mi","pl","vs","vc","hi",
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"ls","ge","lt","gt","le","al","??"
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};
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static const char* ops_dp3[] = {"mov", "cmp", "add", "sub"};
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static const char* ops_dp4[] = {"lsl", "lsr", "asr"};
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static const char* ops_dp5[] = {
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"and", "eor", "lsl", "lsr", "asr", "adc", "sbc", "ror",
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"tst", "neg", "cmp", "cmn", "orr", "mul", "bic", "mvn"
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};
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static const char* ops_dp8[] = {"add", "cmp", "mov"};
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static const char* ops_ls1[] = {"str", "ldr", "strb", "ldrb", "strh", "ldrh"};
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static const char* ops_ls2[] = {
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"str", "strh", "strb", "ldrsb", "ldr", "ldrh", "ldrb", "ldrsh"
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};
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static const char* ops_rev[] = {"rev", "rev16", "rev??", "revsh"};
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static const char* ops_xt[] = {"sxth", "sxtb", "uxth", "uxtb"};
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static inline unsigned int ror (unsigned int value, int shift) {
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shift &= 31;
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return (value >> shift) | (value << (32 - shift));
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}
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static char tmpbuf[4*16+1];
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static const char* compute_reg_list (unsigned list) {
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int i, idx = 1, mark = 0;
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const char *name;
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tmpbuf[0] = '{';
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for (i = 0; i<16; i++) {
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if (list & (1<<i)) {
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if (mark) {
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tmpbuf[idx++] = ',';
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tmpbuf[idx++] = ' ';
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} else mark = 1;
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name = regname(i);
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tmpbuf[idx++] = name[0];
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tmpbuf[idx++] = name[1];
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}
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}
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tmpbuf[idx++] = '}';
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tmpbuf[idx++] = '\0';
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return tmpbuf;
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}
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API int armthumb_length(unsigned int ins) {
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if ((ins & _(B1110,B1000,0,0)) == _(B1110,0,0,0))
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if (ins & _(1,B1000,0,0))
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return 4;
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return 2;
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}
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API int armthumb_disassemble(char *buf, unsigned long pc, unsigned int ins) {
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unsigned int delta, imm, jump, op_code, instr2 = ins >> 16;
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const char* op;
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pc += 4;
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ins &= 0xFFFF;
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// Conditional branch
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if ( (ins & _(B1111,0,0,0)) == _(B1101,0,0,0) ) {
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op_code = (ins & _(0,B1111,0,0)) >> 8;
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op = ops_cond[op_code];
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imm = (ins & _(0,0,B1111,B1111));
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delta = imm << 1;
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if (imm & (1<<7))
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delta |= ~_(0,1,B1111,B1111);
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jump = pc + delta;
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sprintf(buf, "b%s 0x%x", op, jump);
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// Unconditional branch
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} else if ( (ins & _(B1110,B1000,0,0)) == _(B1110,0,0,0) ) {
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op_code = (ins & _(1,B1000,0,0));
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imm = (ins & _(0,B0111,B1111,B1111));
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delta = imm << 1;
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if (imm & (1<<10))
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delta |= ~_(0,B1111,B1111,B1111);
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if (!op_code) {
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jump = pc + delta;
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sprintf (buf, "b 0x%x", jump);
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} else {
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// need to read one more ins.
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ins |= instr2 << 16;
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if ( (instr2 & _(B1110,B1000,0,0)) == _(B1110,B1000,0,0) ) {
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op_code = instr2 & (1<<12);
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jump = (delta << 11 | (instr2&_(0,B0111,B1111,B1111))<<1) + pc;
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if (!op_code) jump &= ~3;
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sprintf(buf, "%s 0x%x", op_code?"bl":"blx", jump);
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} else return 0;
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return 4;
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}
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// Branch with Exchange
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} else if ( (ins & _(B1111,B1111,0,0)) == _(B0100,B0111,0,0) ) {
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unsigned int Rm = (ins & _(0,0,B0111,B1000)) >> 3;
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op_code = (ins & (1<<7));
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sprintf(buf, "blx %s", regname(Rm));
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// Data-processing, format 1
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} else if ( (ins & _(B1111,B1100,0,0)) == _(1,B1000,0,0) ) {
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unsigned int Rm = (ins & _(0,1,B1100,0)) >> 6;
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unsigned int Rn = (ins & _(0,0,B0011,B1000)) >> 3;
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unsigned int Rd = (ins & _(0,0,0,B0111));
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op = (ins&(1<<9))? "sub" : "add";
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sprintf(buf, "%s %s, %s, %s", op, regname(Rd), regname(Rn), regname(Rm));
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// Data-processing, format 2
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} else if ( (ins & _(B1111,B1100,0,0)) == _(1,B1100,0,0) ) {
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unsigned imm = (ins & _(0,1,B1100,0)) >> 6;
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unsigned Rn = (ins & _(0,0,B0011,B1000)) >> 3;
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unsigned Rd = (ins & _(0,0,0,B0111));
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op = (ins & (1<<9)) ? "sub" : "add";
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sprintf(buf, "%s %s, %s, #%d", op, regname(Rd), regname(Rn), imm);
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// Data-processing, format 3
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} else if ( (ins & _(B1110,0,0,0)) == _(B0010,0,0,0) ) {
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unsigned RdRn = (ins & _(0,B0111,0,0)) >> 8;
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unsigned imm = (ins & _(0,0,B1111,B1111));
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op = ops_dp3[(ins & _(1,B1000,0,0)) >> 11];
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sprintf(buf, "%s %s, #%d", op, regname(RdRn), imm);
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// Data-processing, format 4
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} else if ( (ins & _(B1110,0,0,0)) == _(0,0,0,0) ) {
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unsigned imm = (ins & _(0,B0111,B1100,0)) >> 6;
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unsigned Rm = (ins & _(0,0,B0011,B1000)) >> 3;
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unsigned Rd = (ins & _(0,0,0,B0111));
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op_code = (ins & _(1,B1000,0,0)) >> 11;
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op = ops_dp4[op_code];
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sprintf(buf, "%s %s, %s, #%d", op, regname(Rd), regname(Rm), imm);
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// Data-processing, format 5
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} else if ( (ins & _(B1111,B1100,0,0)) == _(B0100,0,0,0) ) {
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unsigned Rm = (ins & _(0,0,B0011,B1000)) >> 3;
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unsigned Rd = (ins & _(0,0,0,B0111));
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op_code = (ins & _(0,B0011,B1100,0)) >> 6;
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op = ops_dp5[op_code];
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sprintf(buf, "%s %s, %s", op, regname(Rd), regname(Rm));
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#if 0
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switch (op_code) {
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case 15: r[Rd] = ~r[Rm]; break;
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// FIXME: check carry flag.
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case 5: r[Rd] += r[Rm]; break;
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case 6: r[Rd] -= r[Rm]; break;
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case 9: r[Rd] = -r[Rm]; break;
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case 13: r[Rd] *= r[Rm]; break;
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case 2: r[Rd] <<= r[Rm]; break;
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case 3: r[Rd] = ((unsigned)r[Rd]) >> r[Rm]; break;
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case 4: r[Rd] >>= r[Rm]; break;
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case 7: r[Rd] = ror((unsigned)r[Rd], r[Rm]); break;
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case 0: r[Rd] &= r[Rm]; break;
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case 1: r[Rd] ^= r[Rm]; break;
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case 12: r[Rd] |= r[Rm]; break;
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case 14: r[Rd] &= ~r[Rm]; break;
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}
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#endif
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// Data-processing, format 6
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} else if ( (ins & _(B1111,0,0,0)) == _(B1010,0,0,0) ) {
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unsigned Rd = (ins & _(0,B0111,0,0)) >> 8;
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unsigned imm = (ins & _(0,0,B1111,B1111)) * 4;
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op_code = (ins & (1<<11));
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sprintf(buf, "add %s, %s, #%d", regname(Rd), op_code?"sp":"pc", imm);
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// Data-processing, format 7
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} else if ( (ins & _(B1111,B1111,0,0)) == _(B1011,0,0,0) ) {
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op_code = (ins & (1<<7));
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imm = (ins & _(0,0,B0111,B1111)) * 4;
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sprintf(buf, "%s sp, sp, #%d", op_code ? "sub" : "add", imm);
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//if (op_code) sp -= imm; else sp += imm;
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// Data-processing, format 8
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} else if ( (ins & _(B1111,B1100,0,0)) == _(B0100,B0100,0,0) ) {
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unsigned Rm = (ins & _(0,0,B0111,B1000)) >> 3;
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unsigned RdRn = (ins & _(0,0,0,B0111)) | (ins & (1<<7))>>4;
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op_code = (ins & _(0,B0011,0,0)) >> 8;
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op = ops_dp8[op_code];
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sprintf (buf, "%s %s, %s", op, regname(RdRn), regname(Rm));
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// Load & Store, format 1
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} else if ( (op_code = ((ins & _(B1111,B1000,0,0)) >> 11)) >= 12 && op_code <= 17 ) {
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unsigned int mask, imm = (ins & _(0,B0111,B1100,0)) >> 6;
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unsigned Rn = (ins & _(0,0,B0011,B1000)) >> 3;
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unsigned Rd = (ins & _(0,0,0,B0111));
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op_code -= 12;
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op = ops_ls1[op_code];
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switch (op_code & ~1) {
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case 0: imm *= 4; mask = 0xFFFFFFFF; break;
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case 4: imm *= 2; mask = 0xFFFF; break;
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default: mask = 0xFF; break;
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}
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sprintf(buf, "%s %s, [%s, #%d]", op, regname(Rd), regname(Rn), imm&mask);
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//if (op_code & 1) this->load_reference(r[Rn]+imm, Rd, mask);
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//else this->store_reference(r[Rn]+imm, r[Rd], mask);
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// Load & Store, format 2
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} else if ( (ins & _(B1111,0,0,0)) == _(B0101,0,0,0) ) {
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unsigned Rm = (ins & _(0,1,B1100,0)) >> 6;
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unsigned Rn = (ins & _(0,0,B0011,B1000)) >> 3;
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unsigned Rd = (ins & _(0,0,0,B0111));
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op_code = (ins & _(0,B1110,0,0)) >> 9;
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op = ops_ls2[op_code];
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sprintf(buf, "%s %s, [%s, %s]", op, regname(Rd), regname(Rn), regname(Rm));
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#if 0
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int mask, isSigned = (op_code == 3 || op_code == 7);
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switch (op_code) {
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case 4: case 0: mask = 0xFFFFFFFF; break;
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case 5: case 7: case 1: mask = 0xFFFF; break;
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case 6: case 3: case 2: mask = 0xFF; break;
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}
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if (op_code >= 3) this->load_reference(r[Rn]+r[Rm], Rd, mask, isSigned);
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else this->store_reference(r[Rn]+r[Rm], r[Rd], mask);
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#endif
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// Load & Store, format 3
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} else if ( (ins & _(B1111,B1000,0,0)) == _(B0100,B1000,0,0) ) {
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unsigned Rd = (ins & _(0,B0111,0,0)) >> 8;
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unsigned imm = (ins & _(0,0,B1111,B1111)) * 4;
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sprintf(buf, "ldr %s, [pc, #%d]", regname(Rd), imm);
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//this->load_reference((pc&~3) + imm, Rd);
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// Load & Store, format 4
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} else if ( (ins & _(B1111,0,0,0)) == _(B1001,0,0,0) ) {
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unsigned int Rd = (ins & _(0,B0111,0,0)) >> 8;
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unsigned int imm = (ins & _(0,0,B1111,B1111)) * 4;
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op_code = (ins & (1<<11));
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sprintf (buf, "%s %s, [sp, #%d]", op_code?"ldr":"str", regname(Rd), imm);
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// Load/Store multiple, format 1
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} else if ( (ins & _(B1111,0,0,0)) == _(B1100,0,0,0) ) {
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unsigned Rd = (ins & _(0,B0111,0,0)) >> 8;
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unsigned reglist = (ins & _(0,0,B1111,B1111));
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op_code = (ins & (1<<11));
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sprintf(buf, "%s %s, %s", op_code?"ldmia":"stmia", regname(Rd),
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compute_reg_list(reglist));
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// Load/Store multiple, format 2
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} else if ( (ins & _(B1111,B0110,0,0)) == _(B1011,B0100,0,0) ) {
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unsigned reglist = (ins & _(0,0,B1111,B1111));
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op_code = (ins & (1<<11));
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if (ins & (1<<8)) { // pop
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if (op_code) reglist |= (1<<15);
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else reglist |= (1<<14);
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}
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sprintf(buf, "%s %s", op_code?"pop":"push", compute_reg_list(reglist));
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//if (op_code) ldmia(13, reglist); else stmdb(13, reglist);
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// BKPT
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} else if ( (ins & _(B1111,B1111,0,0)) == _(B1011,B1110,0,0) ) {
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sprintf(buf, "bkpt %d", ins & 0xFF);
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// CPS
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} else if ( (ins & _(B1111,B1111,B1110,B1000)) == _(B1011,B0110,B0110,0) ) {
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sprintf(buf, "cpsi%c %s%s%s", (ins&(1<<4))?'d':'e',
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(ins&(1<<2))?"a":"", (ins&(1<<1))?"i":"", (ins&(1<<0))?"f":"");
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// REV
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} else if ( (ins & _(B1111,B1111,0,0)) == _(B1011,B1010,0,0) ) {
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unsigned Rn = (ins & _(0,0,B0011,B1000)) >> 3;
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unsigned Rd = (ins & _(0,0,0,B0111));
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op_code = (ins & _(0,0,B1100,0)) >> 6;
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op = ops_rev[op_code];
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sprintf(buf, "%s %s, %s", op, regname(Rd), regname(Rn));
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// SETEND
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// FIXME: We're ignoring it.
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} else if ( (ins & _(B1111,B1111,B1111,B0111)) == _(B1011,B0110,B0101,0) ) {
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sprintf(buf, "setend %ce", ins&(1<<3)?'b':'l');
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// SWI
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} else if ( (ins & _(B1111,B1111,0,0)) == _(B1101,B1111,0,0)) {
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sprintf(buf, "swi %d", ins & 0xFF);
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// Signed/Unsigned extension.
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} else if ( (ins & _(B1111,B1111,0,0)) == _(B1011,B0010,0,0)) {
|
||||
unsigned int Rn = (ins & _(0,0,B0011,B1000)) >> 3;
|
||||
unsigned int Rd = (ins & _(0,0,0,B0111));
|
||||
op_code = (ins & _(0,0,B1100,0)) >> 6;
|
||||
op = ops_xt[op_code];
|
||||
sprintf(buf, "%s %s, %s", op, regname(Rd), regname(Rn));
|
||||
#if 0
|
||||
unsigned int mask = (op_code & 1) ? 0xFF : 0xFFFF;
|
||||
r[Rd] = r[Rn] & mask;
|
||||
if ((op_code & 2) && (r[Rd] & ((mask+1)>>1)))
|
||||
r[Rd] |= ~mask;
|
||||
#endif
|
||||
} else return 0;
|
||||
return 2;
|
||||
}
|
||||
|
||||
#if MAIN
|
||||
int main (int argc, char* argv[]) {
|
||||
char op[80];
|
||||
int i, len;
|
||||
|
||||
for (i=0; i<0xffff; i+=81) {
|
||||
len = thumb_disassemble (op, 0x4000, i);
|
||||
if(len>0) printf("%d %s\n", len, op);
|
||||
else printf("?\n");
|
||||
}
|
||||
return 0;
|
||||
}
|
||||
#endif
|
||||
@ -1,11 +0,0 @@
|
||||
OBJ_ARMTHUMB=asm_armthumb.o
|
||||
OBJ_ARMTHUMB+=../arch/arm/armthumb.o
|
||||
|
||||
STATIC_OBJ+=${OBJ_ARMTHUMB}
|
||||
TARGET_ARMTHUMB=asm_armthumb.${EXT_SO}
|
||||
|
||||
ALL_TARGETS+=${TARGET_ARMTHUMB}
|
||||
|
||||
${TARGET_ARMTHUMB}: ${OBJ_ARMTHUMB}
|
||||
${CC} $(call libname,asm_armthumb) ${LDFLAGS} \
|
||||
${CFLAGS} -o asm_armthumb.${EXT_SO} ${OBJ_ARMTHUMB}
|
||||
@ -1,45 +0,0 @@
|
||||
/* radare - LGPL - Copyright 2010 pancake<nopcode.org> */
|
||||
|
||||
#include <stdio.h>
|
||||
#include <stdarg.h>
|
||||
#include <string.h>
|
||||
#include <r_types.h>
|
||||
#include <r_util.h>
|
||||
#include <r_lib.h>
|
||||
#include <r_asm.h>
|
||||
#include "../arch/arm/arm.h"
|
||||
|
||||
static int disassemble(RAsm *a, RAsmOp *op, const ut8 *buf, ut64 len) {
|
||||
int *p = (int*)buf; // TODO : endian
|
||||
op->buf_asm[0]='\0';
|
||||
op->inst_len = armthumb_disassemble (op->buf_asm, (ut32)a->pc, *p);
|
||||
if (!op->inst_len)
|
||||
strncpy (op->buf_asm, " (data)", R_ASM_BUFSIZE);
|
||||
return op->inst_len;
|
||||
}
|
||||
|
||||
static int assemble(RAsm *a, RAsmOp *op, const char *buf) {
|
||||
int opcode = armass_assemble (buf, a->pc, R_TRUE);
|
||||
if (opcode==-1)
|
||||
return -1;
|
||||
r_mem_copyendian (op->buf, (void *)&opcode, 2, a->big_endian);
|
||||
return armthumb_length (opcode);
|
||||
}
|
||||
|
||||
RAsmPlugin r_asm_plugin_armthumb = {
|
||||
.name = "armthumb",
|
||||
.arch = "armthumb",
|
||||
.bits = (int[]){ 16, 0 },
|
||||
.desc = "ARM THUMB disassembly plugin",
|
||||
.init = NULL,
|
||||
.fini = NULL,
|
||||
.disassemble = &disassemble,
|
||||
.assemble = &assemble
|
||||
};
|
||||
|
||||
#ifndef CORELIB
|
||||
struct r_lib_struct_t radare_plugin = {
|
||||
.type = R_LIB_TYPE_ASM,
|
||||
.data = &r_asm_plugin_armthumb
|
||||
};
|
||||
#endif
|
||||
@ -10,7 +10,6 @@ asm.java
|
||||
asm.bf
|
||||
asm.arm
|
||||
asm.arm_winedbg
|
||||
asm.armthumb
|
||||
asm.sh
|
||||
asm.csr
|
||||
asm.avr
|
||||
|
||||
Loading…
x
Reference in New Issue
Block a user