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Move xtensa into the ##arch

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pancake 2023-02-03 02:12:32 +01:00 committed by GitHub
parent 586af3fc6e
commit e11ce34c6f
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GPG Key ID: 4AEE18F83AFDEB23
18 changed files with 99 additions and 87 deletions
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2
dist/plugins-cfg/plugins.def.cfg vendored
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@ -58,7 +58,7 @@ anal.wasm
arch.ws
anal.x86_cs
anal.xcore_cs
anal.xtensa
arch.xtensa
anal.z80
arch.amd29k
arch.xap

2
dist/plugins-cfg/plugins.mingw.cfg vendored
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@ -1,6 +1,6 @@
STATIC="anal.8051
anal.alpha
anal.xtensa
arch.xtensa
anal.arc
anal.arm_cs
anal.arm_gnu

2
dist/plugins-cfg/plugins.nocs.cfg vendored
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@ -15,7 +15,7 @@ anal.i8080
anal.java
anal.kvx
anal.lh5801
anal.xtensa
arch.xtensa
arch.mcore
anal.mips_gnu
anal.lanai_gnu

5
libr/anal/meson.build
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@ -116,7 +116,6 @@ r_anal_sources = [
# join_paths('arch/whitespace/wsdis.c'),
'p/anal_x86_cs.c',
'p/anal_xcore_cs.c',
'p/anal_xtensa.c',
'p/anal_z80.c',
#join_paths('arch','gb','meta_gb_cmt.c'),
'arch/ebc/ebc_disas.c',
@ -160,10 +159,6 @@ r_anal_sources = [
'../asm/arch/tricore/gnu/cpu-tricore.c',
'../asm/arch/tricore/gnu/tricore-dis.c',
'../asm/arch/tricore/gnu/tricore-opc.c',
'../asm/arch/xtensa/gnu/xtensa-dis.c',
'../asm/arch/xtensa/gnu/elf32-xtensa.c',
'../asm/arch/xtensa/gnu/xtensa-isa.c',
'../asm/arch/xtensa/gnu/xtensa-modules.c',
'../asm/arch/pyc/opcode_all.c',
'../asm/arch/pyc/opcode_anal.c',
'../asm/arch/pyc/opcode_arg_fmt.c',

14
libr/anal/p/xtensa.mk
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@ -1,14 +0,0 @@
OBJ_XTENSA=anal_xtensa.o
OBJ_XTENSA+=../../asm/arch/xtensa/gnu/xtensa-dis.o
OBJ_XTENSA+=../../asm/arch/xtensa/gnu/xtensa-isa.o
OBJ_XTENSA+=../../asm/arch/xtensa/gnu/xtensa-modules.o
OBJ_XTENSA+=../../asm/arch/xtensa/gnu/elf32-xtensa.o
STATIC_OBJ+=${OBJ_XTENSA}
TARGET_XTENSA=anal_xtensa.${EXT_SO}
ALL_TARGETS+=$(TARGET_XTENSA)
$(TARGET_XTENSA): $(OBJ_XTENSA)
$(CC) $(call libname,anal_xtensa) -I$(LTOP)/asm/arch/include/ \
$(LDFLAGS) $(CFLAGS) -o anal_xtensa.$(EXT_SO) $(OBJ_XTENSA)

5
libr/arch/meson.build
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@ -7,6 +7,11 @@ r_arch_sources = [
'arch_cond.c',
'arch_value.c',
'p/null/plugin.c',
'p/xtensa/plugin.c',
'p/xtensa/gnu/elf32-xtensa.c',
'p/xtensa/gnu/xtensa-dis.c',
'p/xtensa/gnu/xtensa-isa.c',
'p/xtensa/gnu/xtensa-modules.c',
'p/evm/plugin.c',
'p/propeller/plugin.c',
'p/propeller/propeller_disas.c',

3
libr/arch/p/amd29k/plugin.c
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@ -643,6 +643,9 @@ static bool decode(RArchSession *a, RAnalOp *op, RArchDecodeMask mask) {
int len = op->size;
ut64 addr = op->addr;
if (len < 4) {
return false;
}
RArchConfig *cfg = a->config;
op->size = 4;
op->eob = false;

2
libr/arch/p/lua.mk
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@ -1,4 +1,4 @@
OBJ_LUA=arch_lua.o
OBJ_LUA=p/lua/plugin.o
STATIC_OBJ+=$(OBJ_LUA)
TARGET_LUA=arch_lua.${EXT_SO}

4
libr/arch/p/arch_lua.c → libr/arch/p/lua/plugin.c
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@ -4,8 +4,8 @@
#include <r_lib.h>
// XXX should be dynlink
#include "lua/lua53.c"
#include "lua/lua53_parser.c"
#include "lua53.c"
#include "lua53_parser.c"
static bool encode(RArchSession *as, RAnalOp *op, RArchEncodeMask mask) {
int parsed = 0;

14
libr/arch/p/xtensa.mk Normal file
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@ -0,0 +1,14 @@
OBJ_XTENSA=p/xtensa/plugin.o
OBJ_XTENSA+=p/xtensa/gnu/xtensa-dis.o
OBJ_XTENSA+=p/xtensa/gnu/xtensa-isa.o
OBJ_XTENSA+=p/xtensa/gnu/xtensa-modules.o
OBJ_XTENSA+=p/xtensa/gnu/elf32-xtensa.o
STATIC_OBJ+=${OBJ_XTENSA}
TARGET_XTENSA=arch_xtensa.${EXT_SO}
ALL_TARGETS+=$(TARGET_XTENSA)
CFLAGS+=-I$(LTOP)/asm/arch/include
$(TARGET_XTENSA): $(OBJ_XTENSA)
$(CC) $(call libname,arch_xtensa) $(LDFLAGS) $(CFLAGS) -o arch_xtensa.$(EXT_SO) $(OBJ_XTENSA)

0
libr/asm/arch/xtensa/gnu/elf32-xtensa.c → libr/arch/p/xtensa/gnu/elf32-xtensa.c
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0
libr/asm/arch/xtensa/gnu/xtensa-dis.c → libr/arch/p/xtensa/gnu/xtensa-dis.c
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6
libr/asm/arch/xtensa/gnu/xtensa-isa.c → libr/arch/p/xtensa/gnu/xtensa-isa.c
View File

@ -21,9 +21,9 @@
#include <r_types.h>
#include <r_util.h>
#include "../../include/disas-asm.h"
#include "../../include/xtensa-isa.h"
#include "../../include/xtensa-isa-internal.h"
#include "disas-asm.h"
#include "xtensa-isa.h"
#include "xtensa-isa-internal.h"
static int filename_cmp(const char *s1, const char *s2) {
#if !defined(HAVE_DOS_BASED_FILE_SYSTEM) \

4
libr/asm/arch/xtensa/gnu/xtensa-modules.c → libr/arch/p/xtensa/gnu/xtensa-modules.c
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@ -22,8 +22,8 @@
#define ATTRIBUTE_UNUSED
#endif
//#include "ansidecl.h"
#include "../../include/xtensa-isa.h"
#include "../../include/xtensa-isa-internal.h"
#include "xtensa-isa.h"
#include "xtensa-isa-internal.h"
/* Sysregs. */

117
libr/anal/p/anal_xtensa.c → libr/arch/p/xtensa/plugin.c
View File

@ -1,4 +1,4 @@
/* radare2 - LGPL - Copyright 2016-2022 - pancake */
/* radare2 - LGPL - Copyright 2016-2023 - pancake */
#include <r_asm.h>
#include <r_anal.h>
@ -29,7 +29,7 @@ static void memory_error_func(int status, bfd_vma memaddr, struct disassemble_in
DECLARE_GENERIC_PRINT_ADDRESS_FUNC_NOGLOBALS()
DECLARE_GENERIC_FPRINTF_FUNC_NOGLOBALS()
static int disassemble(RAnal *a, RAnalOp *op, ut64 addr, const ut8 *buf, int len) {
static int disassemble(RArchSession *a, RAnalOp *op, ut64 addr, const ut8 *buf, int len) {
ut8 bytes[INSN_BUFFER_SIZE] = {0};
struct disassemble_info disasm_obj;
RStrBuf *sb = r_strbuf_new ("");
@ -65,6 +65,7 @@ static int disassemble(RAnal *a, RAnalOp *op, ut64 addr, const ut8 *buf, int len
#define XTENSA_MAX_LENGTH 8
static const int length_table[16] = { 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 8, 8 };
static int xtensa_length(const ut8 *insn) {
return length_table[*insn & 0xf];
}
@ -105,74 +106,74 @@ static inline ut64 xtensa_imm12s(ut64 addr, const ut8 *buf) {
return (addr + 4 + imm12);
}
typedef void (*XtensaOpFn) (RAnal *anal, RAnalOp *op, ut64 addr, const ut8 *buf);
typedef void (*XtensaOpFn) (RArchSession *anal, RAnalOp *op, ut64 addr, const ut8 *buf);
static void xtensa_null_op(RAnal *anal, RAnalOp *op, ut64 addr, const ut8 *buf) {
static void xtensa_null_op(RArchSession *anal, RAnalOp *op, ut64 addr, const ut8 *buf) {
op->type = R_ANAL_OP_TYPE_NULL;
}
static void xtensa_unk_op(RAnal *anal, RAnalOp *op, ut64 addr, const ut8 *buf) {
static void xtensa_unk_op(RArchSession *anal, RAnalOp *op, ut64 addr, const ut8 *buf) {
op->type = R_ANAL_OP_TYPE_UNK;
}
static void xtensa_mov_op(RAnal *anal, RAnalOp *op, ut64 addr, const ut8 *buf) {
static void xtensa_mov_op(RArchSession *anal, RAnalOp *op, ut64 addr, const ut8 *buf) {
op->type = R_ANAL_OP_TYPE_MOV;
}
static void xtensa_load_op(RAnal *anal, RAnalOp *op, ut64 addr, const ut8 *buf) {
static void xtensa_load_op(RArchSession *anal, RAnalOp *op, ut64 addr, const ut8 *buf) {
op->type = R_ANAL_OP_TYPE_LOAD;
}
static void xtensa_store_op(RAnal *anal, RAnalOp *op, ut64 addr, const ut8 *buf) {
static void xtensa_store_op(RArchSession *anal, RAnalOp *op, ut64 addr, const ut8 *buf) {
op->type = R_ANAL_OP_TYPE_STORE;
}
static void xtensa_add_op(RAnal *anal, RAnalOp *op, ut64 addr, const ut8 *buf) {
static void xtensa_add_op(RArchSession *anal, RAnalOp *op, ut64 addr, const ut8 *buf) {
op->type = R_ANAL_OP_TYPE_ADD;
}
static void xtensa_sub_op(RAnal *anal, RAnalOp *op, ut64 addr, const ut8 *buf) {
static void xtensa_sub_op(RArchSession *anal, RAnalOp *op, ut64 addr, const ut8 *buf) {
op->type = R_ANAL_OP_TYPE_SUB;
}
static void xtensa_mul_op(RAnal *anal, RAnalOp *op, ut64 addr, const ut8 *buf) {
static void xtensa_mul_op(RArchSession *anal, RAnalOp *op, ut64 addr, const ut8 *buf) {
op->type = R_ANAL_OP_TYPE_MUL;
}
static void xtensa_div_op(RAnal *anal, RAnalOp *op, ut64 addr, const ut8 *buf) {
static void xtensa_div_op(RArchSession *anal, RAnalOp *op, ut64 addr, const ut8 *buf) {
op->type = R_ANAL_OP_TYPE_DIV;
}
static void xtensa_mod_op(RAnal *anal, RAnalOp *op, ut64 addr, const ut8 *buf) {
static void xtensa_mod_op(RArchSession *anal, RAnalOp *op, ut64 addr, const ut8 *buf) {
op->type = R_ANAL_OP_TYPE_MOD;
}
static void xtensa_and_op(RAnal *anal, RAnalOp *op, ut64 addr, const ut8 *buf) {
static void xtensa_and_op(RArchSession *anal, RAnalOp *op, ut64 addr, const ut8 *buf) {
op->type = R_ANAL_OP_TYPE_AND;
}
static void xtensa_or_op(RAnal *anal, RAnalOp *op, ut64 addr, const ut8 *buf) {
static void xtensa_or_op(RArchSession *anal, RAnalOp *op, ut64 addr, const ut8 *buf) {
op->type = R_ANAL_OP_TYPE_OR;
}
static void xtensa_xor_op(RAnal *anal, RAnalOp *op, ut64 addr, const ut8 *buf) {
static void xtensa_xor_op(RArchSession *anal, RAnalOp *op, ut64 addr, const ut8 *buf) {
op->type = R_ANAL_OP_TYPE_XOR;
}
static void xtensa_shl_op(RAnal *anal, RAnalOp *op, ut64 addr, const ut8 *buf) {
static void xtensa_shl_op(RArchSession *anal, RAnalOp *op, ut64 addr, const ut8 *buf) {
op->type = R_ANAL_OP_TYPE_SHL;
}
static void xtensa_shr_op(RAnal *anal, RAnalOp *op, ut64 addr, const ut8 *buf) {
static void xtensa_shr_op(RArchSession *anal, RAnalOp *op, ut64 addr, const ut8 *buf) {
op->type = R_ANAL_OP_TYPE_SHR;
}
static void xtensa_l32r_op(RAnal *anal, RAnalOp *op, ut64 addr, const ut8 *buf) {
static void xtensa_l32r_op(RArchSession *anal, RAnalOp *op, ut64 addr, const ut8 *buf) {
op->type = R_ANAL_OP_TYPE_LOAD;
op->ptr = ((addr + 3) & ~3) + ((buf[2] << 8 | buf[1]) << 2) - 0x40000;
}
static void xtensa_snm0_op(RAnal *anal, RAnalOp *op, ut64 addr, const ut8 *buf) {
static void xtensa_snm0_op(RArchSession *anal, RAnalOp *op, ut64 addr, const ut8 *buf) {
switch ((buf[0] >> 4) & 0xf) {
case 0x0: case 0x1: case 0x2: case 0x3:
op->type = R_ANAL_OP_TYPE_ILL;
@ -192,7 +193,7 @@ static void xtensa_snm0_op(RAnal *anal, RAnalOp *op, ut64 addr, const ut8 *buf)
}
}
static void xtensa_sync_op(RAnal *anal, RAnalOp *op, ut64 addr, const ut8 *buf) {
static void xtensa_sync_op(RArchSession *anal, RAnalOp *op, ut64 addr, const ut8 *buf) {
switch ((buf[0] >> 4) & 0xf) {
case 0x0: case 0x1: case 0x2: case 0x3:
case 0x8:
@ -206,7 +207,7 @@ static void xtensa_sync_op(RAnal *anal, RAnalOp *op, ut64 addr, const ut8 *buf)
}
}
static void xtensa_rfei_op(RAnal *anal, RAnalOp *op, ut64 addr, const ut8 *buf) {
static void xtensa_rfei_op(RArchSession *anal, RAnalOp *op, ut64 addr, const ut8 *buf) {
switch ((buf[0] >> 4) & 0xf) {
case 0x0:
switch (buf[1] & 0xf) {
@ -228,7 +229,7 @@ static void xtensa_rfei_op(RAnal *anal, RAnalOp *op, ut64 addr, const ut8 *buf)
}
}
static void xtensa_st0_op(RAnal *anal, RAnalOp *op, ut64 addr, const ut8 *buf) {
static void xtensa_st0_op(RArchSession *anal, RAnalOp *op, ut64 addr, const ut8 *buf) {
switch ((buf[1] >> 4) & 0xf) {
case 0x0:
xtensa_snm0_op (anal, op, addr, buf);
@ -257,7 +258,7 @@ static void xtensa_st0_op(RAnal *anal, RAnalOp *op, ut64 addr, const ut8 *buf) {
}
}
static void xtensa_st1_op(RAnal *anal, RAnalOp *op, ut64 addr, const ut8 *buf) {
static void xtensa_st1_op(RArchSession *anal, RAnalOp *op, ut64 addr, const ut8 *buf) {
switch ((buf[1] >> 4) & 0xf) {
case 0x0: case 0x1: case 0x2: case 0x3:
case 0x4:
@ -281,7 +282,7 @@ static void xtensa_st1_op(RAnal *anal, RAnalOp *op, ut64 addr, const ut8 *buf) {
}
}
static void xtensa_rt0_op(RAnal *anal, RAnalOp *op, ut64 addr, const ut8 *buf) {
static void xtensa_rt0_op(RArchSession *anal, RAnalOp *op, ut64 addr, const ut8 *buf) {
switch (buf[1] & 0xf) {
case 0:
op->type = R_ANAL_OP_TYPE_NOT;
@ -296,7 +297,7 @@ static void xtensa_rt0_op(RAnal *anal, RAnalOp *op, ut64 addr, const ut8 *buf) {
}
}
static void xtensa_tlb_op(RAnal *anal, RAnalOp *op, ut64 addr, const ut8 *buf) {
static void xtensa_tlb_op(RArchSession *anal, RAnalOp *op, ut64 addr, const ut8 *buf) {
switch ((buf[2] >> 4) & 0xf) {
case 0x3:
case 0x4: case 0x5: case 0x6: case 0x7:
@ -310,7 +311,7 @@ static void xtensa_tlb_op(RAnal *anal, RAnalOp *op, ut64 addr, const ut8 *buf) {
}
}
static void xtensa_accer_op(RAnal *anal, RAnalOp *op, ut64 addr, const ut8 *buf) {
static void xtensa_accer_op(RArchSession *anal, RAnalOp *op, ut64 addr, const ut8 *buf) {
switch ((buf[2] >> 4) & 0xf) {
case 0x0:
case 0x8:
@ -323,7 +324,7 @@ static void xtensa_accer_op(RAnal *anal, RAnalOp *op, ut64 addr, const ut8 *buf)
}
}
static void xtensa_imp_op(RAnal *anal, RAnalOp *op, ut64 addr, const ut8 *buf) {
static void xtensa_imp_op(RArchSession *anal, RAnalOp *op, ut64 addr, const ut8 *buf) {
switch ((buf[1] >> 4) & 0xf) {
case 0x0: case 0x1: case 0x2: case 0x3:
case 0x8: case 0x9:
@ -399,19 +400,19 @@ static XtensaOpFn xtensa_rst2_fns[] = {
xtensa_mod_op
};
static void xtensa_rst0_op(RAnal *anal, RAnalOp *op, ut64 addr, const ut8 *buf) {
static void xtensa_rst0_op(RArchSession *anal, RAnalOp *op, ut64 addr, const ut8 *buf) {
xtensa_rst0_fns[(buf[2] >> 4) & 0xf] (anal, op, addr, buf);
}
static void xtensa_rst1_op(RAnal *anal, RAnalOp *op, ut64 addr, const ut8 *buf) {
static void xtensa_rst1_op(RArchSession *anal, RAnalOp *op, ut64 addr, const ut8 *buf) {
xtensa_rst1_fns[(buf[2] >> 4) & 0xf] (anal, op, addr, buf);
}
static void xtensa_rst2_op(RAnal *anal, RAnalOp *op, ut64 addr, const ut8 *buf) {
static void xtensa_rst2_op(RArchSession *anal, RAnalOp *op, ut64 addr, const ut8 *buf) {
xtensa_rst2_fns[(buf[2] >> 4) & 0xf] (anal, op, addr, buf);
}
static void xtensa_lsc4_op(RAnal *anal, RAnalOp *op, ut64 addr, const ut8 *buf) {
static void xtensa_lsc4_op(RArchSession *anal, RAnalOp *op, ut64 addr, const ut8 *buf) {
switch ((buf[2] >> 4) & 0xf) {
case 0x0:
xtensa_load_op (anal, op, addr, buf);
@ -425,7 +426,7 @@ static void xtensa_lsc4_op(RAnal *anal, RAnalOp *op, ut64 addr, const ut8 *buf)
}
}
static void xtensa_lscx_op(RAnal *anal, RAnalOp *op, ut64 addr, const ut8 *buf) {
static void xtensa_lscx_op(RArchSession *anal, RAnalOp *op, ut64 addr, const ut8 *buf) {
op->family = R_ANAL_OP_FAMILY_FPU;
switch ((buf[2] >> 4) & 0xf) {
case 0x0: case 0x1:
@ -440,7 +441,7 @@ static void xtensa_lscx_op(RAnal *anal, RAnalOp *op, ut64 addr, const ut8 *buf)
}
}
static void xtensa_fp0_op(RAnal *anal, RAnalOp *op, ut64 addr, const ut8 *buf) {
static void xtensa_fp0_op(RArchSession *anal, RAnalOp *op, ut64 addr, const ut8 *buf) {
op->family = R_ANAL_OP_FAMILY_FPU;
switch ((buf[2] >> 4) & 0xf) {
case 0x0: case 0x4:
@ -478,7 +479,7 @@ static void xtensa_fp0_op(RAnal *anal, RAnalOp *op, ut64 addr, const ut8 *buf) {
}
}
static void xtensa_fp1_op(RAnal *anal, RAnalOp *op, ut64 addr, const ut8 *buf) {
static void xtensa_fp1_op(RArchSession *anal, RAnalOp *op, ut64 addr, const ut8 *buf) {
op->family = R_ANAL_OP_FAMILY_FPU;
switch ((buf[2] >> 4) & 0xf) {
case 0x1: case 0x2: case 0x3:
@ -514,7 +515,7 @@ static XtensaOpFn xtensa_qrst_fns[] = {
xtensa_unk_op
};
static void xtensa_qrst_op(RAnal *anal, RAnalOp *op, ut64 addr, const ut8 *buf) {
static void xtensa_qrst_op(RArchSession *anal, RAnalOp *op, ut64 addr, const ut8 *buf) {
xtensa_qrst_fns[buf[2] & 0xf] (anal, op, addr, buf);
}
@ -537,11 +538,11 @@ static XtensaOpFn xtensa_lsai_fns[] = {
xtensa_store_op
};
static void xtensa_lsai_op(RAnal *anal, RAnalOp *op, ut64 addr, const ut8 *buf) {
static void xtensa_lsai_op(RArchSession *anal, RAnalOp *op, ut64 addr, const ut8 *buf) {
xtensa_lsai_fns[(buf[1] >> 4) & 0xf] (anal, op, addr, buf);
}
static void xtensa_lsci_op(RAnal *anal, RAnalOp *op, ut64 addr, const ut8 *buf) {
static void xtensa_lsci_op(RArchSession *anal, RAnalOp *op, ut64 addr, const ut8 *buf) {
ut8 r = buf[1] >> 4;
op->family = R_ANAL_OP_FAMILY_FPU;
if ((r & 3) == 0) {
@ -555,19 +556,19 @@ static void xtensa_lsci_op(RAnal *anal, RAnalOp *op, ut64 addr, const ut8 *buf)
}
}
static void xtensa_calln_op(RAnal *anal, RAnalOp *op, ut64 addr, const ut8 *buf) {
static void xtensa_calln_op(RArchSession *anal, RAnalOp *op, ut64 addr, const ut8 *buf) {
op->type = R_ANAL_OP_TYPE_CALL;
op->fail = addr + op->size;
op->jump = xtensa_offset (addr, buf);
}
static void xtensa_b_op(RAnal *anal, RAnalOp *op, ut64 addr, const ut8 *buf) {
static void xtensa_b_op(RArchSession *anal, RAnalOp *op, ut64 addr, const ut8 *buf) {
op->type = R_ANAL_OP_TYPE_CJMP;
op->fail = addr + op->size;
op->jump = xtensa_imm8s (addr, buf[2]);
}
static void xtensa_si_op(RAnal *anal, RAnalOp *op, ut64 addr, const ut8 *buf) {
static void xtensa_si_op(RArchSession *anal, RAnalOp *op, ut64 addr, const ut8 *buf) {
ut8 n = (buf[0] >> 4) & 3;
ut8 m = (buf[0] >> 6);
switch (n) {
@ -617,7 +618,7 @@ static void xtensa_si_op(RAnal *anal, RAnalOp *op, ut64 addr, const ut8 *buf) {
}
}
static void xtensa_st2n_op(RAnal *anal, RAnalOp *op, ut64 addr, const ut8 *buf) {
static void xtensa_st2n_op(RArchSession *anal, RAnalOp *op, ut64 addr, const ut8 *buf) {
if (buf[0] & 0x80) {
op->type = R_ANAL_OP_TYPE_CJMP;
op->fail = addr + op->size;
@ -627,7 +628,7 @@ static void xtensa_st2n_op(RAnal *anal, RAnalOp *op, ut64 addr, const ut8 *buf)
}
}
static void xtensa_st3n_op(RAnal *anal, RAnalOp *op, ut64 addr, const ut8 *buf) {
static void xtensa_st3n_op(RArchSession *anal, RAnalOp *op, ut64 addr, const ut8 *buf) {
switch ((buf[1] >> 4) & 0xf) {
case 0x0:
op->type = R_ANAL_OP_TYPE_MOV;
@ -1968,12 +1969,16 @@ static void analop_esil(xtensa_isa isa, xtensa_opcode opcode, xtensa_format form
}
}
static int xtensa_op(RAnal *anal, RAnalOp *op, ut64 addr, const ut8 *buf_original, int len_original, RAnalOpMask mask) {
static bool decode(RArchSession *a, RAnalOp *op, RArchDecodeMask mask) {
const size_t len_original = op->size;
const ut8 *buf_original = op->bytes;
const ut64 addr = op->addr;
if (!op) {
return 1;
}
if (mask & R_ARCH_OP_MASK_DISASM) {
disassemble (anal, op, addr, buf_original, len_original);
disassemble (a, op, addr, buf_original, len_original);
}
op->size = xtensa_length (buf_original);
@ -1981,7 +1986,7 @@ static int xtensa_op(RAnal *anal, RAnalOp *op, ut64 addr, const ut8 *buf_origina
return 1;
}
xtensa_op0_fns[(buf_original[0] & 0xf)] (anal, op, addr, buf_original);
xtensa_op0_fns[(buf_original[0] & 0xf)] (a, op, addr, buf_original);
ut8 buffer[XTENSA_MAX_LENGTH] = {0};
int len = R_MIN (op->size, XTENSA_MAX_LENGTH);
@ -2035,7 +2040,7 @@ static int xtensa_op(RAnal *anal, RAnalOp *op, ut64 addr, const ut8 *buf_origina
return op->size;
}
static char *get_reg_profile(RAnal *anal) {
static char *regs(RArchSession *as) {
return strdup (
// Assuming call0 ABI
"# a0 return address\n"
@ -2077,22 +2082,26 @@ static char *get_reg_profile(RAnal *anal) {
);
}
RAnalPlugin r_anal_plugin_xtensa = {
static int archinfo(RArchSession *as, ut32 q) {
return 1;
}
RArchPlugin r_arch_plugin_xtensa = {
.name = "xtensa",
.desc = "Xtensa disassembler",
.license = "LGPL3",
.endian = R_SYS_ENDIAN_LITTLE | R_SYS_ENDIAN_BIG,
.info = archinfo,
.arch = "xtensa",
.bits = 32,
.esil = true,
.op = &xtensa_op,
.get_reg_profile = get_reg_profile,
.bits = R_SYS_BITS_PACK1 (32), .decode = &decode,
.regs = regs,
};
#ifndef R2_PLUGIN_INCORE
R_API RLibStruct radare_plugin = {
.type = R_LIB_TYPE_ANAL,
.data = &r_anal_plugin_xtensa,
.type = R_LIB_TYPE_ARCH,
.data = &r_arch_plugin_xtensa,
.version = R2_VERSION
};
#endif

1
libr/include/r_anal.h
View File

@ -1706,7 +1706,6 @@ extern RAnalPlugin r_anal_plugin_x86_im;
extern RAnalPlugin r_anal_plugin_x86_simple;
extern RAnalPlugin r_anal_plugin_x86_udis;
extern RAnalPlugin r_anal_plugin_xcore_cs;
extern RAnalPlugin r_anal_plugin_xtensa;
extern RAnalPlugin r_anal_plugin_arm_v35;
extern RAnalPlugin r_anal_plugin_z80;
extern RAnalPlugin r_anal_plugin_mcs96;

1
libr/include/r_arch.h
View File

@ -270,6 +270,7 @@ extern RArchPlugin r_arch_plugin_v850;
extern RArchPlugin r_arch_plugin_propeller;
extern RArchPlugin r_arch_plugin_mcore;
extern RArchPlugin r_arch_plugin_nios2;
extern RArchPlugin r_arch_plugin_xtensa;
extern RArchPlugin r_arch_plugin_or1k;
extern RArchPlugin r_arch_plugin_evm;
extern RArchPlugin r_arch_plugin_ws;

4
libr/meson.build
View File

@ -19,6 +19,7 @@ arch_plugins = [ 'null',
'any_as',
'any_vasm',
'jdh8',
'xtensa',
'xap',
'mcore',
'riscv',
@ -174,8 +175,7 @@ anal_plugins += [
'vax',
'wasm',
'x86_cs',
'xcore_cs',
'xtensa',
'xcore_cs'
]
if no_user_plugins