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Fix #8054 - Update cpu flags in arm/thumb ADD/SUB ##anal

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condret 2018-12-10 22:05:13 +01:00 committed by radare
parent 768d31016c
commit e424924c2a
1 changed files with 34 additions and 1 deletions
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35
libr/anal/p/anal_arm_cs.c
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@ -1422,6 +1422,7 @@ static int analop64_esil(RAnal *a, RAnalOp *op, ut64 addr, const ut8 *buf, int l
#define MATH32(opchar) arm32math(a, op, addr, buf, len, handle, insn, pcdelta, str, opchar, 0)
#define MATH32_NEG(opchar) arm32math(a, op, addr, buf, len, handle, insn, pcdelta, str, opchar, 1)
#define MATH32AS(opchar) arm32mathaddsub(a, op, addr, buf, len, handle, insn, pcdelta, str, opchar)
static void arm32math(RAnal *a, RAnalOp *op, ut64 addr, const ut8 *buf, int len, csh *handle, cs_insn *insn, int pcdelta, char (*str)[32], const char *opchar, int negate) {
const char *dest = ARG(0);
@ -1457,7 +1458,29 @@ static void arm32math(RAnal *a, RAnalOp *op, ut64 addr, const ut8 *buf, int len,
}
}
static void arm32mathaddsub(RAnal *a, RAnalOp *op, ut64 addr, const ut8 *buf, int len, csh *handle, cs_insn *insn, int pcdelta, char (*str)[32], const char *opchar) {
const char *dst = ARG(0);
const char *src;
bool noflags = false;
if (!strcmp (dst, "pc")) { //this is because strbuf_prepend doesn't exist and E_TOO_LAZY
// r_strbuf_append (&op->esil, "$$,pc,=,");
noflags = true;
}
if (OPCOUNT() == 3) {
r_strbuf_appendf (&op->esil, "%s,0xffffffff,&,%s,=,", ARG (1), dst);
src = ARG (2);
} else {
// src = (!strcmp (ARG (1), "pc")) ? "$$" : ARG (1);
src = ARG (1);
}
r_strbuf_appendf (&op->esil, "%s,%s,%s,0xffffffff,&,%s,=", src, dst, opchar, dst);
if (noflags) {
return;
}
r_strbuf_appendf (&op->esil, ",$z,zf,=,%s,cf,=,vf,=,0,nf,=",
(!strcmp (opchar, "+") ? "$c30,$c31,^,$c31" : "$c30,$c31,^,$b32"));
}
static int analop_esil(RAnal *a, RAnalOp *op, ut64 addr, const ut8 *buf, int len, csh *handle, cs_insn *insn, bool thumb) {
int i;
@ -1496,6 +1519,13 @@ static int analop_esil(RAnal *a, RAnalOp *op, ut64 addr, const ut8 *buf, int len
break;
case ARM_INS_SADD16:
case ARM_INS_SADD8:
op->type = R_ANAL_OP_TYPE_ADD;
if (REGID(0) == ARM_REG_PC && insn->detail->arm.cc != ARM_CC_AL) {
//op->type = R_ANAL_OP_TYPE_RCJMP;
op->type = R_ANAL_OP_TYPE_UCJMP;
}
MATH32AS("+");
break;
case ARM_INS_ADDW:
case ARM_INS_ADD:
op->type = R_ANAL_OP_TYPE_ADD;
@ -1507,9 +1537,12 @@ static int analop_esil(RAnal *a, RAnalOp *op, ut64 addr, const ut8 *buf, int len
break;
case ARM_INS_SSUB16:
case ARM_INS_SSUB8:
op->type = R_ANAL_OP_TYPE_SUB;
MATH32AS("-");
break;
case ARM_INS_SUBW:
case ARM_INS_SUB:
op->type = R_ANAL_OP_TYPE_ADD;
op->type = R_ANAL_OP_TYPE_SUB;
MATH32("-");
break;
case ARM_INS_MUL: