From e9e427876fa4d0100bf4440236a911afb71ac36d Mon Sep 17 00:00:00 2001 From: condret Date: Thu, 30 Jun 2022 18:25:23 +0200 Subject: [PATCH] Merge asm_rsp into anal_rsp ##refactor --- dist/plugins-cfg/plugins.def.cfg | 1 - dist/plugins-cfg/plugins.mingw.cfg | 1 - dist/plugins-cfg/plugins.nocs.cfg | 1 - dist/plugins-cfg/plugins.termux.cfg | 1 - doc/fortunes.fun | 1 + libr/{asm => anal}/arch/rsp/rsp_idec.c | 0 libr/{asm => anal}/arch/rsp/rsp_idec.h | 0 libr/anal/meson.build | 5 +- libr/anal/p/anal_rsp.c | 91 ++++++++++++++++++--- libr/anal/p/rsp.mk | 4 +- libr/asm/meson.build | 3 - libr/asm/p/Makefile | 5 +- libr/asm/p/asm_rsp.c | 107 ------------------------- libr/asm/p/rsp.mk | 15 ---- libr/include/r_asm.h | 1 - libr/meson.build | 1 - 16 files changed, 90 insertions(+), 147 deletions(-) rename libr/{asm => anal}/arch/rsp/rsp_idec.c (100%) rename libr/{asm => anal}/arch/rsp/rsp_idec.h (100%) delete mode 100644 libr/asm/p/asm_rsp.c delete mode 100644 libr/asm/p/rsp.mk diff --git a/dist/plugins-cfg/plugins.def.cfg b/dist/plugins-cfg/plugins.def.cfg index 7307764654..a0a7f84297 100644 --- a/dist/plugins-cfg/plugins.def.cfg +++ b/dist/plugins-cfg/plugins.def.cfg @@ -81,7 +81,6 @@ asm.or1k asm.ppc_as asm.ppc_cs asm.riscv -asm.rsp asm.lanai_gnu asm.sh asm.sparc_gnu diff --git a/dist/plugins-cfg/plugins.mingw.cfg b/dist/plugins-cfg/plugins.mingw.cfg index df1cc58f64..fd53705b1e 100644 --- a/dist/plugins-cfg/plugins.mingw.cfg +++ b/dist/plugins-cfg/plugins.mingw.cfg @@ -73,7 +73,6 @@ asm.or1k asm.ppc_as asm.ppc_cs asm.riscv -asm.rsp asm.lanai_gnu asm.sh asm.sparc_gnu diff --git a/dist/plugins-cfg/plugins.nocs.cfg b/dist/plugins-cfg/plugins.nocs.cfg index 9a45abd448..450250dce9 100644 --- a/dist/plugins-cfg/plugins.nocs.cfg +++ b/dist/plugins-cfg/plugins.nocs.cfg @@ -59,7 +59,6 @@ asm.mips_gnu asm.or1k asm.ppc_as asm.riscv -asm.rsp asm.lanai_gnu asm.sh asm.sparc_gnu diff --git a/dist/plugins-cfg/plugins.termux.cfg b/dist/plugins-cfg/plugins.termux.cfg index 13a71520c0..d570696c07 100644 --- a/dist/plugins-cfg/plugins.termux.cfg +++ b/dist/plugins-cfg/plugins.termux.cfg @@ -48,7 +48,6 @@ asm.mips_gnu asm.ppc_as asm.ppc_cs asm.riscv -asm.rsp asm.sparc_gnu asm.tms320 asm.m68k_gnu diff --git a/doc/fortunes.fun b/doc/fortunes.fun index 7bcf3244dd..1501e296c6 100644 --- a/doc/fortunes.fun +++ b/doc/fortunes.fun @@ -309,3 +309,4 @@ Process[15449] crashed: radare2. Too many corpses being created. You can't sleep now there are monsters nearby Every journey begins with a choice Do 'r2pm -i r2premium; echo "e cfg.fortunes.type = nsfw" >> ~/.radare2rc' for a even more fun with r2 +pneumonic diff --git a/libr/asm/arch/rsp/rsp_idec.c b/libr/anal/arch/rsp/rsp_idec.c similarity index 100% rename from libr/asm/arch/rsp/rsp_idec.c rename to libr/anal/arch/rsp/rsp_idec.c diff --git a/libr/asm/arch/rsp/rsp_idec.h b/libr/anal/arch/rsp/rsp_idec.h similarity index 100% rename from libr/asm/arch/rsp/rsp_idec.h rename to libr/anal/arch/rsp/rsp_idec.h diff --git a/libr/anal/meson.build b/libr/anal/meson.build index 94104f3071..9185b5a68c 100644 --- a/libr/anal/meson.build +++ b/libr/anal/meson.build @@ -152,7 +152,7 @@ r_anal_sources = [ join_paths('../asm/arch','ppc','gnu','ppc-opc.c'), # join_paths('arch','ppc','libvle','vle.c'), # join_paths('arch','ppc','libps','libps.c'), - join_paths('..','asm','arch','rsp','rsp_idec.c'), + join_paths('arch','rsp','rsp_idec.c'), join_paths('..','asm','arch','tms320','tms320_dasm.c'), join_paths('..','asm','arch','tms320','c55x_plus','ins.c'), join_paths('..','asm','arch','tms320','c55x_plus','c55plus.c'), @@ -177,7 +177,8 @@ r_anal_sources = [ incdirs = [ join_paths ('arch', 'gb'), join_paths ('arch', 'kvx'), - join_paths ('arch', 'propeller') + join_paths ('arch', 'propeller'), + 'arch' ] if get_option('use_v35') diff --git a/libr/anal/p/anal_rsp.c b/libr/anal/p/anal_rsp.c index 28c8516974..bd7ceb8e36 100644 --- a/libr/anal/p/anal_rsp.c +++ b/libr/anal/p/anal_rsp.c @@ -1,19 +1,89 @@ -/* radare - LGPL - Copyright 2016-2017 - bobby.smiles32@gmail.com */ +/* radare - LGPL - Copyright 2016-2022 - bobby.smiles32@gmail.com, condret */ /* * TODO: finish esil support of the non vector instructions - * TODO: implement vector instruction using custom esil commands - * (will be easier than pure esil approach) * TODO: refactor code to simplify per opcode analysis */ #include #include #include -#include #include -#include "../../asm/arch/rsp/rsp_idec.h" +#include + +static RStrBuf *disassemble(RStrBuf *buf_asm, rsp_instruction *r_instr) { + int i; + + r_strbuf_append (buf_asm, r_instr->mnemonic); + for (i = 0; i < r_instr->noperands; i++) { + r_strbuf_append (buf_asm, (i == 0) ? " " : ", "); + + switch (r_instr->operands[i].type) { + case RSP_OPND_GP_REG: + r_strbuf_append (buf_asm, rsp_gp_reg_soft_names[r_instr->operands[i].u]); + break; + case RSP_OPND_OFFSET: + case RSP_OPND_TARGET: + r_strbuf_appendf (buf_asm, "0x%08"PFMT64x, r_instr->operands[i].u); + break; + case RSP_OPND_ZIMM: + { + int shift = (r_instr->operands[i].u & ~0xffff) ? 16 : 0; + r_strbuf_appendf (buf_asm, "0x%04"PFMT64x, + r_instr->operands[i].u >> shift); + } + break; + case RSP_OPND_SIMM: + r_strbuf_appendf (buf_asm, "%s0x%04"PFMT64x, + (r_instr->operands[i].s<0)?"-":"", + (r_instr->operands[i].s<0)?-r_instr->operands[i].s:r_instr->operands[i].s); + break; + case RSP_OPND_SHIFT_AMOUNT: + r_strbuf_appendf (buf_asm, "%"PFMT64u, r_instr->operands[i].u); + break; + case RSP_OPND_BASE_OFFSET: + r_strbuf_appendf (buf_asm, "%s0x%04x(%s)", + (r_instr->operands[i].s<0)?"-":"", + (ut32)((r_instr->operands[i].s<0)?-r_instr->operands[i].s:r_instr->operands[i].s), + rsp_gp_reg_soft_names[r_instr->operands[i].u]); + break; + case RSP_OPND_C0_REG: + r_strbuf_append (buf_asm, rsp_c0_reg_soft_names[r_instr->operands[i].u]); + break; + case RSP_OPND_C2_CREG: + r_strbuf_append (buf_asm, rsp_c2_creg_names[r_instr->operands[i].u]); + break; + case RSP_OPND_C2_ACCU: + r_strbuf_append (buf_asm, rsp_c2_accu_names[r_instr->operands[i].u]); + break; + case RSP_OPND_C2_VREG: + r_strbuf_append (buf_asm, rsp_c2_vreg_names[r_instr->operands[i].u]); + break; + case RSP_OPND_C2_VREG_BYTE: + case RSP_OPND_C2_VREG_SCALAR: + r_strbuf_appendf (buf_asm, "%s[%u]", rsp_c2_vreg_names[r_instr->operands[i].u], + (ut32)r_instr->operands[i].s); + break; + case RSP_OPND_C2_VREG_ELEMENT: + r_strbuf_appendf (buf_asm, "%s%s", rsp_c2_vreg_names[r_instr->operands[i].u], + rsp_c2_vreg_element_names[r_instr->operands[i].s]); + break; + default: /* should not happend */ + r_strbuf_append (buf_asm, "invalid"); + break; + } + } + + return buf_asm; +} static int rsp_op(RAnal *anal, RAnalOp *op, ut64 addr, const ut8 *b, int len, RAnalOpMask mask) { + if (len < 4) { + op->type = R_ANAL_OP_TYPE_ILL; + if (mask & R_ANAL_OP_MASK_DISASM) { + op->mnemonic = strdup ("invalid"); + } + return op->size = 0; + } int i; typedef struct { RAnalValue* value; @@ -24,10 +94,6 @@ static int rsp_op(RAnal *anal, RAnalOp *op, ut64 addr, const ut8 *b, int len, RA memset (parsed_operands, 0, sizeof (ParsedOperands) * RSP_MAX_OPNDS); rsp_instruction r_instr; - if (!op) { - return 4; - } - op->type = R_ANAL_OP_TYPE_UNK; op->size = 4; op->addr = addr; @@ -36,6 +102,13 @@ static int rsp_op(RAnal *anal, RAnalOp *op, ut64 addr, const ut8 *b, int len, RA ut32 iw = r_read_ble32 (b, anal->config->big_endian); r_instr = rsp_instruction_decode (addr, iw); + if (mask & R_ANAL_OP_MASK_DISASM) { + RStrBuf *buf_asm = r_strbuf_new (""); + if (buf_asm) { + op->mnemonic = r_strbuf_drain (disassemble (buf_asm, &r_instr)); + } // else ??? + } + /* parse operands */ for (i = 0; i < r_instr.noperands; i++) { parsed_operands[i].value = r_anal_value_new (); diff --git a/libr/anal/p/rsp.mk b/libr/anal/p/rsp.mk index f6a1d2ca67..e1a6684732 100644 --- a/libr/anal/p/rsp.mk +++ b/libr/anal/p/rsp.mk @@ -1,9 +1,9 @@ OBJ_RSP=anal_rsp.o #RSP_ROOT=$(LIBR)/asm/arch/rsp -CFLAGS+=-I../asm/arch/rsp +CFLAGS+=-Iarch STATIC_OBJ+=${OBJ_RSP} -OBJ_RSP+=../../asm/arch/rsp/rsp_idec.o +OBJ_RSP+=../arch/rsp/rsp_idec.o TARGET_RSP=anal_rsp.${EXT_SO} ALL_TARGETS+=${TARGET_RSP} diff --git a/libr/asm/meson.build b/libr/asm/meson.build index 7cd28e6f0e..bb49796795 100644 --- a/libr/asm/meson.build +++ b/libr/asm/meson.build @@ -24,7 +24,6 @@ r_asm_sources = [ join_paths('p','asm_ppc_as.c'), join_paths('p','asm_ppc_cs.c'), join_paths('p','asm_riscv.c'), - join_paths('p','asm_rsp.c'), join_paths('p','asm_sh.c'), join_paths('p','asm_sparc_gnu.c'), join_paths('p','asm_tms320.c'), @@ -72,7 +71,6 @@ r_asm_sources = [ join_paths('arch','or1k','or1k_disas.c'), #join_paths('arch','riscv','riscv-opc.c'), #join_paths('arch','riscv','riscv.c'), - join_paths('arch','rsp','rsp_idec.c'), join_paths('arch','sh','gnu','sh-dis.c'), join_paths('arch','sparc','gnu','sparc-dis.c'), join_paths('arch','sparc','gnu','sparc-opc.c'), @@ -100,7 +98,6 @@ r_asm_inc = [ join_paths('arch','include'), join_paths('arch'), join_paths('arch','h8300'), - join_paths('arch','rsp'), join_paths('arch','v850'), join_paths('arch','v810'), join_paths('arch','or1k') diff --git a/libr/asm/p/Makefile b/libr/asm/p/Makefile index c1f022ae5c..e16c310ae4 100644 --- a/libr/asm/p/Makefile +++ b/libr/asm/p/Makefile @@ -21,9 +21,8 @@ ARCHS=mips_gnu.mk x86_cs.mk sparc_gnu.mk java.mk arm_gnu.mk dalvik.mk ARCHS+=x86_as.mk x86_nz.mk cris_gnu.mk arc.mk ARCHS+=ppc_gnu.mk ppc_as.mk ppc_cs.mk x86_nasm.mk avr.mk ARCHS+=sh.mk arm_winedbg.mk tms320.mk ebc.mk -ARCHS+=cr16.mk v850.mk jdh8.mk -ARCHS+=v810.mk mcs96.mk lm32.mk -ARCHS+=riscv.mk rsp.mk mcore.mk +ARCHS+=cr16.mk v850.mk jdh8.mk riscv.mk +ARCHS+=v810.mk lm32.mk mcore.mk # ARCHS+=loongarch_gnu.mk include $(ARCHS) diff --git a/libr/asm/p/asm_rsp.c b/libr/asm/p/asm_rsp.c deleted file mode 100644 index 2c0d0578e0..0000000000 --- a/libr/asm/p/asm_rsp.c +++ /dev/null @@ -1,107 +0,0 @@ -/* radare - LGPL - Copyright 2016 - bobby.smiles32@gmail.com */ -// TODO: add assembler - -#include -#include -#include -#include - -#include -#include - -#include "rsp_idec.h" - - -static int disassemble(RAsm *a, RAsmOp *op, const ut8 *buf, int len) { - rsp_instruction r_instr; - int i; - - /* all instructions are 32bit words */ - if (len < 4) { - op->size = 0; - return 0; - } - op->size = 4; - - ut32 iw = r_read_ble32 (buf, a->config->big_endian); - r_instr = rsp_instruction_decode (a->pc, iw); - - r_strbuf_append (&op->buf_asm, r_instr.mnemonic); - for (i = 0; i < r_instr.noperands; i++) { - r_strbuf_append (&op->buf_asm, (i == 0) ? " " : ", "); - - switch (r_instr.operands[i].type) { - case RSP_OPND_GP_REG: - r_strbuf_append (&op->buf_asm, rsp_gp_reg_soft_names[r_instr.operands[i].u]); - break; - case RSP_OPND_OFFSET: - case RSP_OPND_TARGET: - r_strbuf_appendf (&op->buf_asm, "0x%08"PFMT64x, r_instr.operands[i].u); - break; - case RSP_OPND_ZIMM: - { - int shift = (r_instr.operands[i].u & ~0xffff) ? 16 : 0; - r_strbuf_appendf (&op->buf_asm, "0x%04"PFMT64x, - r_instr.operands[i].u >> shift); - } - break; - case RSP_OPND_SIMM: - r_strbuf_appendf (&op->buf_asm, "%s0x%04"PFMT64x, - (r_instr.operands[i].s<0)?"-":"", - (r_instr.operands[i].s<0)?-r_instr.operands[i].s:r_instr.operands[i].s); - break; - case RSP_OPND_SHIFT_AMOUNT: - r_strbuf_appendf (&op->buf_asm, "%"PFMT64u, r_instr.operands[i].u); - break; - case RSP_OPND_BASE_OFFSET: - r_strbuf_appendf (&op->buf_asm, "%s0x%04x(%s)", - (r_instr.operands[i].s<0)?"-":"", - (ut32)((r_instr.operands[i].s<0)?-r_instr.operands[i].s:r_instr.operands[i].s), - rsp_gp_reg_soft_names[r_instr.operands[i].u]); - break; - case RSP_OPND_C0_REG: - r_strbuf_append (&op->buf_asm, rsp_c0_reg_soft_names[r_instr.operands[i].u]); - break; - case RSP_OPND_C2_CREG: - r_strbuf_append (&op->buf_asm, rsp_c2_creg_names[r_instr.operands[i].u]); - break; - case RSP_OPND_C2_ACCU: - r_strbuf_append (&op->buf_asm, rsp_c2_accu_names[r_instr.operands[i].u]); - break; - case RSP_OPND_C2_VREG: - r_strbuf_append (&op->buf_asm, rsp_c2_vreg_names[r_instr.operands[i].u]); - break; - case RSP_OPND_C2_VREG_BYTE: - case RSP_OPND_C2_VREG_SCALAR: - r_strbuf_appendf (&op->buf_asm, "%s[%u]", rsp_c2_vreg_names[r_instr.operands[i].u], - (ut32)r_instr.operands[i].s); - break; - case RSP_OPND_C2_VREG_ELEMENT: - r_strbuf_appendf (&op->buf_asm, "%s%s", rsp_c2_vreg_names[r_instr.operands[i].u], rsp_c2_vreg_element_names[r_instr.operands[i].s]); - break; - default: /* should not happend */ - r_strbuf_append (&op->buf_asm, "???"); - break; - } - } - - return op->size; -} - -RAsmPlugin r_asm_plugin_rsp = { - .name = "rsp", - .desc = "Reality Signal Processor", - .arch = "rsp", - .bits = 32, - .endian = R_SYS_ENDIAN_BI, /* For conveniance, we don't force BIG endian but allow both to be used */ - .license = "LGPL3", - .disassemble = &disassemble -}; - -#ifndef R2_PLUGIN_INCORE -R_API RLibStruct radare_plugin = { - .type = R_LIB_TYPE_ASM, - .data = &r_asm_plugin_rsp, - .version = R2_VERSION -}; -#endif diff --git a/libr/asm/p/rsp.mk b/libr/asm/p/rsp.mk deleted file mode 100644 index 8823a68aba..0000000000 --- a/libr/asm/p/rsp.mk +++ /dev/null @@ -1,15 +0,0 @@ -OBJ_RSP=asm_rsp.o -RSP_ROOT=$(LIBR)/asm/arch/rsp -OBJ_RSP+=$(RSP_ROOT)/rsp_idec.o -CFLAGS+=-I$(RSP_ROOT) - - -STATIC_OBJ+=${OBJ_RSP} -TARGET_RSP=asm_rsp.${EXT_SO} - -ifeq ($(WITHPIC),1) -ALL_TARGETS+=${TARGET_RSP} - -${TARGET_RSP}: ${OBJ_RSP} - ${CC} $(call libname,asm_rsp) ${LDFLAGS} ${CFLAGS} -o ${TARGET_RSP} ${OBJ_RSP} -endif diff --git a/libr/include/r_asm.h b/libr/include/r_asm.h index 5abca8c210..6891c91d7e 100644 --- a/libr/include/r_asm.h +++ b/libr/include/r_asm.h @@ -205,7 +205,6 @@ extern RAsmPlugin r_asm_plugin_pic; extern RAsmPlugin r_asm_plugin_ppc_as; extern RAsmPlugin r_asm_plugin_ppc_cs; extern RAsmPlugin r_asm_plugin_riscv; -extern RAsmPlugin r_asm_plugin_rsp; extern RAsmPlugin r_asm_plugin_sh; extern RAsmPlugin r_asm_plugin_sparc_gnu; extern RAsmPlugin r_asm_plugin_tms320; diff --git a/libr/meson.build b/libr/meson.build index b684d23f66..7c3ad6579a 100644 --- a/libr/meson.build +++ b/libr/meson.build @@ -136,7 +136,6 @@ asm_plugins += [ 'ppc_as', 'ppc_cs', 'riscv', - 'rsp', 'sh', 'tms320', 'x86_as',