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https://github.com/radareorg/radare2.git
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Move jdh8 asm plugin to anal
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parent
c52cd8b7de
commit
eceef902b1
@ -137,7 +137,7 @@ V850, CRIS, XAP, PIC, LM32, 8051, 6502, i4004, i8080, Propeller,
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Tricore, CHIP-8, LH5801, T8200, GameBoy, SNES, SPC700, MSP430, Xtensa,
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NIOS II, Java, Dalvik, WebAssembly, MSIL, EBC, TMS320 (c54x, c55x,
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c55+, c64x), Hexagon, Brainfuck, Malbolge, whitespace, DCPU16, LANAI,
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MCORE, mcs96, RSP, SuperH-4, VAX, KVX, Am29000, LOONGARCH.
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MCORE, mcs96, RSP, SuperH-4, VAX, KVX, Am29000, LOONGARCH, JDH8.
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## File Formats
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2
dist/plugins-cfg/plugins.def.cfg
vendored
2
dist/plugins-cfg/plugins.def.cfg
vendored
@ -5,6 +5,7 @@ anal.evm_cs
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anal.arm_cs
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anal.arm_v35
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anal.arm_gnu
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anal.jdh8
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anal.avr
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anal.i4004
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anal.bf
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@ -119,7 +120,6 @@ asm.alpha
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asm.mcs96
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asm.pic
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asm.pyc
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asm.jdh8
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bin.any
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bin.tic
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bin.wasm
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32
libr/anal/p/anal_jdh8.c
Normal file
32
libr/anal/p/anal_jdh8.c
Normal file
@ -0,0 +1,32 @@
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/* radare - LGPL3 - Copyright 2021-2022 - condret, slowhand99 */
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#include <r_anal.h>
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#include <r_lib.h>
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#include "../../asm/arch/jdh8/jdh8dis.c"
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static int jdh8_op(RAnal *anal, RAnalOp *op, ut64 addr, const ut8 *buf, int len, RAnalOpMask mask) {
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int dlen = 0;
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char *o = jdh8Disass (buf, len, &dlen);
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op->mnemonic = strdup (o);
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op->size = R_MAX (0, dlen);
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// honor DISASM, add esil and more
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return dlen;
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}
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RAnalPlugin r_anal_plugin_jdh8 = {
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.name = "jdh8",
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.desc = "jdh-8 toy architecture",
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.license = "LGPL3",
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.arch = "jdh8",
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.bits = 16,
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.endian = R_SYS_ENDIAN_LITTLE,
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.op = &jdh8_op,
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};
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#ifndef R2_PLUGIN_INCORE
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R_API RLibStruct radare_plugin = {
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.type = R_LIB_TYPE_ANAL,
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.data = &r_anal_plugin_jdh8,
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.version = R2_VERSION
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};
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#endif
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9
libr/anal/p/jdh8.mk
Normal file
9
libr/anal/p/jdh8.mk
Normal file
@ -0,0 +1,9 @@
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OBJ_JDH8=anal_jdh8.o
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STATIC_OBJ+=${OBJ_JDH8}
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TARGET_JDH8=anal_jdh8.${EXT_SO}
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ALL_TARGETS+=${TARGET_JDH8}
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${TARGET_JDH8}: ${OBJ_JDH8}
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${CC} $(call libname,anal_jdh8) ${LDFLAGS} ${CFLAGS} -o anal_jdh8.${EXT_SO} ${OBJ_JDH8}
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@ -1,8 +1,6 @@
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/* radare - LGPL3 - Copyright 2021 - condret, slowhand99 */
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/* radare - LGPL3 - Copyright 2021-2022 - condret, slowhand99 */
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#include <r_types.h>
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#include <r_util.h>
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#include <r_asm.h>
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static const int jdh_len[16] = {
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2, 3, 3, 1, 1, 3, 1, 2, 2, 2, 2, 2, 2, 2, 2, 2
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@ -15,128 +13,130 @@ static int jdh_get_ins_len(ut8 hex) {
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int ret = jdh_len[high];
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if (ret == 3) {
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ret = (hex & 8) ? 2 : 3;
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}
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else if (ret == 1) {
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} else if (ret == 1) {
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ret = (hex & 8) ? 1 : 2;
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}
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return ret;
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}
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static int jdh8Disass(RAsmOp *op, const ut8 *buf, int len) {
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static char *jdh8Disass(const ut8 *buf, int len, int *dlen) {
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char *dis = NULL;
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int ilen = jdh_get_ins_len (*buf);
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const ut8 high = (*buf & 0xf0) >> 4;
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const ut8 low = (*buf & 0xf);
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if (ilen > len) {
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return op->size = 0;
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}
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switch (high) {
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ilen = 0;
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} else switch (high) {
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case 0:
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if (low & 8) {
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r_strbuf_setf (&op->buf_asm, "mw %c, %c", reg[low & 7], reg[buf[1]]);
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dis = r_str_newf ("mw %c, %c", reg[low & 7], reg[buf[1]]);
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} else {
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r_strbuf_setf (&op->buf_asm, "mw %c, 0x%02x", reg[low & 7], buf[1]);
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dis = r_str_newf ("mw %c, 0x%02x", reg[low & 7], buf[1]);
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}
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break;
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case 1:
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if (ilen == 2) {
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r_strbuf_setf (&op->buf_asm, "lw %c, %c", reg[low & 7], reg[buf[1]]);
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dis = r_str_newf ("lw %c, %c", reg[low & 7], reg[buf[1]]);
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} else {
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r_strbuf_setf (&op->buf_asm, "lw %c, 0x%02x", reg[low & 7], buf[1]);
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dis = r_str_newf ("lw %c, 0x%02x", reg[low & 7], buf[1]);
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}
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break;
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case 2:
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if (ilen == 2) {
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r_strbuf_setf (&op->buf_asm, "sw %c, %c", reg[low & 7], reg[buf[1]]);
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dis = r_str_newf ("sw %c, %c", reg[low & 7], reg[buf[1]]);
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} else {
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r_strbuf_setf (&op->buf_asm, "sw 0x%04x, %c", ((ut16)(buf[1] << 8) | buf[2]), reg[low & 7]);
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dis = r_str_newf ("sw 0x%04x, %c", ((ut16)(buf[1] << 8) | buf[2]), reg[low & 7]);
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}
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break;
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case 3:
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if (ilen == 1) {
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r_strbuf_setf (&op->buf_asm, "push %c", reg[low & 7]);
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dis = r_str_newf ("push %c", reg[low & 7]);
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} else {
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r_strbuf_setf (&op->buf_asm, "push 0x%02x", buf[1]);
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dis = r_str_newf ("push 0x%02x", buf[1]);
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}
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break;
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case 4:
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r_strbuf_setf (&op->buf_asm, "pop %c", reg[low & 7]);
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dis = r_str_newf ("pop %c", reg[low & 7]);
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break;
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case 5:
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r_strbuf_setf (&op->buf_asm, "lda 0x%03x", ((ut16)(buf[1] << 8) | buf[2]));
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dis = r_str_newf ("lda 0x%03x", ((ut16)(buf[1] << 8) | buf[2]));
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break;
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case 6:
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if (ilen == 1) {
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r_strbuf_setf (&op->buf_asm, "jnz %c", reg[low & 7]);
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dis = r_str_newf ("jnz %c", reg[low & 7]);
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} else {
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r_strbuf_setf (&op->buf_asm, "jnz 0x%02x", buf[1]);
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dis = r_str_newf ("jnz 0x%02x", buf[1]);
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}
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break;
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case 7:
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if (low & 8) {
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r_strbuf_setf (&op->buf_asm, "inb %c, %c", reg[low & 7], reg[buf[1]]);
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dis = r_str_newf ("inb %c, %c", reg[low & 7], reg[buf[1]]);
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} else {
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r_strbuf_setf (&op->buf_asm, "inb %c, 0x%02x", reg[low & 7], buf[1]);
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dis = r_str_newf ("inb %c, 0x%02x", reg[low & 7], buf[1]);
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}
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break;
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case 8:
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if (low & 8) {
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r_strbuf_setf (&op->buf_asm, "outb %c, %c", reg[low & 7], reg[buf[1]]);
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dis = r_str_newf ("outb %c, %c", reg[low & 7], reg[buf[1]]);
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} else {
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r_strbuf_setf (&op->buf_asm, "outb %c, 0x%02x", reg[low & 7], buf[1]);
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dis = r_str_newf ("outb %c, 0x%02x", reg[low & 7], buf[1]);
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}
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break;
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case 9:
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if (low & 8) {
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r_strbuf_setf (&op->buf_asm, "add %c, %c", reg[low & 7], reg[buf[1]]);
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dis = r_str_newf ("add %c, %c", reg[low & 7], reg[buf[1]]);
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} else {
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r_strbuf_setf (&op->buf_asm, "add %c, 0x%02x", reg[low & 7], buf[1]);
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dis = r_str_newf ("add %c, 0x%02x", reg[low & 7], buf[1]);
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}
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break;
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case 10:
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if (low & 8) {
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r_strbuf_setf (&op->buf_asm, "adc %c, %c", reg[low & 7], reg[buf[1]]);
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dis = r_str_newf ("adc %c, %c", reg[low & 7], reg[buf[1]]);
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} else {
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r_strbuf_setf (&op->buf_asm, "adc %c, 0x%02x", reg[low & 7], buf[1]);
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dis = r_str_newf ("adc %c, 0x%02x", reg[low & 7], buf[1]);
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}
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break;
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case 11:
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if (low & 8) {
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r_strbuf_setf (&op->buf_asm, "and %c, %c", reg[low & 7], reg[buf[1]]);
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dis = r_str_newf ("and %c, %c", reg[low & 7], reg[buf[1]]);
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} else {
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r_strbuf_setf (&op->buf_asm, "and %c, 0x%02x", reg[low & 7], buf[1]);
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dis = r_str_newf ("and %c, 0x%02x", reg[low & 7], buf[1]);
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}
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break;
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case 12:
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if (low & 8) {
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r_strbuf_setf (&op->buf_asm, "or %c, %c", reg[low & 7], reg[buf[1]]);
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dis = r_str_newf ("or %c, %c", reg[low & 7], reg[buf[1]]);
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} else {
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r_strbuf_setf (&op->buf_asm, "or %c, 0x%02x", reg[low & 7], buf[1]);
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dis = r_str_newf ("or %c, 0x%02x", reg[low & 7], buf[1]);
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}
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break;
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case 13:
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if (low & 8) {
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r_strbuf_setf (&op->buf_asm, "nor %c, %c", reg[low & 7], reg[buf[1]]);
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dis = r_str_newf ("nor %c, %c", reg[low & 7], reg[buf[1]]);
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} else {
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r_strbuf_setf (&op->buf_asm, "nor %c, 0x%02x", reg[low & 7], buf[1]);
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dis = r_str_newf ("nor %c, 0x%02x", reg[low & 7], buf[1]);
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}
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break;
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case 14:
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if (low & 8) {
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r_strbuf_setf (&op->buf_asm, "cmp %c, %c", reg[low & 7], reg[buf[1]]);
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dis = r_str_newf ("cmp %c, %c", reg[low & 7], reg[buf[1]]);
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} else {
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r_strbuf_setf (&op->buf_asm, "cmp %c, 0x%02x", reg[low & 7], buf[1]);
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dis = r_str_newf ("cmp %c, 0x%02x", reg[low & 7], buf[1]);
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}
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break;
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case 15:
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if (low & 8) {
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r_strbuf_setf (&op->buf_asm, "sbb %c, %c", reg[low & 7], reg[buf[1]]);
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dis = r_str_newf ("sbb %c, %c", reg[low & 7], reg[buf[1]]);
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} else {
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r_strbuf_setf (&op->buf_asm, "sbb %c, 0x%02x", reg[low & 7], buf[1]);
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dis = r_str_newf ("sbb %c, 0x%02x", reg[low & 7], buf[1]);
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}
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break;
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default:
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r_strbuf_set (&op->buf_asm, "invalid");
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dis = strdup ("invalid");
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break;
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}
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return op->size = ilen;
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if (dlen) {
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*dlen = len;
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}
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return dis;
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}
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@ -1,31 +0,0 @@
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/* radare - LGPL3 - Copyright 2021 - condret, slowhand99 */
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#include <r_types.h>
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#include <r_util.h>
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#include <r_asm.h>
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#include <r_lib.h>
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#include "../arch/jdh8/jdh8dis.c"
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static int disassemble(RAsm *a, RAsmOp *r_op, const ut8 *buf, int len) {
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int dlen = jdh8Disass(r_op, buf, len);
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return r_op->size = R_MAX (0, dlen);
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}
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RAsmPlugin r_asm_plugin_jdh8 = {
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.name = "jdh8",
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.desc = "jdh-8 toy architecture",
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.arch = "jdh-8",
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.author = "condret, slowhand99",
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.license = "LGPL3",
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.bits = 16,
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.endian = R_SYS_ENDIAN_LITTLE,
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.disassemble = &disassemble,
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};
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#ifndef R2_PLUGIN_INCORE
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R_API RLibStruct radare_plugin = {
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.type = R_LIB_TYPE_ASM,
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.data = &r_asm_plugin_jdh8,
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.version = R2_VERSION
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};
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#endif
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@ -1,11 +0,0 @@
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OBJ_JDH8=asm_jdh8.o
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STATIC_OBJ+=${OBJ_JDH8}
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TARGET_JDH8=asm_jdh8.${EXT_SO}
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ifeq ($(WITHPIC),1)
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ALL_TARGETS+=${TARGET_JDH8}
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${TARGET_JDH8}: ${OBJ_JDH8}
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${CC} ${call libname,asm_jdh8} ${CFLAGS} $(LDFLAGS) -o ${TARGET_JDH8} ${OBJ_JDH8}
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endif
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@ -2241,6 +2241,7 @@ extern RAnalPlugin r_anal_plugin_mcore;
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extern RAnalPlugin r_anal_plugin_mips_cs;
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extern RAnalPlugin r_anal_plugin_mips_gnu;
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extern RAnalPlugin r_anal_plugin_loongarch_gnu;
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extern RAnalPlugin r_anal_plugin_jdh8;
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extern RAnalPlugin r_anal_plugin_msp430;
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extern RAnalPlugin r_anal_plugin_nios2;
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extern RAnalPlugin r_anal_plugin_or1k;
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@ -249,8 +249,6 @@ extern RAsmPlugin r_asm_plugin_pyc;
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extern RAsmPlugin r_asm_plugin_pdp11_gnu;
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extern RAsmPlugin r_asm_plugin_alpha;
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extern RAsmPlugin r_asm_plugin_vasm;
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extern RAsmPlugin r_asm_plugin_jdh8;
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extern RAsmPlugin r_asm_plugin_loongarch_gnu;
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#endif
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