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Workaround capstone bug for mips64 disassembly (#7632)
* Add asm.cpu=64v2 to support modern mips64 * Enforce 64 bits for 64v2 cpu
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@ -25,9 +25,11 @@ static int disassemble(RAsm *a, RAsmOp *op, const ut8 *buf, int len) {
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mode |= CS_MODE_MIPS3;
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// } else if (!strcmp (a->cpu, "gp64")) {
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// a->bits = 64;
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} else if (!strcmp (a->cpu, "64v2")) {
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mode |= CS_MODE_MIPS32 | CS_MODE_MIPS64;
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}
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}
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mode |= (a->bits == 64)? CS_MODE_64: CS_MODE_32;
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mode |= (a->bits == 64)? CS_MODE_MIPS64 : CS_MODE_MIPS32;
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memset (op, 0, sizeof (RAsmOp));
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op->size = 4;
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if (cd != 0) {
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