diff --git a/libr/asm/arch/avr/format.c b/libr/asm/arch/avr/format.c index e142e54b84..3f3b410b50 100644 --- a/libr/asm/arch/avr/format.c +++ b/libr/asm/arch/avr/format.c @@ -218,7 +218,7 @@ static int formatDisassembledOperand(RAsm *a, avrDisassembleContext *context, ch break; } - if (!strcmp (r_str_get (a->cpu), "ATmega328p")) { + if (!strcmp (r_str_get (a->config->cpu), "ATmega328p")) { switch (dInstruction.operands[operandNum]) { case 0x03: current_register = "pinb"; @@ -391,7 +391,7 @@ static int formatDisassembledOperand(RAsm *a, avrDisassembleContext *context, ch break; } } - if (!strcmp (r_str_get (a->cpu), "AT90S1200")) { + if (!strcmp (r_str_get (a->config->cpu), "AT90S1200")) { switch (dInstruction.operands[operandNum]) { case 0x08: current_register = "acsr"; diff --git a/libr/asm/arch/riscv/riscv.c b/libr/asm/arch/riscv/riscv.c index f14076adcd..03d4879b65 100644 --- a/libr/asm/arch/riscv/riscv.c +++ b/libr/asm/arch/riscv/riscv.c @@ -323,6 +323,6 @@ static int riscv_dis(RAsm *a, RAsmOp *rop, const ut8 *buf, ut64 len) { if (len < insn_len) { return -1; } - riscv_disassemble (a, rop, insn, a->bits, len); + riscv_disassemble (a, rop, insn, a->config->bits, len); return insn_len; } diff --git a/libr/asm/asm.c b/libr/asm/asm.c index a302b22764..7724f2b2ab 100644 --- a/libr/asm/asm.c +++ b/libr/asm/asm.c @@ -93,15 +93,16 @@ static inline int r_asm_pseudo_intN(RAsm *a, RAsmOp *op, char *input, int n) { if (!buf) { return 0; } + bool be = a->config->big_endian; if (n == 2) { s = (short)s64; - r_write_ble16 (buf, s, a->big_endian); + r_write_ble16 (buf, s, be); } else if (n == 4) { i = (int)s64; - r_write_ble32 (buf, i, a->big_endian); + r_write_ble32 (buf, i, be); } else if (n == 8) { l = (long int)s64; - r_write_ble64 (buf, l, a->big_endian); + r_write_ble64 (buf, l, be); } else { return 0; } @@ -204,6 +205,22 @@ static void plugin_free(RAsmPlugin *p) { } } +R_API RAsmConfig *r_asm_config_new(void) { + RAsmConfig *ac = R_NEW0 (RAsmConfig); + ac->bits = R_SYS_BITS; + ac->bitshift = 0; + ac->syntax = R_ASM_SYNTAX_INTEL; + ac->big_endian = 0; + return ac; +} + +R_API void r_asm_config_free(RAsmConfig *ac) { + if (ac) { + free (ac->cpu); + free (ac); + } +} + R_API RAsm *r_asm_new(void) { int i; RAsm *a = R_NEW0 (RAsm); @@ -211,14 +228,12 @@ R_API RAsm *r_asm_new(void) { return NULL; } a->dataalign = 1; - a->bits = R_SYS_BITS; - a->bitshift = 0; - a->syntax = R_ASM_SYNTAX_INTEL; a->plugins = r_list_newf ((RListFree)plugin_free); if (!a->plugins) { free (a); return NULL; } + a->config = r_asm_config_new (); for (i = 0; asm_static_plugins[i]; i++) { r_asm_add (a, asm_static_plugins[i]); } @@ -264,12 +279,12 @@ R_API void r_asm_free(RAsm *a) { if (a->cur && a->cur->fini) { a->cur->fini (a->cur->user); } + r_asm_config_free (a->config); if (a->plugins) { r_list_free (a->plugins); a->plugins = NULL; } r_syscall_free (a->syscall); - free (a->cpu); sdb_free (a->pair); ht_pp_free (a->flags); a->pair = NULL; @@ -333,8 +348,8 @@ R_API bool r_asm_use_assembler(RAsm *a, const char *name) { static void load_asm_descriptions(RAsm *a, RAsmPlugin *p) { const char *arch = p->arch; if (!arch || !strcmp (p->name, "r2ghidra")) { - if (a->cpu) { - arch = a->cpu; + if (a->config->cpu) { + arch = a->config->cpu; } else { arch = p->name; } @@ -413,8 +428,8 @@ R_API bool r_asm_use(RAsm *a, const char *name) { R_DEPRECATE R_API void r_asm_set_cpu(RAsm *a, const char *cpu) { if (a) { - free (a->cpu); - a->cpu = cpu? strdup (cpu): NULL; + free (a->config->cpu); + a->config->cpu = cpu? strdup (cpu): NULL; } } @@ -424,7 +439,7 @@ static bool has_bits(RAsmPlugin *h, int bits) { R_DEPRECATE R_API int r_asm_set_bits(RAsm *a, int bits) { if (has_bits (a->cur, bits)) { - a->bits = bits; // TODO : use OR? :) + a->config->bits = bits; // TODO : use OR? :) return true; } return false; @@ -432,24 +447,25 @@ R_DEPRECATE R_API int r_asm_set_bits(RAsm *a, int bits) { R_API bool r_asm_set_big_endian(RAsm *a, bool b) { r_return_val_if_fail (a && a->cur, false); - a->big_endian = false; // little endian by default + a->config->big_endian = false; // little endian by default + // TODO: Use a->config->endian the same as a->cur->endian, and save this switch switch (a->cur->endian) { case R_SYS_ENDIAN_NONE: case R_SYS_ENDIAN_BI: // TODO: not yet implemented - a->big_endian = b; + a->config->big_endian = b; break; case R_SYS_ENDIAN_LITTLE: - a->big_endian = false; + a->config->big_endian = false; break; case R_SYS_ENDIAN_BIG: - a->big_endian = true; + a->config->big_endian = true; break; default: eprintf ("RAsmPlugin doesn't specify endianness\n"); break; } - return a->big_endian; + return a->config->big_endian; } R_API bool r_asm_set_syntax(RAsm *a, int syntax) { @@ -460,7 +476,7 @@ R_API bool r_asm_set_syntax(RAsm *a, int syntax) { case R_ASM_SYNTAX_MASM: case R_ASM_SYNTAX_ATT: case R_ASM_SYNTAX_JZ: - a->syntax = syntax; + a->config->syntax = syntax; return true; default: return false; @@ -488,20 +504,20 @@ R_API int r_asm_disassemble(RAsm *a, RAsmOp *op, const ut8 *buf, int len) { op->size = 4; op->bitsize = 0; r_asm_op_set_asm (op, ""); - if (a->pcalign) { - const int mod = a->pc % a->pcalign; + if (a->config->pcalign) { + const int mod = a->pc % a->config->pcalign; if (mod) { - op->size = a->pcalign - mod; + op->size = a->config->pcalign - mod; r_strbuf_set (&op->buf_asm, "unaligned"); return -1; } } if (a->cur && a->cur->disassemble) { // shift buf N bits - if (a->bitshift > 0) { + if (a->config->bitshift > 0) { ut8 *tmp = calloc (len, 1); if (tmp) { - r_mem_copybits_delta (tmp, 0, buf, a->bitshift, (len * 8) - a->bitshift); + r_mem_copybits_delta (tmp, 0, buf, a->config->bitshift, (len * 8) - a->config->bitshift); ret = a->cur->disassemble (a, op, tmp, len); free (tmp); } @@ -522,18 +538,18 @@ R_API int r_asm_disassemble(RAsm *a, RAsmOp *op, const ut8 *buf, int len) { } if (op->bitsize > 0) { op->size = op->bitsize / 8; - a->bitshift += op->bitsize % 8; - int count = a->bitshift / 8; + a->config->bitshift += op->bitsize % 8; + int count = a->config->bitshift / 8; if (count > 0) { op->size = op->size + count; - a->bitshift %= 8; + a->config->bitshift %= 8; } } if (op->size < 1 || is_invalid (op)) { - if (a->invhex) { + if (a->config->invhex) { r_strf_buffer (32); - if (a->bits == 16) { + if (a->config->bits == 16) { ut16 b = r_read_le16 (buf); r_strbuf_set (&op->buf_asm, r_strf (".word 0x%04x", b)); } else { @@ -556,7 +572,7 @@ R_API int r_asm_disassemble(RAsm *a, RAsmOp *op, const ut8 *buf, int len) { typedef int (*Ase)(RAsm *a, RAsmOp *op, const char *buf); static bool assemblerMatches(RAsm *a, RAsmPlugin *h) { - if (!a || !h->arch || !h->assemble || !has_bits (h, a->bits)) { + if (!a || !h->arch || !h->assemble || !has_bits (h, a->config->bits)) { return false; } return (a->cur->arch && !strncmp (a->cur->arch, h->arch, strlen (a->cur->arch))); @@ -971,9 +987,9 @@ R_API RAsmCode *r_asm_massemble(RAsm *a, const char *assembly) { ptr = ptr_start; r_str_trim (ptr); if (!strncmp (ptr, ".intel_syntax", 13)) { - a->syntax = R_ASM_SYNTAX_INTEL; + a->config->syntax = R_ASM_SYNTAX_INTEL; } else if (!strncmp (ptr, ".att_syntax", 11)) { - a->syntax = R_ASM_SYNTAX_ATT; + a->config->syntax = R_ASM_SYNTAX_ATT; } else if (!strncmp (ptr, ".endian", 7)) { r_asm_set_big_endian (a, atoi (ptr + 7)); } else if (!strncmp (ptr, ".big_endian", 7 + 4)) { @@ -1018,11 +1034,11 @@ R_API RAsmCode *r_asm_massemble(RAsm *a, const char *assembly) { goto fail; } } else if (!strncmp (ptr, ".kernel ", 8)) { - r_syscall_setup (a->syscall, a->cur->arch, a->bits, asmcpu, ptr + 8); + r_syscall_setup (a->syscall, a->cur->arch, a->config->bits, asmcpu, ptr + 8); } else if (!strncmp (ptr, ".cpu ", 5)) { r_asm_set_cpu (a, ptr + 5); } else if (!strncmp (ptr, ".os ", 4)) { - r_syscall_setup (a->syscall, a->cur->arch, a->bits, asmcpu, ptr + 4); + r_syscall_setup (a->syscall, a->cur->arch, a->config->bits, asmcpu, ptr + 4); } else if (!strncmp (ptr, ".hex ", 5)) { ret = r_asm_op_set_hex (&op, ptr + 5); } else if ((!strncmp (ptr, ".int16 ", 7)) || !strncmp (ptr, ".short ", 7)) { diff --git a/libr/asm/p/asm_6502.c b/libr/asm/p/asm_6502.c index e3e88db55a..629c673c16 100644 --- a/libr/asm/p/asm_6502.c +++ b/libr/asm/p/asm_6502.c @@ -1,4 +1,4 @@ -/* radare - LGPL - Copyright 2012-2021 - pancake, condret */ +/* radare - LGPL - Copyright 2012-2022 - pancake, condret */ // copypasta from asm_gb.c #include diff --git a/libr/asm/p/asm_amd29k.c b/libr/asm/p/asm_amd29k.c index ce3f6a07cd..5c08412b0e 100644 --- a/libr/asm/p/asm_amd29k.c +++ b/libr/asm/p/asm_amd29k.c @@ -15,7 +15,7 @@ static int disassemble(RAsm *a, RAsmOp *op, const ut8 *buf, int len) { ut64 offset = a->pc; amd29k_instr_t instruction = {0}; op->size = 4; - if (amd29k_instr_decode (buf, len, &instruction, a->cpu)) { + if (amd29k_instr_decode (buf, len, &instruction, a->config->cpu)) { amd29k_instr_print (buf_asm, sizeof (buf_asm), offset, &instruction); r_asm_op_set_asm (op, buf_asm); return 4; diff --git a/libr/asm/p/asm_arc.c b/libr/asm/p/asm_arc.c index cb514eed72..48c61883d5 100644 --- a/libr/asm/p/asm_arc.c +++ b/libr/asm/p/asm_arc.c @@ -64,12 +64,12 @@ static int disassemble(RAsm *a, RAsmOp *op, const ut8 *buf, int len) { disasm_obj.symbol_at_address_func = &symbol_at_address; disasm_obj.memory_error_func = &memory_error_func; disasm_obj.print_address_func = &generic_print_address_func; - disasm_obj.endian = !a->big_endian; + disasm_obj.endian = !a->config->big_endian; disasm_obj.fprintf_func = &generic_fprintf_func; disasm_obj.stream = stdout; disasm_obj.mach = 0; r_strbuf_set (&op->buf_asm, ""); - if (a->bits == 16) { + if (a->config->bits == 16) { op->size = ARCompact_decodeInstr ((bfd_vma)Offset, &disasm_obj); } else { op->size = ARCTangent_decodeInstr ((bfd_vma)Offset, &disasm_obj); diff --git a/libr/asm/p/asm_arm_as.c b/libr/asm/p/asm_arm_as.c index a3690451a9..801c26b469 100644 --- a/libr/asm/p/asm_arm_as.c +++ b/libr/asm/p/asm_arm_as.c @@ -1,4 +1,4 @@ -/* radare - LGPL - Copyright 2015-2020 pancake */ +/* radare - LGPL - Copyright 2015-2022 pancake */ #include #include "../binutils_as.h" @@ -7,7 +7,7 @@ #define ASSEMBLER64 "R2_ARM64_AS" static int assemble(RAsm *a, RAsmOp *op, const char *buf) { - int bits = a->bits; + const int bits = a->config->bits; char *as = ""; #if __arm__ if (bits <= 32) { @@ -21,7 +21,7 @@ static int assemble(RAsm *a, RAsmOp *op, const char *buf) { char cmd_opt[4096]; snprintf (cmd_opt, sizeof (cmd_opt), "%s %s", bits == 16 ? "-mthumb" : "", - a->big_endian ? "-EB" : "-EL"); + a->config->big_endian ? "-EB" : "-EL"); return binutils_assemble (a, op, buf, as, bits == 64 ? ASSEMBLER64 : ASSEMBLER32, bits <= 32 ? ".syntax unified\n" : "", cmd_opt); diff --git a/libr/asm/p/asm_arm_cs.c b/libr/asm/p/asm_arm_cs.c index cd96d08676..900a91975a 100644 --- a/libr/asm/p/asm_arm_cs.c +++ b/libr/asm/p/asm_arm_cs.c @@ -1,4 +1,4 @@ -/* radare2 - LGPL - Copyright 2013-2021 - pancake */ +/* radare2 - LGPL - Copyright 2013-2022 - pancake */ #include #include @@ -37,7 +37,7 @@ static bool check_features(RAsm *a, cs_insn *insn) { if (!name) { return true; } - if (!strstr (a->features, name)) { + if (a->config->features && !strstr (a->config->features, name)) { return false; } } @@ -118,27 +118,30 @@ static int disassemble(RAsm *a, RAsmOp *op, const ut8 *buf, int len) { int ret, n = 0; bool found = false; ut64 itcond; + const int bits = a->config->bits; cs_mode mode = 0; - mode |= (a->bits == 16)? CS_MODE_THUMB: CS_MODE_ARM; - mode |= (a->big_endian)? CS_MODE_BIG_ENDIAN: CS_MODE_LITTLE_ENDIAN; - if (mode != omode || a->bits != obits) { + mode |= (bits == 16)? CS_MODE_THUMB: CS_MODE_ARM; + mode |= (a->config->big_endian)? CS_MODE_BIG_ENDIAN: CS_MODE_LITTLE_ENDIAN; + if (mode != omode || bits != obits) { cs_close (&cd); cd = 0; // unnecessary omode = mode; - obits = a->bits; + obits = bits; } - if (a->cpu) { - if (strstr (a->cpu, "cortex")) { + const char *cpu = a->config->cpu; + if (R_STR_ISNOTEMPTY (cpu)) { + if (strstr (cpu, "cortex")) { mode |= CS_MODE_MCLASS; } - if (a->bits != 64 && strstr (a->cpu, "v8")) { + if (bits != 64 && strstr (cpu, "v8")) { mode |= CS_MODE_V8; } } - if (a->features && a->bits != 64) { - if (strstr (a->features, "v8")) { + const char *features = a->config->features; + if (features && bits != 64) { + if (strstr (features, "v8")) { mode |= CS_MODE_V8; } } @@ -147,7 +150,7 @@ static int disassemble(RAsm *a, RAsmOp *op, const ut8 *buf, int len) { r_strbuf_set (&op->buf_asm, ""); } if (!cd || mode != omode) { - ret = (a->bits == 64)? + ret = (bits == 64)? cs_open (CS_ARCH_ARM64, mode, &cd): cs_open (CS_ARCH_ARM, mode, &cd); if (ret) { @@ -155,11 +158,10 @@ static int disassemble(RAsm *a, RAsmOp *op, const ut8 *buf, int len) { goto beach; } } - cs_option (cd, CS_OPT_SYNTAX, (a->syntax == R_ASM_SYNTAX_REGNUM) + cs_option (cd, CS_OPT_SYNTAX, (a->config->syntax == R_ASM_SYNTAX_REGNUM) ? CS_OPT_SYNTAX_NOREGNAME : CS_OPT_SYNTAX_DEFAULT); - cs_option (cd, CS_OPT_DETAIL, (a->features && *a->features) - ? CS_OPT_ON: CS_OPT_OFF); + cs_option (cd, CS_OPT_DETAIL, R_STR_ISNOTEMPTY (features) ? CS_OPT_ON: CS_OPT_OFF); cs_option (cd, CS_OPT_DETAIL, CS_OPT_ON); if (!buf) { goto beach; @@ -177,7 +179,7 @@ static int disassemble(RAsm *a, RAsmOp *op, const ut8 *buf, int len) { if (op) { op->size = 0; } - if (a->features && *a->features) { + if (R_STR_ISNOTEMPTY (features)) { if (!check_features (a, insn) && op) { op->size = insn->size; r_strbuf_set (&op->buf_asm, "illegal"); @@ -223,16 +225,17 @@ static int disassemble(RAsm *a, RAsmOp *op, const ut8 *buf, int len) { } static int assemble(RAsm *a, RAsmOp *op, const char *buf) { - const bool is_thumb = (a->bits == 16); + const int bits = a->config->bits; + const bool is_thumb = (bits == 16); int opsize; ut32 opcode = UT32_MAX; - if (a->bits == 64) { + if (bits == 64) { if (!arm64ass (buf, a->pc, &opcode)) { return -1; } } else { opcode = armass_assemble (buf, a->pc, is_thumb); - if (a->bits != 32 && a->bits != 16) { + if (bits != 32 && bits != 16) { eprintf ("Error: ARM assembler only supports 16 or 32 bits\n"); return -1; } @@ -241,18 +244,19 @@ static int assemble(RAsm *a, RAsmOp *op, const char *buf) { return -1; } ut8 opbuf[4]; + const bool be = a->config->big_endian; if (is_thumb) { const int o = opcode >> 16; opsize = o > 0? 4: 2; if (opsize == 4) { - if (a->big_endian) { + if (be) { r_write_le16 (opbuf, opcode >> 16); r_write_le16 (opbuf + 2, opcode & UT16_MAX); } else { r_write_be32 (opbuf, opcode); } } else if (opsize == 2) { - if (a->big_endian) { + if (be) { r_write_le16 (opbuf, opcode & UT16_MAX); } else { r_write_be16 (opbuf, opcode & UT16_MAX); @@ -260,7 +264,7 @@ static int assemble(RAsm *a, RAsmOp *op, const char *buf) { } } else { opsize = 4; - if (a->big_endian) { + if (be) { r_write_le32 (opbuf, opcode); } else { r_write_be32 (opbuf, opcode); diff --git a/libr/asm/p/asm_arm_gnu.c b/libr/asm/p/asm_arm_gnu.c index 7ee1b91e83..b151dbf9c2 100644 --- a/libr/asm/p/asm_arm_gnu.c +++ b/libr/asm/p/asm_arm_gnu.c @@ -1,4 +1,4 @@ -/* radare - LGPL - Copyright 2009-2017 - pancake */ +/* radare - LGPL - Copyright 2009-2022 - pancake */ #include #include @@ -94,18 +94,19 @@ DECLARE_GENERIC_PRINT_ADDRESS_FUNC() DECLARE_GENERIC_FPRINTF_FUNC() static int disassemble(RAsm *a, RAsmOp *op, const ut8 *buf, int len) { + const int bits = a->config->bits; static char *oldcpu = NULL; static int oldcpucode = 0; int opsize; struct disassemble_info obj; - char *options = (a->bits == 16)? "force-thumb": "no-force-thumb"; + char *options = (bits == 16)? "force-thumb": "no-force-thumb"; if (len < 2) { return -1; } memset (bytes, 0, sizeof (bytes)); memcpy (bytes, buf, R_MIN (len, 4)); - if (a->bits < 64 && len < (a->bits / 8)) { + if (bits < 64 && len < (bits / 8)) { return -1; } buf_global = &op->buf_asm; @@ -113,7 +114,7 @@ static int disassemble(RAsm *a, RAsmOp *op, const ut8 *buf, int len) { /* prepare disassembler */ memset (&obj, '\0', sizeof (struct disassemble_info)); - arm_mode = a->bits; + arm_mode = bits; #if 0 typedef struct { unsigned long core[2]; @@ -149,19 +150,21 @@ cpucode = 66471; }; /* select cpu */ - if (oldcpu != a->cpu) { + // XXX oldcpu leaks + char *cpu = a->config->cpu; + if (oldcpu != cpu) { int cpucode = 0; - if (a->cpu) { + if (cpu) { int i; - cpucode = atoi (a->cpu); + cpucode = atoi (cpu); for (i = 0; i < (sizeof(arm_cpucodes) / sizeof(arm_cpucodes[0])); i++) { - if (!strcmp (arm_cpucodes[i].name, a->cpu)) { + if (!strcmp (arm_cpucodes[i].name, cpu)) { cpucode = arm_cpucodes[i].cpucode; break; } } } - oldcpu = a->cpu; + oldcpu = cpu; oldcpucode = cpucode; } @@ -176,14 +179,14 @@ cpucode = 66471; obj.symbol_at_address_func = &symbol_at_address; obj.memory_error_func = &memory_error_func; obj.print_address_func = &generic_print_address_func; - obj.endian = !a->big_endian; + obj.endian = !a->config->big_endian; obj.fprintf_func = &generic_fprintf_func; obj.stream = stdout; obj.bytes_per_chunk = - obj.bytes_per_line = (a->bits / 8); + obj.bytes_per_line = (bits / 8); r_strbuf_set (&op->buf_asm, ""); - if (a->bits == 64) { + if (bits == 64) { obj.disassembler_options = NULL; memcpy (bytes, buf, 4); op->size = print_insn_aarch64 ((bfd_vma) Offset, &obj); diff --git a/libr/asm/p/asm_arm_hacks.inc b/libr/asm/p/asm_arm_hacks.inc index 0bb0ad7145..51539e44b7 100644 --- a/libr/asm/p/asm_arm_hacks.inc +++ b/libr/asm/p/asm_arm_hacks.inc @@ -220,8 +220,8 @@ static char *hack_handle_ldst(ut32 insn) { static int hackyArmAsm(RAsm *a, RAsmOp *op, const ut8 *buf, int len) { char *buf_asm = NULL; // Hacky support for ARMv8.5 - if (a->bits == 64 && len >= 4) { - ut32 insn = r_read_ble32 (buf, a->big_endian); + if (a->config->bits == 64 && len >= 4) { + ut32 insn = r_read_ble32 (buf, a->config->big_endian); int insn_class = (insn >> 25) & 0xf; switch (insn_class) { // Data Processing -- Register diff --git a/libr/asm/p/asm_arm_v35.c b/libr/asm/p/asm_arm_v35.c index b4e9d3fa2b..1abbc673f8 100644 --- a/libr/asm/p/asm_arm_v35.c +++ b/libr/asm/p/asm_arm_v35.c @@ -1,4 +1,4 @@ -/* radare2 - LGPL - Copyright 2020-2021 - pancake, aemmitt */ +/* radare2 - LGPL - Copyright 2020-2022 - pancake, aemmitt */ #include #include @@ -11,7 +11,8 @@ extern int disassemble_armv7(RAsm *a, RAsmOp *op, const ut8 *buf, int len); static int disassemble(RAsm *a, RAsmOp *op, const ut8 *buf, int len) { - if (a->bits == 16 || a->bits == 32) { + const int bits = a->config->bits; + if (bits == 16 || bits == 32) { return disassemble_armv7 (a, op, buf, len); } Instruction inst = {0}; diff --git a/libr/asm/p/asm_arm_winedbg.c b/libr/asm/p/asm_arm_winedbg.c index fa9bf1ad17..737aa8bcaf 100644 --- a/libr/asm/p/asm_arm_winedbg.c +++ b/libr/asm/p/asm_arm_winedbg.c @@ -1,4 +1,4 @@ -/* radare - LGPL - Copyright 2009-2018 - nibble, pancake */ +/* radare - LGPL - Copyright 2009-2022 - nibble, pancake */ #include #include @@ -13,8 +13,8 @@ static int disassemble(RAsm *a, RAsmOp *op, const ut8 *buf, int len) { ut8 buf2[4]; struct winedbg_arm_insn *arminsn = arm_new(); arm_set_pc (arminsn, a->pc); - arm_set_thumb (arminsn, a->bits == 16); - if (a->big_endian && a->bits == 32) { + arm_set_thumb (arminsn, a->config->bits == 16); + if (a->config->big_endian && a->config->bits == 32) { r_mem_swapendian (buf2, buf, 4); arm_set_input_buffer (arminsn, buf2); } else { @@ -24,7 +24,7 @@ static int disassemble(RAsm *a, RAsmOp *op, const ut8 *buf, int len) { const char *asmstr = winedbg_arm_insn_asm (arminsn); if (asmstr) { r_strbuf_set (&op->buf_asm, asmstr); - r_asm_op_set_hex(op, winedbg_arm_insn_hex (arminsn)); + r_asm_op_set_hex (op, winedbg_arm_insn_hex (arminsn)); } else { r_strbuf_set (&op->buf_asm, "invalid"); r_strbuf_set (&op->buf, ""); @@ -36,7 +36,7 @@ static int disassemble(RAsm *a, RAsmOp *op, const ut8 *buf, int len) { RAsmPlugin r_asm_plugin_arm_winedbg = { .name = "arm.winedbg", .arch = "arm", - .bits = 16|32, + .bits = 16 | 32, .endian = R_SYS_ENDIAN_LITTLE | R_SYS_ENDIAN_BIG, .desc = "WineDBG's ARM disassembler", .disassemble = &disassemble, diff --git a/libr/asm/p/asm_cris_gnu.c b/libr/asm/p/asm_cris_gnu.c index 3c93bfb432..c01ca8c3f5 100644 --- a/libr/asm/p/asm_cris_gnu.c +++ b/libr/asm/p/asm_cris_gnu.c @@ -1,4 +1,4 @@ -/* radare - LGPL - Copyright 2014-2018 - pancake */ +/* radare - LGPL - Copyright 2014-2022 - pancake */ #if 0 @@ -70,33 +70,34 @@ static int disassemble(RAsm *a, RAsmOp *op, const ut8 *buf, int len) { /* prepare disassembler */ memset (&disasm_obj, '\0', sizeof (struct disassemble_info)); - disasm_obj.disassembler_options=(a->bits==64)?"64":""; + disasm_obj.disassembler_options = (a->config->bits == 64)?"64":""; disasm_obj.buffer = bytes; disasm_obj.read_memory_func = &cris_buffer_read_memory; disasm_obj.symbol_at_address_func = &symbol_at_address; disasm_obj.memory_error_func = &memory_error_func; disasm_obj.print_address_func = &generic_print_address_func; - disasm_obj.endian = !a->big_endian; + disasm_obj.endian = !a->config->big_endian; disasm_obj.fprintf_func = &generic_fprintf_func; disasm_obj.stream = stdout; - if (a->cpu && *a->cpu) { + const char *cpu = a->config->cpu; + if (R_STR_ISNOTEMPTY (cpu)) { // enum cris_disass_family { cris_dis_v0_v10, cris_dis_common_v10_v32, cris_dis_v32 }; // 0: v0-v10 // 1: v10-v32 // 2: v32 mode = 0; - if (strstr (a->cpu, "v10")) { + if (strstr (cpu, "v10")) { mode = 1; } - if (strstr (a->cpu, "v32")) { + if (strstr (cpu, "v32")) { mode = 2; } } else { mode = 2; } (void)cris_parse_disassembler_options (&disasm_obj, mode); - if (a->syntax == R_ASM_SYNTAX_ATT) { + if (a->config->syntax == R_ASM_SYNTAX_ATT) { switch (mode) { case 0: op->size = print_insn_cris_with_register_prefix ((bfd_vma)Offset, &disasm_obj); diff --git a/libr/asm/p/asm_dalvik.c b/libr/asm/p/asm_dalvik.c index e72a3d8682..70bb2f9ef6 100644 --- a/libr/asm/p/asm_dalvik.c +++ b/libr/asm/p/asm_dalvik.c @@ -540,7 +540,7 @@ static int dalvik_assemble(RAsm *a, RAsmOp *op, const char *buf) { for (i = 0; i < 256; i++) { if (!strcmp (dalvik_opcodes[i].name, buf)) { ut8 buf[4]; - r_write_ble32 (buf, i, a->big_endian); + r_write_ble32 (buf, i, a->config->big_endian); r_strbuf_setbin (&op->buf, buf, sizeof (buf)); op->size = dalvik_opcodes[i].len; return op->size; diff --git a/libr/asm/p/asm_hppa_gnu.c b/libr/asm/p/asm_hppa_gnu.c index bd395fff63..7aaa60fc95 100644 --- a/libr/asm/p/asm_hppa_gnu.c +++ b/libr/asm/p/asm_hppa_gnu.c @@ -60,7 +60,7 @@ static int disassemble(RAsm *a, RAsmOp *op, const ut8 *buf, int len) { /* prepare disassembler */ memset (&disasm_obj, '\0', sizeof (struct disassemble_info)); - disasm_obj.disassembler_options = (a->bits == 64)?"64":""; + disasm_obj.disassembler_options = (a->config->bits == 64)?"64":""; disasm_obj.buffer = bytes; disasm_obj.read_memory_func = &hppa_buffer_read_memory; disasm_obj.symbol_at_address_func = &symbol_at_address; diff --git a/libr/asm/p/asm_lanai_gnu.c b/libr/asm/p/asm_lanai_gnu.c index e4007c3924..b460d2a95d 100644 --- a/libr/asm/p/asm_lanai_gnu.c +++ b/libr/asm/p/asm_lanai_gnu.c @@ -47,7 +47,7 @@ static int disassemble(RAsm *a, RAsmOp *op, const ut8 *buf, int len) { /* prepare disassembler */ memset (&disasm_obj, '\0', sizeof (struct disassemble_info)); - disasm_obj.disassembler_options = (a->bits==64)? "64": ""; + disasm_obj.disassembler_options = (a->config->bits == 64)? "64": ""; disasm_obj.buffer = bytes; disasm_obj.read_memory_func = &lanai_buffer_read_memory; disasm_obj.symbol_at_address_func = &symbol_at_address; @@ -68,7 +68,7 @@ RAsmPlugin r_asm_plugin_lanai_gnu = { .name = "lanai", // .gnu", .arch = "lanai", .license = "GPL3", - .bits = 32, + .bits = 32 | 64, .endian = R_SYS_ENDIAN_BIG, .desc = "LANAI", .disassemble = &disassemble diff --git a/libr/asm/p/asm_lm32.c b/libr/asm/p/asm_lm32.c index 0c8168d7aa..b230616b00 100644 --- a/libr/asm/p/asm_lm32.c +++ b/libr/asm/p/asm_lm32.c @@ -1,6 +1,4 @@ -/* lm32 support for radare2 - * 2-clause BSD - * Copyright 2015 Felix Held */ +/* lm32 for r2 - BSD - Copyright 2015-2022 - Felix Held */ #include #include @@ -39,7 +37,9 @@ static int string_to_reg_number(const char *str, ut8 *num) { } } //register name string not found in array - if (match_idx == 0xff) return -1; + if (match_idx == 0xff) { + return -1; + } *num = RAsmLm32Regs[match_idx].number; return 0; } @@ -54,7 +54,9 @@ static int string_to_csr_number(const char *str, ut8 *num) { } } //csr name string not found in array - if (match_idx == 0xff) return -1; + if (match_idx == 0xff) { + return -1; + } *num = RAsmLm32Csrs[match_idx].number; return 0; } @@ -68,7 +70,9 @@ static int string_to_opcode(const char *str, ut8 *num) { } } //string not found in array - if (tmp_num == 0xff) return -1; + if (tmp_num == 0xff) { + return -1; + } *num = tmp_num; return 0; } @@ -432,13 +436,13 @@ static int disassemble(RAsm *a, RAsmOp *op, const ut8 *buf, int len) { instr.addr = a->pc; if (r_asm_lm32_decode (&instr)) { r_strbuf_set (&op->buf_asm, "invalid"); - a->invhex = 1; + a->config->invhex = 1; return -1; } //op->buf_asm is 256 chars long, which is more than sufficient if (r_asm_lm32_stringify (&instr, r_strbuf_get (&op->buf_asm))) { r_strbuf_set (&op->buf_asm, "invalid"); - a->invhex = 1; + a->config->invhex = 1; return -1; } return 4; diff --git a/libr/asm/p/asm_m680x_cs.c b/libr/asm/p/asm_m680x_cs.c index 1af025e0f5..c2509f2395 100644 --- a/libr/asm/p/asm_m680x_cs.c +++ b/libr/asm/p/asm_m680x_cs.c @@ -59,7 +59,7 @@ static int disassemble(RAsm *a, RAsmOp *op, const ut8 *buf, int len) { int mode, n, ret; ut64 off = a->pc; cs_insn* insn = NULL; - mode = m680xmode (a->cpu); + mode = m680xmode (a->config->cpu); if (cd && mode != omode) { cs_close (&cd); cd = 0; @@ -97,7 +97,7 @@ RAsmPlugin r_asm_plugin_m680x_cs = { .desc = "Capstone "CAPSTONE_VERSION_STRING" M680X Disassembler", .license = "BSD", .arch = "m680x", - .bits = 8|32, + .bits = 8 | 32, .endian = R_SYS_ENDIAN_LITTLE, .fini = the_end, .disassemble = &disassemble, @@ -109,7 +109,7 @@ RAsmPlugin r_asm_plugin_m680x_cs = { .desc = "Capstone M680X Disassembler (Not supported)", .license = "BSD", .arch = "m680x", - .bits = 8|32, + .bits = 8 | 32, }; #endif diff --git a/libr/asm/p/asm_mips_cs.c b/libr/asm/p/asm_mips_cs.c index e8eaf83ad3..0c6a763041 100644 --- a/libr/asm/p/asm_mips_cs.c +++ b/libr/asm/p/asm_mips_cs.c @@ -12,24 +12,25 @@ static csh cd = 0; static int disassemble(RAsm *a, RAsmOp *op, const ut8 *buf, int len) { cs_insn* insn; int mode, n, ret = -1; - mode = (a->big_endian)? CS_MODE_BIG_ENDIAN: CS_MODE_LITTLE_ENDIAN; + mode = (a->config->big_endian)? CS_MODE_BIG_ENDIAN: CS_MODE_LITTLE_ENDIAN; if (!op) { return 0; } - if (a->cpu && *a->cpu) { - if (!strcmp (a->cpu, "micro")) { + const char *cpu = a->config->cpu; + if (R_STR_ISNOTEMPTY (cpu)) { + if (!strcmp (cpu, "micro")) { mode |= CS_MODE_MICRO; - } else if (!strcmp (a->cpu, "r6")) { + } else if (!strcmp (cpu, "r6")) { mode |= CS_MODE_MIPS32R6; - } else if (!strcmp (a->cpu, "v3")) { + } else if (!strcmp (cpu, "v3")) { mode |= CS_MODE_MIPS3; - } else if (!strcmp (a->cpu, "v2")) { + } else if (!strcmp (cpu, "v2")) { #if CS_API_MAJOR > 3 mode |= CS_MODE_MIPS2; #endif } } - mode |= (a->bits == 64)? CS_MODE_MIPS64 : CS_MODE_MIPS32; + mode |= (a->config->bits == 64)? CS_MODE_MIPS64 : CS_MODE_MIPS32; memset (op, 0, sizeof (RAsmOp)); op->size = 4; if (cd != 0) { @@ -39,7 +40,7 @@ static int disassemble(RAsm *a, RAsmOp *op, const ut8 *buf, int len) { if (ret) { goto fin; } - if (a->syntax == R_ASM_SYNTAX_REGNUM) { + if (a->config->syntax == R_ASM_SYNTAX_REGNUM) { cs_option (cd, CS_OPT_SYNTAX, CS_OPT_SYNTAX_NOREGNAME); } else { cs_option (cd, CS_OPT_SYNTAX, CS_OPT_SYNTAX_DEFAULT); @@ -72,7 +73,7 @@ fin: static int assemble(RAsm *a, RAsmOp *op, const char *str) { ut8 *opbuf = (ut8*)r_strbuf_get (&op->buf); int ret = mips_assemble (str, a->pc, opbuf); - if (a->big_endian) { + if (a->config->big_endian) { ut8 *buf = opbuf; ut8 tmp = buf[0]; buf[0] = buf[3]; @@ -90,7 +91,7 @@ RAsmPlugin r_asm_plugin_mips_cs = { .license = "BSD", .arch = "mips", .cpus = "mips32/64,micro,r6,v3,v2", - .bits = 16|32|64, + .bits = 16 | 32 | 64, .endian = R_SYS_ENDIAN_LITTLE | R_SYS_ENDIAN_BIG, .disassemble = &disassemble, .mnemonics = mnemonics, diff --git a/libr/asm/p/asm_mips_gnu.c b/libr/asm/p/asm_mips_gnu.c index 0e31c47270..d626667243 100644 --- a/libr/asm/p/asm_mips_gnu.c +++ b/libr/asm/p/asm_mips_gnu.c @@ -52,56 +52,57 @@ static int disassemble(struct r_asm_t *a, struct r_asm_op_t *op, const ut8 *buf, Offset = a->pc; memcpy (bytes, buf, 4); // TODO handle thumb - if ((a->cpu != pre_cpu) && (a->features != pre_features)) { + const char *cpu = a->config->cpu; + if ((cpu != pre_cpu) && (a->config->features != pre_features)) { free (disasm_obj.disassembler_options); memset (&disasm_obj, '\0', sizeof (struct disassemble_info)); } /* prepare disassembler */ - if (a->cpu && (!pre_cpu || !strcmp(a->cpu, pre_cpu))) { - if (!r_str_casecmp (a->cpu, "mips64r2")) { + if (cpu && (!pre_cpu || !strcmp (cpu, pre_cpu))) { + if (!r_str_casecmp (cpu, "mips64r2")) { disasm_obj.mach = bfd_mach_mipsisa64r2; - } else if (!r_str_casecmp (a->cpu, "mips32r2")) { + } else if (!r_str_casecmp (cpu, "mips32r2")) { disasm_obj.mach = bfd_mach_mipsisa32r2; - } else if (!r_str_casecmp (a->cpu, "mips64")) { + } else if (!r_str_casecmp (cpu, "mips64")) { disasm_obj.mach = bfd_mach_mipsisa64; - } else if (!r_str_casecmp (a->cpu, "mips32")) { + } else if (!r_str_casecmp (cpu, "mips32")) { disasm_obj.mach = bfd_mach_mipsisa32; - } else if (!r_str_casecmp (a->cpu, "loongson3a")) { + } else if (!r_str_casecmp (cpu, "loongson3a")) { disasm_obj.mach = bfd_mach_mips_gs464; - } else if (!r_str_casecmp (a->cpu, "gs464")) { + } else if (!r_str_casecmp (cpu, "gs464")) { disasm_obj.mach = bfd_mach_mips_gs464; - } else if (!r_str_casecmp (a->cpu, "gs464e")) { + } else if (!r_str_casecmp (cpu, "gs464e")) { disasm_obj.mach = bfd_mach_mips_gs464e; - } else if (!r_str_casecmp (a->cpu, "gs264e")) { + } else if (!r_str_casecmp (cpu, "gs264e")) { disasm_obj.mach = bfd_mach_mips_gs264e; - } else if (!r_str_casecmp (a->cpu, "loongson2e")) { + } else if (!r_str_casecmp (cpu, "loongson2e")) { disasm_obj.mach = bfd_mach_mips_loongson_2e; - } else if (!r_str_casecmp (a->cpu, "loongson2f")) { + } else if (!r_str_casecmp (cpu, "loongson2f")) { disasm_obj.mach = bfd_mach_mips_loongson_2f; - } else if (!r_str_casecmp (a->cpu, "mips32/64")) { + } else if (!r_str_casecmp (cpu, "mips32/64")) { //Fallback for default config disasm_obj.mach = bfd_mach_mips_loongson_2f; } - pre_cpu = r_str_dup (pre_cpu, a->cpu); - } - else { + pre_cpu = r_str_dup (pre_cpu, cpu); + } else { disasm_obj.mach = bfd_mach_mips_loongson_2f; } - if (a->features && (!pre_features || !strcmp (a->features, pre_features))) { + const char *features = a->config->features; + if (features && (!pre_features || !strcmp (features, pre_features))) { free (disasm_obj.disassembler_options); - if (strstr (a->features, "n64")) { + if (strstr (features, "n64")) { disasm_obj.disassembler_options = r_str_new ("abi=n64"); - } else if (strstr (a->features, "n32")) { + } else if (strstr (features, "n32")) { disasm_obj.disassembler_options = r_str_new ("abi=n32"); - } else if (strstr (a->features, "o32")) { + } else if (strstr (features, "o32")) { disasm_obj.disassembler_options = r_str_new ("abi=o32"); } - pre_features = r_str_dup (pre_features, a->features); + pre_features = r_str_dup (pre_features, features); } - mips_mode = a->bits; + mips_mode = a->config->bits; disasm_obj.arch = CPU_LOONGSON_2F; disasm_obj.buffer = bytes; disasm_obj.read_memory_func = &mips_buffer_read_memory; @@ -110,7 +111,7 @@ static int disassemble(struct r_asm_t *a, struct r_asm_op_t *op, const ut8 *buf, disasm_obj.print_address_func = &generic_print_address_func; disasm_obj.buffer_vma = Offset; disasm_obj.buffer_length = 4; - disasm_obj.endian = !a->big_endian; + disasm_obj.endian = !a->config->big_endian; disasm_obj.fprintf_func = &generic_fprintf_func; disasm_obj.stream = stdout; op->size = (disasm_obj.endian == BFD_ENDIAN_LITTLE) @@ -125,7 +126,7 @@ static int disassemble(struct r_asm_t *a, struct r_asm_op_t *op, const ut8 *buf, static int assemble(RAsm *a, RAsmOp *op, const char *str) { ut8 *opbuf = (ut8*)r_strbuf_get (&op->buf); int ret = mips_assemble (str, a->pc, opbuf); - if (a->big_endian) { + if (a->config->big_endian) { ut8 tmp = opbuf[0]; opbuf[0] = opbuf[3]; opbuf[3] = tmp; diff --git a/libr/asm/p/asm_nios2.c b/libr/asm/p/asm_nios2.c index 715d74442f..11278658ae 100644 --- a/libr/asm/p/asm_nios2.c +++ b/libr/asm/p/asm_nios2.c @@ -51,7 +51,7 @@ static int disassemble(RAsm *a, struct r_asm_op_t *op, const ut8 *buf, int len) disasm_obj.symbol_at_address_func = &symbol_at_address; disasm_obj.memory_error_func = &memory_error_func; disasm_obj.print_address_func = &generic_print_address_func; - disasm_obj.endian = !a->big_endian; + disasm_obj.endian = !a->config->big_endian; disasm_obj.fprintf_func = &generic_fprintf_func; disasm_obj.stream = stdout; diff --git a/libr/asm/p/asm_pdp11_gnu.c b/libr/asm/p/asm_pdp11_gnu.c index ba38eac45e..afd818c109 100644 --- a/libr/asm/p/asm_pdp11_gnu.c +++ b/libr/asm/p/asm_pdp11_gnu.c @@ -58,7 +58,7 @@ static int disassemble(RAsm *a, RAsmOp *op, const ut8 *buf, int len) { disasm_obj.symbol_at_address_func = &symbol_at_address; disasm_obj.memory_error_func = &memory_error_func; disasm_obj.print_address_func = &generic_print_address_func; - disasm_obj.endian = !a->big_endian; + disasm_obj.endian = !a->config->big_endian; disasm_obj.fprintf_func = &generic_fprintf_func; disasm_obj.stream = stdout; op->size = print_insn_pdp11 ((bfd_vma)Offset, &disasm_obj); diff --git a/libr/asm/p/asm_pic.c b/libr/asm/p/asm_pic.c index 2f592e63ca..6a450cfdc3 100644 --- a/libr/asm/p/asm_pic.c +++ b/libr/asm/p/asm_pic.c @@ -1,4 +1,4 @@ -/* radare2 - LGPL - Copyright 2018 - thestr4ng3r, courk */ +/* radare2 - LGPL - Copyright 2018-2022 - thestr4ng3r, courk */ #include #include @@ -12,12 +12,15 @@ static int asm_pic_disassemble(RAsm *a, RAsmOp *op, const ut8 *b, int l) { char opbuf[128]; const char *opstr = opbuf; strcpy (opbuf, "invalid"); - if (a->cpu && strcasecmp (a->cpu, "baseline") == 0) { - res = pic_baseline_disassemble (op, opbuf, b, l); - } else if (a->cpu && strcasecmp (a->cpu, "midrange") == 0) { - res = pic_midrange_disassemble (op, opbuf, b, l); - } else if (a->cpu && strcasecmp (a->cpu, "pic18") == 0) { - res = pic_pic18_disassemble (op, opbuf, b, l); + const char *cpu = a->config->cpu; + if (R_STR_ISNOTEMPTY (cpu)) { + if (strcasecmp (cpu, "baseline") == 0) { + res = pic_baseline_disassemble (op, opbuf, b, l); + } else if (strcasecmp (cpu, "midrange") == 0) { + res = pic_midrange_disassemble (op, opbuf, b, l); + } else if (strcasecmp (cpu, "pic18") == 0) { + res = pic_pic18_disassemble (op, opbuf, b, l); + } } r_asm_op_set_asm (op, opstr); return op->size = res; diff --git a/libr/asm/p/asm_ppc_as.c b/libr/asm/p/asm_ppc_as.c index 96b7a5e63f..dd474b883f 100644 --- a/libr/asm/p/asm_ppc_as.c +++ b/libr/asm/p/asm_ppc_as.c @@ -13,9 +13,8 @@ static int assemble(RAsm *a, RAsmOp *op, const char *buf) { #endif char cmd_opt[4096]; snprintf (cmd_opt, sizeof (cmd_opt), "-mregnames -a%d %s", - a->bits, a->big_endian ? "-be" : "-le"); - return binutils_assemble (a, op, buf, - as, ASSEMBLER, "", cmd_opt); + a->config->bits, a->config->big_endian ? "-be" : "-le"); + return binutils_assemble (a, op, buf, as, ASSEMBLER, "", cmd_opt); } RAsmPlugin r_asm_plugin_ppc_as = { diff --git a/libr/asm/p/asm_ppc_cs.c b/libr/asm/p/asm_ppc_cs.c index 41997c8937..2d9b038267 100644 --- a/libr/asm/p/asm_ppc_cs.c +++ b/libr/asm/p/asm_ppc_cs.c @@ -58,21 +58,24 @@ static int disassemble(RAsm *a, RAsmOp *op, const ut8 *buf, int len) { int n, ret; ut64 off = a->pc; cs_insn* insn; - int mode = (a->bits == 64) ? CS_MODE_64 : (a->bits == 32) ? CS_MODE_32 : 0; - mode |= a->big_endian ? CS_MODE_BIG_ENDIAN : CS_MODE_LITTLE_ENDIAN; + const int bits = a->config->bits; + int mode = (bits == 64) ? CS_MODE_64 : (bits == 32) ? CS_MODE_32 : 0; + const bool be = a->config->big_endian; + mode |= be ? CS_MODE_BIG_ENDIAN : CS_MODE_LITTLE_ENDIAN; - if (a->cpu && strncmp (a->cpu, "vle", 3) == 0) { + const char *cpu = a->config->cpu; + if (cpu && strncmp (cpu, "vle", 3) == 0) { // vle is big-endian only - if (!a->big_endian) { + if (!be) { return -1; } ret = decompile_vle (a, op, buf, len); if (ret >= 0) { return op->size; } - } else if (a->cpu && strncmp (a->cpu, "ps", 2) == 0) { + } else if (cpu && strncmp (cpu, "ps", 2) == 0) { // libps is big-endian only - if (!a->big_endian) { + if (!be) { return -1; } ret = decompile_ps (a, op, buf, len); @@ -80,11 +83,11 @@ static int disassemble(RAsm *a, RAsmOp *op, const ut8 *buf, int len) { return op->size; } } - if (mode != omode || a->bits != obits) { + if (mode != omode || bits != obits) { cs_close (&handle); handle = 0; omode = mode; - obits = a->bits; + obits = bits; } if (handle == 0) { ret = cs_open (CS_ARCH_PPC, mode, &handle); diff --git a/libr/asm/p/asm_ppc_gnu.c b/libr/asm/p/asm_ppc_gnu.c index 41f264961d..f9abe60e03 100644 --- a/libr/asm/p/asm_ppc_gnu.c +++ b/libr/asm/p/asm_ppc_gnu.c @@ -52,10 +52,11 @@ static int disassemble(RAsm *a, RAsmOp *op, const ut8 *buf, int len) { /* prepare disassembler */ memset (&disasm_obj, '\0', sizeof (struct disassemble_info)); *options = 0; - if (!R_STR_ISEMPTY (a->cpu)) { + const int bits = a->config->bits; + if (!R_STR_ISEMPTY (a->config->cpu)) { snprintf (options, sizeof (options), "%s,%s", - (a->bits == 64)? "64": "", a->cpu); - } else if (a->bits == 64){ + (bits == 64)? "64": "", a->config->cpu); + } else if (bits == 64) { r_str_ncpy (options, "64", sizeof (options)); } disasm_obj.disassembler_options = options; @@ -64,10 +65,10 @@ static int disassemble(RAsm *a, RAsmOp *op, const ut8 *buf, int len) { disasm_obj.symbol_at_address_func = &symbol_at_address; disasm_obj.memory_error_func = &memory_error_func; disasm_obj.print_address_func = &generic_print_address_func; - disasm_obj.endian = !a->big_endian; + disasm_obj.endian = !a->config->big_endian; disasm_obj.fprintf_func = &generic_fprintf_func; disasm_obj.stream = stdout; - if (a->big_endian) { + if (a->config->big_endian) { op->size = print_insn_big_powerpc ((bfd_vma)Offset, &disasm_obj); } else { op->size = print_insn_little_powerpc ((bfd_vma)Offset, &disasm_obj); diff --git a/libr/asm/p/asm_pyc.c b/libr/asm/p/asm_pyc.c index ff05eeffd2..a71ca3aafc 100644 --- a/libr/asm/p/asm_pyc.c +++ b/libr/asm/p/asm_pyc.c @@ -28,13 +28,13 @@ static int disassemble(RAsm *a, RAsmOp *opstruct, const ut8 *buf, int len) { cobjs = r_list_get_n (shared, 0); interned_table = r_list_get_n (shared, 1); } - if (!opcodes_cache || !pyc_opcodes_equal (opcodes_cache, a->cpu)) { - opcodes_cache = get_opcode_by_version (a->cpu); + if (!opcodes_cache || !pyc_opcodes_equal (opcodes_cache, a->config->cpu)) { + opcodes_cache = get_opcode_by_version (a->config->cpu); if (!opcodes_cache) { opcodes_cache = get_opcode_by_version ("v3.9.0"); } if (opcodes_cache) { - opcodes_cache->bits = a->bits; + opcodes_cache->bits = a->config->bits; } else { return 0; } diff --git a/libr/asm/p/asm_riscv.c b/libr/asm/p/asm_riscv.c index a494fee9d4..fa11165376 100644 --- a/libr/asm/p/asm_riscv.c +++ b/libr/asm/p/asm_riscv.c @@ -17,7 +17,7 @@ static int disassemble(RAsm *a, RAsmOp *op, const ut8 *buf, int len) { static int assemble(RAsm *a, RAsmOp *op, const char *str) { ut8 *opbuf = (ut8*)r_strbuf_get (&op->buf); int ret = riscv_assemble (str, a->pc, opbuf); - if (a->big_endian) { + if (a->config->big_endian) { ut8 *buf = opbuf; ut8 tmp = buf[0]; buf[0] = buf[3]; diff --git a/libr/asm/p/asm_riscv_cs.c b/libr/asm/p/asm_riscv_cs.c index 8723c893ca..645f070878 100644 --- a/libr/asm/p/asm_riscv_cs.c +++ b/libr/asm/p/asm_riscv_cs.c @@ -11,7 +11,7 @@ static csh cd = 0; static int disassemble(RAsm *a, RAsmOp *op, const ut8 *buf, int len) { cs_insn* insn; - int mode = (a->bits == 64)? CS_MODE_RISCV64 : CS_MODE_RISCV32; + int mode = (a->config->bits == 64)? CS_MODE_RISCV64 : CS_MODE_RISCV32; op->size = 4; if (cd != 0) { cs_close (&cd); @@ -58,7 +58,7 @@ RAsmPlugin r_asm_plugin_riscv_cs = { .license = "BSD", .arch = "riscv", .cpus = "", - .bits = 32|64, + .bits = 32 | 64, .endian = R_SYS_ENDIAN_LITTLE | R_SYS_ENDIAN_BIG, .disassemble = &disassemble, .mnemonics = mnemonics, diff --git a/libr/asm/p/asm_rsp.c b/libr/asm/p/asm_rsp.c index 9dcb0385c2..2c0d0578e0 100644 --- a/libr/asm/p/asm_rsp.c +++ b/libr/asm/p/asm_rsp.c @@ -23,7 +23,7 @@ static int disassemble(RAsm *a, RAsmOp *op, const ut8 *buf, int len) { } op->size = 4; - ut32 iw = r_read_ble32 (buf, a->big_endian); + ut32 iw = r_read_ble32 (buf, a->config->big_endian); r_instr = rsp_instruction_decode (a->pc, iw); r_strbuf_append (&op->buf_asm, r_instr.mnemonic); diff --git a/libr/asm/p/asm_s390_gnu.c b/libr/asm/p/asm_s390_gnu.c index e40b46a547..e5c0d6dc32 100644 --- a/libr/asm/p/asm_s390_gnu.c +++ b/libr/asm/p/asm_s390_gnu.c @@ -52,8 +52,8 @@ static int disassemble(RAsm *a, RAsmOp *op, const ut8 *buf, int len) { /* prepare disassembler */ memset (&disasm_obj, '\0', sizeof (struct disassemble_info)); - if (!R_STR_ISEMPTY (a->cpu)) { - r_str_ncpy (options, a->cpu, sizeof (options)); + if (!R_STR_ISEMPTY (a->config->cpu)) { + r_str_ncpy (options, a->config->cpu, sizeof (options)); } else { *options = 0; } diff --git a/libr/asm/p/asm_sh.c b/libr/asm/p/asm_sh.c index 6569288408..bdd834a2ed 100644 --- a/libr/asm/p/asm_sh.c +++ b/libr/asm/p/asm_sh.c @@ -49,7 +49,7 @@ static int disassemble(RAsm *a, RAsmOp *op, const ut8 *buf, int len) { disasm_obj.symbol_at_address_func = &symbol_at_address; disasm_obj.memory_error_func = &memory_error_func; disasm_obj.print_address_func = &generic_print_address_func; - disasm_obj.endian = !a->big_endian; + disasm_obj.endian = !a->config->big_endian; disasm_obj.fprintf_func = &generic_fprintf_func; disasm_obj.stream = stdout; diff --git a/libr/asm/p/asm_sparc_cs.c b/libr/asm/p/asm_sparc_cs.c index 347bfc4578..26d1e06a0d 100644 --- a/libr/asm/p/asm_sparc_cs.c +++ b/libr/asm/p/asm_sparc_cs.c @@ -10,8 +10,9 @@ static int disassemble(RAsm *a, RAsmOp *op, const ut8 *buf, int len) { cs_insn* insn; int n = -1, ret = -1; int mode = CS_MODE_BIG_ENDIAN; - if (a->cpu && *a->cpu) { - if (!strcmp (a->cpu, "v9")) { + const char *cpu = a->config->cpu; + if (R_STR_ISNOTEMPTY (cpu)) { + if (!strcmp (cpu, "v9")) { mode |= CS_MODE_V9; } } @@ -30,7 +31,7 @@ static int disassemble(RAsm *a, RAsmOp *op, const ut8 *buf, int len) { if (!op) { return 0; } - if (a->big_endian) { + if (a->config->big_endian) { n = cs_disasm (cd, buf, len, a->pc, 1, &insn); } if (n < 1) { @@ -64,7 +65,7 @@ RAsmPlugin r_asm_plugin_sparc_cs = { .license = "BSD", .arch = "sparc", .cpus = "v9", - .bits = 32|64, + .bits = 32 | 64, .endian = R_SYS_ENDIAN_BIG | R_SYS_ENDIAN_LITTLE, .disassemble = &disassemble, .mnemonics = mnemonics diff --git a/libr/asm/p/asm_sparc_gnu.c b/libr/asm/p/asm_sparc_gnu.c index 07fe5cdd4f..eb4b29281d 100644 --- a/libr/asm/p/asm_sparc_gnu.c +++ b/libr/asm/p/asm_sparc_gnu.c @@ -55,10 +55,10 @@ static int disassemble(RAsm *a, RAsmOp *op, const ut8 *buf, int len) { disasm_obj.symbol_at_address_func = &symbol_at_address; disasm_obj.memory_error_func = &memory_error_func; disasm_obj.print_address_func = &generic_print_address_func; - disasm_obj.endian = a->big_endian; + disasm_obj.endian = a->config->big_endian; disasm_obj.fprintf_func = &generic_fprintf_func; disasm_obj.stream = stdout; - disasm_obj.mach = ((a->bits == 64) + disasm_obj.mach = ((a->config->bits == 64) ? bfd_mach_sparc_v9b : 0); @@ -76,7 +76,7 @@ static int disassemble(RAsm *a, RAsmOp *op, const ut8 *buf, int len) { RAsmPlugin r_asm_plugin_sparc_gnu = { .name = "sparc.gnu", .arch = "sparc", - .bits = 32|64, + .bits = 32 | 64, .endian = R_SYS_ENDIAN_BIG | R_SYS_ENDIAN_LITTLE, .license = "GPL3", .desc = "Scalable Processor Architecture", diff --git a/libr/asm/p/asm_tms320.c b/libr/asm/p/asm_tms320.c index 12b3824ccc..758a6fcdea 100644 --- a/libr/asm/p/asm_tms320.c +++ b/libr/asm/p/asm_tms320.c @@ -75,15 +75,16 @@ static int tms320c64x_disassemble(RAsm *a, RAsmOp *op, const ut8 *buf, int len) static R_TH_LOCAL tms320_dasm_t engine = {0}; static int tms320_disassemble(RAsm *a, RAsmOp *op, const ut8 *buf, int len) { - if (a->cpu && r_str_casecmp (a->cpu, "c54x") == 0) { + const char *cpu = a->config->cpu; + if (cpu && r_str_casecmp (cpu, "c54x") == 0) { tms320_f_set_cpu (&engine, TMS320_F_CPU_C54X); - } else if (a->cpu && r_str_casecmp(a->cpu, "c55x+") == 0) { + } else if (cpu && r_str_casecmp(cpu, "c55x+") == 0) { tms320_f_set_cpu (&engine, TMS320_F_CPU_C55X_PLUS); - } else if (a->cpu && r_str_casecmp(a->cpu, "c55x") == 0) { + } else if (cpu && r_str_casecmp(cpu, "c55x") == 0) { tms320_f_set_cpu (&engine, TMS320_F_CPU_C55X); } else { #if CAPSTONE_HAS_TMS320C64X - if (a->cpu && !r_str_casecmp (a->cpu, "c64x")) { + if (cpu && !r_str_casecmp (cpu, "c64x")) { return tms320c64x_disassemble (a, op, buf, len); } #endif diff --git a/libr/asm/p/asm_tricore.c b/libr/asm/p/asm_tricore.c index 6c5af86afd..c4f54ea80a 100644 --- a/libr/asm/p/asm_tricore.c +++ b/libr/asm/p/asm_tricore.c @@ -76,7 +76,7 @@ static int disassemble(RAsm *a, RAsmOp *op, const ut8 *buf, int len) { /* prepare disassembler */ memset (&disasm_obj, '\0', sizeof (struct disassemble_info)); - disasm_obj.disassembler_options = (a->bits==64)?"64":""; + disasm_obj.disassembler_options = (a->config->bits == 64)?"64":""; disasm_obj.buffer = bytes; disasm_obj.read_memory_func = &tricore_buffer_read_memory; disasm_obj.symbol_at_address_func = &symbol_at_address; @@ -87,7 +87,7 @@ static int disassemble(RAsm *a, RAsmOp *op, const ut8 *buf, int len) { disasm_obj.stream = stdout; // cpu type - disasm_obj.mach = cpu_to_mach (a->cpu); + disasm_obj.mach = cpu_to_mach (a->config->cpu); op->size = print_insn_tricore ((bfd_vma)Offset, &disasm_obj); if (op->size == -1) { diff --git a/libr/asm/p/asm_v850_gnu.c b/libr/asm/p/asm_v850_gnu.c index 56e658faae..6c27d74aa9 100644 --- a/libr/asm/p/asm_v850_gnu.c +++ b/libr/asm/p/asm_v850_gnu.c @@ -48,16 +48,17 @@ static int disassemble(RAsm *a, RAsmOp *op, const ut8 *buf, int len) { memset (&disasm_obj, '\0', sizeof (struct disassemble_info)); disasm_obj.buffer = bytes; disasm_obj.flavour = PROCESSOR_V850E2; - if (!R_STR_ISEMPTY (a->cpu)) { - if (!strcmp (a->cpu, "e")) { + const char *cpu = a->config->cpu; + if (!R_STR_ISEMPTY (cpu)) { + if (!strcmp (cpu, "e")) { disasm_obj.flavour = PROCESSOR_V850E; - } else if (!strcmp (a->cpu, "e1")) { + } else if (!strcmp (cpu, "e1")) { disasm_obj.flavour = PROCESSOR_V850E1; - } else if (!strcmp (a->cpu, "e2")) { + } else if (!strcmp (cpu, "e2")) { disasm_obj.flavour = PROCESSOR_V850E2; - } else if (!strcmp (a->cpu, "e2v3")) { + } else if (!strcmp (cpu, "e2v3")) { disasm_obj.flavour = PROCESSOR_V850E2V3; - } else if (!strcmp (a->cpu, "e3v5")) { + } else if (!strcmp (cpu, "e3v5")) { disasm_obj.flavour = PROCESSOR_V850E3V5; } } diff --git a/libr/asm/p/asm_vasm.c b/libr/asm/p/asm_vasm.c index d8b0a13d7d..eb908639ca 100644 --- a/libr/asm/p/asm_vasm.c +++ b/libr/asm/p/asm_vasm.c @@ -7,7 +7,7 @@ static int assemble(RAsm *a, RAsmOp *op, const char *buf) { int len = 0; - const char *cpu = a->cpu? a->cpu: "x86"; + const char *cpu = a->config->cpu? a->config->cpu: "x86"; char *cmd = r_str_newf ( "r2pm -r vasm%s_std -Fbin -quiet -o /dev/stdout /dev/stdin <<__\n" ".org 0x%"PFMT64x"\n%s\n__", cpu, a->pc, buf); diff --git a/libr/asm/p/asm_x86_as.c b/libr/asm/p/asm_x86_as.c index e807d22bf5..964328b5a3 100644 --- a/libr/asm/p/asm_x86_as.c +++ b/libr/asm/p/asm_x86_as.c @@ -1,4 +1,4 @@ -/* radare - LGPL - Copyright 2011-2020 pancake */ +/* radare - LGPL - Copyright 2011-2022 pancake */ #include #include "../binutils_as.h" @@ -12,7 +12,7 @@ static int assemble(RAsm *a, RAsmOp *op, const char *buf) { const char *as = ""; #endif const char *syntaxstr = ""; - switch (a->syntax) { + switch (a->config->syntax) { case R_ASM_SYNTAX_INTEL: syntaxstr = ".intel_syntax noprefix\n"; break; @@ -23,7 +23,7 @@ static int assemble(RAsm *a, RAsmOp *op, const char *buf) { char header[4096]; snprintf (header, sizeof (header), "%s.code%i\n", // .org 0x%"PFMT64x"\n" - syntaxstr, a->bits); + syntaxstr, a->config->bits); return binutils_assemble (a, op, buf, as, ASSEMBLER, header, ""); } diff --git a/libr/asm/p/asm_x86_cs.c b/libr/asm/p/asm_x86_cs.c index bc61a366b3..344245d07c 100644 --- a/libr/asm/p/asm_x86_cs.c +++ b/libr/asm/p/asm_x86_cs.c @@ -8,6 +8,7 @@ static R_TH_LOCAL csh cd = 0; static R_TH_LOCAL int n = 0; +static R_TH_LOCAL int omode = 0; static bool the_end(void *p) { #if 0 @@ -29,7 +30,7 @@ static bool the_end(void *p) { #include "asm_x86_vm.c" -static bool check_features(RAsm *a, cs_insn *insn) { +static bool check_features(const char *features, cs_insn *insn) { if (!insn || !insn->detail) { return false; } @@ -49,7 +50,7 @@ static bool check_features(RAsm *a, cs_insn *insn) { if (!name) { return true; } - if (!strstr (a->features, name)) { + if (!strstr (features, name)) { return false; } } @@ -57,28 +58,32 @@ static bool check_features(RAsm *a, cs_insn *insn) { } static int disassemble(RAsm *a, RAsmOp *op, const ut8 *buf, int len) { - static R_TH_LOCAL int omode = 0; - int mode, ret; + //op and buf can be null for aomj + r_return_val_if_fail (a, 0); // && op && buf, 0); + + int ret; ut64 off = a->pc; - mode = (a->bits == 64)? CS_MODE_64: - (a->bits == 32)? CS_MODE_32: - (a->bits == 16)? CS_MODE_16: 0; + const int bits = a->config->bits; + int mode = (bits == 64)? CS_MODE_64: + (bits == 32)? CS_MODE_32: + (bits == 16)? CS_MODE_16: 0; if (cd && mode != omode) { cs_close (&cd); cd = 0; } + omode = mode; if (op) { op->size = 0; } - omode = mode; if (cd == 0) { ret = cs_open (CS_ARCH_X86, mode, &cd); if (ret) { return 0; } } - if (a->features && *a->features) { + const char *features = a->config->features; + if (R_STR_ISNOTEMPTY (features)) { cs_option (cd, CS_OPT_DETAIL, CS_OPT_ON); } else { cs_option (cd, CS_OPT_DETAIL, CS_OPT_OFF); @@ -88,20 +93,27 @@ static int disassemble(RAsm *a, RAsmOp *op, const ut8 *buf, int len) { #if CS_API_MAJOR >= 4 cs_option (cd, CS_OPT_UNSIGNED, CS_OPT_ON); #endif - if (a->syntax == R_ASM_SYNTAX_MASM) { + const int syntax = a->config->syntax; + switch (syntax) { + case R_ASM_SYNTAX_MASM: #if CS_API_MAJOR >= 4 cs_option (cd, CS_OPT_SYNTAX, CS_OPT_SYNTAX_MASM); #endif - } else if (a->syntax == R_ASM_SYNTAX_ATT) { + break; + case R_ASM_SYNTAX_ATT: cs_option (cd, CS_OPT_SYNTAX, CS_OPT_SYNTAX_ATT); - } else { + break; + default: cs_option (cd, CS_OPT_SYNTAX, CS_OPT_SYNTAX_INTEL); + break; } - if (!op) { - return true; + if (op) { + op->size = 1; } - op->size = 1; cs_insn *insn = NULL; + if (!buf) { + len = 0; + } #if USE_ITER_API cs_insn insnack = {0}; cs_detail insnack_detail = {0}; @@ -119,18 +131,22 @@ static int disassemble(RAsm *a, RAsmOp *op, const ut8 *buf, int len) { if (op) { op->size = 0; } - if (a->features && *a->features) { - if (!check_features (a, insn)) { + if (!check_features (features, insn)) { + if (op) { op->size = insn->size; r_asm_op_set_asm (op, "illegal"); } } + // required for aomj to work. which is hacky + if (!op) { + return 0; + } if (op->size == 0 && n > 0 && insn->size > 0) { op->size = insn->size; char *buf_asm = r_str_newf ("%s%s%s", insn->mnemonic, insn->op_str[0]?" ":"", insn->op_str); - if (a->syntax != R_ASM_SYNTAX_MASM) { + if (a->config->syntax != R_ASM_SYNTAX_MASM) { char *ptrstr = strstr (buf_asm, "ptr "); if (ptrstr) { memmove (ptrstr, ptrstr + 4, strlen (ptrstr + 4) + 1); @@ -141,7 +157,7 @@ static int disassemble(RAsm *a, RAsmOp *op, const ut8 *buf, int len) { } else { decompile_vm (a, op, buf, len); } - if (a->syntax == R_ASM_SYNTAX_JZ) { + if (a->config->syntax == R_ASM_SYNTAX_JZ) { char *buf_asm = r_strbuf_get (&op->buf_asm); if (!strncmp (buf_asm, "je ", 3)) { memcpy (buf_asm, "jz", 2); @@ -164,7 +180,7 @@ RAsmPlugin r_asm_plugin_x86_cs = { .desc = "Capstone "CAPSTONE_VERSION_STRING" X86 disassembler", .license = "BSD", .arch = "x86", - .bits = 16|32|64, + .bits = 16 | 32 | 64, .endian = R_SYS_ENDIAN_LITTLE, .fini = the_end, .mnemonics = mnemonics, diff --git a/libr/asm/p/asm_x86_nasm.c b/libr/asm/p/asm_x86_nasm.c index 53516832d0..23f31ba5cf 100644 --- a/libr/asm/p/asm_x86_nasm.c +++ b/libr/asm/p/asm_x86_nasm.c @@ -5,7 +5,7 @@ static int assemble(RAsm *a, RAsmOp *op, const char *buf) { char *ipath, *opath; - if (a->syntax != R_ASM_SYNTAX_INTEL) { + if (a->config->syntax != R_ASM_SYNTAX_INTEL) { eprintf ("asm.x86.nasm does not support non-intel syntax\n"); return -1; } @@ -21,7 +21,7 @@ static int assemble(RAsm *a, RAsmOp *op, const char *buf) { return -1; } - char *asm_buf = r_str_newf ("[BITS %i]\nORG 0x%"PFMT64x"\n%s\n", a->bits, a->pc, buf); + char *asm_buf = r_str_newf ("[BITS %i]\nORG 0x%"PFMT64x"\n%s\n", a->config->bits, a->pc, buf); if (asm_buf) { int slen = strlen (asm_buf); int wlen = write (ifd, asm_buf, slen); diff --git a/libr/asm/p/asm_x86_nz.c b/libr/asm/p/asm_x86_nz.c index 67293eca7b..1f9a299564 100644 --- a/libr/asm/p/asm_x86_nz.c +++ b/libr/asm/p/asm_x86_nz.c @@ -200,7 +200,7 @@ static int process_group_1(RAsm *a, ut8 *data, const Opcode *op) { if (!op->operands[1].is_good_flag) { return -1; } - if (a->bits == 64 && op->operands[0].type & OT_QWORD) { + if (a->config->bits == 64 && op->operands[0].type & OT_QWORD) { data[l++] = 0x48; } if (!strcmp (op->mnemonic, "adc")) { @@ -290,7 +290,7 @@ static int process_group_2(RAsm *a, ut8 *data, const Opcode *op) { int mod_byte = 0; int reg0 = 0; - if (a->bits == 64 && op->operands[0].type & OT_QWORD) { + if (a->config->bits == 64 && op->operands[0].type & OT_QWORD) { data[l++] = 0x48; } @@ -378,13 +378,14 @@ static int process_1byte_op(RAsm *a, ut8 *data, const Opcode *op, int op1) { return l; } - if (a->bits == 64) { + const int bits = a->config->bits; + if (bits == 64) { if (!(op->operands[0].type & op->operands[1].type)) { return -1; } } - if (a->bits == 64 && ((op->operands[0].type & OT_QWORD) | (op->operands[1].type & OT_QWORD))) { + if (bits == 64 && ((op->operands[0].type & OT_QWORD) | (op->operands[1].type & OT_QWORD))) { if (op->operands[0].extended) { rex = 1; } @@ -395,7 +396,7 @@ static int process_1byte_op(RAsm *a, ut8 *data, const Opcode *op, int op1) { } if (op->operands[0].type & OT_MEMORY && op->operands[1].type & OT_REGALL) { - if (a->bits == 64 && (op->operands[0].type & OT_DWORD) + if (bits == 64 && (op->operands[0].type & OT_DWORD) && (op->operands[1].type & OT_DWORD)) { data[l++] = 0x67; } @@ -471,13 +472,12 @@ static int process_1byte_op(RAsm *a, ut8 *data, const Opcode *op, int op1) { } else if (op->operands[0].type & OT_DWORD && op->operands[1].type & OT_DWORD) { data[l++] = op1 + 0x1; } - if (a->bits == 64) { + if (bits == 64) { if (op->operands[0].type & OT_QWORD && op->operands[1].type & OT_QWORD) { data[l++] = op1 + 0x1; } } - mod_byte = 3; reg = op->operands[1].reg; rm = op->operands[0].reg; @@ -493,7 +493,7 @@ static int process_1byte_op(RAsm *a, ut8 *data, const Opcode *op, int op1) { data[l++] = 0x24; } if (offset || mem_ref || ebp_reg) { - //if ((mod_byte > 0 && mod_byte < 3) || mem_ref) { + // if ((mod_byte > 0 && mod_byte < 3) || mem_ref) { data[l++] = offset; if (mod_byte == 2 || mem_ref) { data[l++] = offset >> 8; @@ -588,7 +588,7 @@ static int opxadd(RAsm *a, ut8 *data, const Opcode *op) { if (op->operands_count < 2) { return -1; } - if (a->bits == 64) { + if (a->config->bits == 64) { data[i++] = 0x48; }; data[i++] = 0x0f; @@ -708,7 +708,7 @@ static int opsbb(RAsm *a, ut8 *data, const Opcode *op) { static int opbs(RAsm *a, ut8 *data, const Opcode *op) { int l = 0; - if (a->bits >= 32 && op->operands[1].type & OT_MEMORY && op->operands[1].reg_size & OT_WORD) { + if (a->config->bits >= 32 && op->operands[1].type & OT_MEMORY && op->operands[1].reg_size & OT_WORD) { return -1; } if (!(op->operands[1].type & OT_MEMORY) @@ -717,7 +717,7 @@ static int opbs(RAsm *a, ut8 *data, const Opcode *op) { return -1; } if (op->operands[0].type & OT_GPREG && !(op->operands[0].type & OT_MEMORY)) { - if (a->bits == 64) { + if (a->config->bits == 64) { if (op->operands[1].type & OT_MEMORY && op->operands[1].reg_size & OT_DWORD) { data[l++] = 0x67; } @@ -728,7 +728,7 @@ static int opbs(RAsm *a, ut8 *data, const Opcode *op) { data[l++] = 0x48; } } else if (op->operands[0].type & OT_WORD) { - data[l++] = 0x66; + data[l++] = 0x66; } data[l++] = 0x0f; if (!strcmp (op->mnemonic, "bsf")) { @@ -787,7 +787,7 @@ static int opcall(RAsm *a, ut8 *data, const Opcode *op) { if (op->operands[0].reg == X86R_UNDEFINED) { return -1; } - if (a->bits == 64 && op->operands[0].extended) { + if (a->config->bits == 64 && op->operands[0].extended) { data[l++] = 0x41; } data[l++] = 0xff; @@ -1037,10 +1037,10 @@ static int opdec(RAsm *a, ut8 *data, const Opcode *op) { if (use_rex) { data[l++] = rex; } - if (a->bits > 32 || size & OT_BYTE) { + if (a->config->bits > 32 || size & OT_BYTE) { data[l++] = opcode; } - if (a->bits == 32 && size & (OT_DWORD | OT_WORD)) { + if (a->config->bits == 32 && size & (OT_DWORD | OT_WORD)) { data[l++] = 0x48 | op->operands[0].reg; } else { data[l++] = 0xc8 | op->operands[0].reg; @@ -1248,7 +1248,7 @@ static int opimul(RAsm *a, ut8 *data, const Opcode *op) { data[l++] = immediate >> 16; data[l++] = immediate >> 24; } - if (a->bits == 64 && immediate > UT32_MAX) { + if (a->config->bits == 64 && immediate > UT32_MAX) { data[l++] = immediate >> 32; data[l++] = immediate >> 40; data[l++] = immediate >> 48; @@ -1452,10 +1452,10 @@ static int opinc(RAsm *a, ut8 *data, const Opcode *op) { if (use_rex) { data[l++] = rex; } - if (a->bits > 32 || size & OT_BYTE) { + if (a->config->bits > 32 || size & OT_BYTE) { data[l++] = opcode; } - if (a->bits == 32 && size & (OT_DWORD | OT_WORD)) { + if (a->config->bits == 32 && size & (OT_DWORD | OT_WORD)) { data[l++] = 0x40 | op->operands[0].reg; } else { data[l++] = 0xc0 | op->operands[0].reg; @@ -1630,7 +1630,7 @@ static int opjc(RAsm *a, ut8 *data, const Opcode *op) { if (immediate <= 0x81 && immediate > -0x7f) { is_short = true; } - if (a->bits == 16 && (immediate > 0x81 || immediate < -0x7e)) { + if (a->config->bits == 16 && (immediate > 0x81 || immediate < -0x7e)) { data[l++] = 0x66; is_short = false; immediate --; @@ -1711,7 +1711,7 @@ static int oplea(RAsm *a, ut8 *data, const Opcode *op){ int reg = 0; int rm = 0; if (op->operands[0].type & OT_REGALL && op->operands[1].type & (OT_MEMORY | OT_CONSTANT)) { - if (a->bits == 64) { + if (a->config->bits == 64) { data[l++] = 0x48; } data[l++] = 0x8d; @@ -1812,6 +1812,7 @@ static int opmov(RAsm *a, ut8 *data, const Opcode *op) { int base = 0; int rex = 0; ut64 immediate = 0; + const int bits = a->config->bits; if (op->operands[1].type & OT_CONSTANT) { if (!op->operands[1].is_good_flag) { return -1; @@ -1819,7 +1820,7 @@ static int opmov(RAsm *a, ut8 *data, const Opcode *op) { if (op->operands[1].immediate == -1 && a->num && a->num->nc.errors > 0) { return -1; } - if (immediate_out_of_range (a->bits, op->operands[1].immediate)) { + if (immediate_out_of_range (bits, op->operands[1].immediate)) { return -1; } immediate = op->operands[1].immediate * op->operands[1].sign; @@ -1830,7 +1831,7 @@ static int opmov(RAsm *a, ut8 *data, const Opcode *op) { return -1; } bool imm32in64 = false; - if (a->bits == 64 && (op->operands[0].type & OT_QWORD)) { + if (bits == 64 && (op->operands[0].type & OT_QWORD)) { if (op->operands[0].extended) { data[l++] = 0x49; } else { @@ -1840,7 +1841,7 @@ static int opmov(RAsm *a, ut8 *data, const Opcode *op) { data[l++] = 0x41; } if (op->operands[0].type & OT_WORD) { - if (a->bits > 16) { + if (bits > 16) { data[l++] = 0x66; } } @@ -1848,7 +1849,7 @@ static int opmov(RAsm *a, ut8 *data, const Opcode *op) { data[l++] = 0xb0 | op->operands[0].reg; data[l++] = immediate; } else { - if (a->bits == 64 && (op->operands[0].type & OT_QWORD) + if (bits == 64 && (op->operands[0].type & OT_QWORD) && (immediate <= ST32_MAX || immediate >= 0xffffffff80000000ULL /* -0x80000000 */)) { data[l++] = 0xc7; @@ -1863,7 +1864,7 @@ static int opmov(RAsm *a, ut8 *data, const Opcode *op) { data[l++] = immediate >> 16; data[l++] = immediate >> 24; } - if (a->bits == 64 && (((op->operands[0].type & OT_QWORD) && !imm32in64) + if (bits == 64 && (((op->operands[0].type & OT_QWORD) && !imm32in64) || (immediate > UT32_MAX && immediate < 0xffffffff80000000ULL /* -0x80000000 */))) { data[l++] = immediate >> 32; @@ -1887,7 +1888,7 @@ static int opmov(RAsm *a, ut8 *data, const Opcode *op) { //addr_size_override prefix bool use_aso = false; - if (reg_bits < a->bits) { + if (reg_bits < bits) { use_aso = true; } @@ -2044,7 +2045,7 @@ static int opmov(RAsm *a, ut8 *data, const Opcode *op) { } } - if (a->bits == 64) { + if (bits == 64) { if (op->operands[0].extended) { rex = 1; } @@ -2157,7 +2158,7 @@ static int opmov(RAsm *a, ut8 *data, const Opcode *op) { if (op->operands[0].reg == X86R_EAX && op->operands[1].regs[0] == X86R_UNDEFINED) { if (op->operands[0].type & OT_QWORD) { data[l++] = 0x48; - } else if (op->operands[0].type & OT_WORD && a->bits != 16) { + } else if (op->operands[0].type & OT_WORD && bits != 16) { data[l++] = 0x66; } if (op->operands[0].type & OT_BYTE) { @@ -2167,10 +2168,10 @@ static int opmov(RAsm *a, ut8 *data, const Opcode *op) { } data[l++] = offset; data[l++] = offset >> 8; - if (a->bits >= 32) { + if (bits >= 32) { data[l++] = offset >> 16; data[l++] = offset >> 24; - if (a->bits == 64) { + if (bits == 64) { data[l++] = offset >> 32; data[l++] = offset >> 40; data[l++] = offset >> 48; @@ -2180,7 +2181,7 @@ static int opmov(RAsm *a, ut8 *data, const Opcode *op) { return l; } - if (op->operands[0].type & OT_BYTE && a->bits == 64 && op->operands[1].regs[0]) { + if (op->operands[0].type & OT_BYTE && bits == 64 && op->operands[1].regs[0]) { if (op->operands[1].regs[0] >= X86R_R8 && op->operands[0].reg < 4) { data[l++] = 0x41; data[l++] = 0x8a; @@ -2204,7 +2205,7 @@ static int opmov(RAsm *a, ut8 *data, const Opcode *op) { return l; } - if (a->bits == 64) { + if (bits == 64) { if (op->operands[0].type & OT_QWORD) { if (!(op->operands[1].type & OT_QWORD)) { if (op->operands[1].regs[0] != -1) { @@ -2233,7 +2234,7 @@ static int opmov(RAsm *a, ut8 *data, const Opcode *op) { } if (op->operands[1].regs[0] == X86R_UNDEFINED) { - if (a->bits == 64) { + if (bits == 64) { data[l++] = op->operands[0].reg << 3 | 0x4; data[l++] = 0x25; } else { @@ -2275,7 +2276,7 @@ static int opmov(RAsm *a, ut8 *data, const Opcode *op) { mod = 0x4; } } - if (a->bits == 64 && offset && op->operands[0].type & OT_QWORD) { + if (bits == 64 && offset && op->operands[0].type & OT_QWORD) { if (op->operands[1].regs[0] == X86R_RIP) { data[l++] = 0x5; } else { @@ -2304,7 +2305,7 @@ static int opmov(RAsm *a, ut8 *data, const Opcode *op) { data[l++] = offset >> 16; data[l++] = offset >> 24; } - } else if (a->bits == 64 && (offset || op->operands[1].regs[0] == X86R_RIP)) { + } else if (bits == 64 && (offset || op->operands[1].regs[0] == X86R_RIP)) { data[l++] = offset; if (op->operands[1].offset > 127 || op->operands[1].regs[0] == X86R_RIP) { data[l++] = offset >> 8; @@ -2319,7 +2320,7 @@ static int opmov(RAsm *a, ut8 *data, const Opcode *op) { // Only for MOV r64, imm64 static int opmovabs(RAsm *a, ut8 *data, const Opcode *op) { - if (!(a->bits == 64 && (op->operands[0].type & OT_GPREG) && !(op->operands[0].type & OT_MEMORY) + if (!(a->config->bits == 64 && (op->operands[0].type & OT_GPREG) && !(op->operands[0].type & OT_MEMORY) && (op->operands[0].type & OT_QWORD) && (op->operands[1].type & OT_CONSTANT))) { return -1; } @@ -2387,7 +2388,7 @@ static int oppop(RAsm *a, ut8 *data, const Opcode *op) { } data[l++] = base + (8 * op->operands[0].reg); } else { - if (op->operands[0].extended && a->bits == 64) { + if (op->operands[0].extended && a->config->bits == 64) { data[l++] = 0x41; } ut8 base = 0x58; @@ -2440,7 +2441,7 @@ static int oppush(RAsm *a, ut8 *data, const Opcode *op) { } data[l++] = base + (8 * op->operands[0].reg); } else { - if (op->operands[0].extended && a->bits == 64) { + if (op->operands[0].extended && a->config->bits == 64) { data[l++] = 0x41; } ut8 base = 0x50; @@ -2476,7 +2477,7 @@ static int oppush(RAsm *a, ut8 *data, const Opcode *op) { } } } else { - if (immediate_out_of_range (a->bits, op->operands[0].immediate)) { + if (immediate_out_of_range (a->config->bits, op->operands[0].immediate)) { return -1; } immediate = op->operands[0].immediate * op->operands[0].sign; @@ -2549,7 +2550,7 @@ static int oploop(RAsm *a, ut8 *data, const Opcode *op) { static int opret(RAsm *a, ut8 *data, const Opcode *op) { int l = 0; int immediate = 0; - if (a->bits == 16) { + if (a->config->bits == 16) { data[l++] = 0xc3; return l; } @@ -2665,7 +2666,7 @@ static int optest(RAsm *a, ut8 *data, const Opcode *op) { eprintf ("Error: Invalid operands\n"); return -1; } - if (a->bits == 64) { + if (a->config->bits == 64) { if (op->operands[0].type & OT_MEMORY && op->operands[0].reg_size & OT_DWORD) { data[l++] = 0x67; @@ -2684,7 +2685,7 @@ static int optest(RAsm *a, ut8 *data, const Opcode *op) { if (op->operands[0].type & OT_BYTE) { data[l++] = 0xf6; } else { - if (op->operands[0].type & OT_WORD && a->bits != 16) { + if (op->operands[0].type & OT_WORD && a->config->bits != 16) { data[l++] = 0x66; } data[l++] = 0xf7; @@ -2827,7 +2828,7 @@ static int opxchg(RAsm *a, ut8 *data, const Opcode *op) { static int opcdqe(RAsm *a, ut8 *data, const Opcode *op) { is_valid_registers (op); int l = 0; - if (a->bits == 64) { + if (a->config->bits == 64) { data[l++] = 0x48; } data[l++] = 0x98; @@ -4056,7 +4057,7 @@ static int opsldt(RAsm *a, ut8 *data, const Opcode *op) { int l = 0; switch (op->operands_count) { case 1: - if (a->bits == 64) { + if (a->config->bits == 64) { data[l++] = 0x48; } data[l++] = 0x0f; @@ -4077,7 +4078,7 @@ static int opsmsw(RAsm *a, ut8 *data, const Opcode *op) { int l = 0; switch (op->operands_count) { case 1: - if (a->bits == 64) { + if (a->config->bits == 64) { data[l++] = 0x48; } data[l++] = 0x0f; @@ -4745,22 +4746,22 @@ static Register parseReg(RAsm *a, const char *str, size_t *pos, ut32 *type) { for (i = 0; regs64[i]; i++) { if (!r_str_ncasecmp (regs64[i], token, length)) { *type = (OT_GPREG & OT_REG (i)) | OT_QWORD; - a->bits = 64; + a->config->bits = 64; return i; } } for (i = 0; regs64ext[i]; i++) { if (!r_str_ncasecmp (regs64ext[i], token, length)) { *type = (OT_GPREG & OT_REG (i)) | OT_QWORD; - a->bits = 64; + a->config->bits = 64; return i + 9; } } for (i = 0; regsext[i]; i++) { if (!r_str_ncasecmp (regsext[i], token, length)) { *type = (OT_GPREG & OT_REG (i)) | OT_DWORD; - if (a->bits < 32) { - a->bits = 32; + if (a->config->bits < 32) { + a->config->bits = 32; } return i + 9; } @@ -4787,7 +4788,7 @@ static Register parseReg(RAsm *a, const char *str, size_t *pos, ut32 *type) { *pos = nextpos; } // read number - // const int maxreg = (a->bits == 64) ? 15 : 7; + // const int maxreg = (a->config->bits == 64) ? 15 : 7; if (getToken (token, pos, &nextpos) != TT_NUMBER) { eprintf ("Expected register number '%s'\n", str + *pos); return X86R_UNDEFINED; @@ -5128,7 +5129,7 @@ static int oprep(RAsm *a, ut8 *data, const Opcode *op) { for (lt_ptr = oplookup; strcmp (lt_ptr->mnemonic, "null"); lt_ptr++) { if (!r_str_casecmp (instr.mnemonic, lt_ptr->mnemonic)) { if (lt_ptr->opcode > 0) { - if (lt_ptr->only_x32 && a->bits == 64) { + if (lt_ptr->only_x32 && a->config->bits == 64) { free (instr.mnemonic); return -1; } @@ -5178,7 +5179,7 @@ static int assemble(RAsm *a, RAsmOp *ao, const char *str) { for (lt_ptr = oplookup; strcmp (lt_ptr->mnemonic, "null"); lt_ptr++) { if (!r_str_casecmp (instr.mnemonic, lt_ptr->mnemonic)) { if (lt_ptr->opcode > 0) { - if (!lt_ptr->only_x32 || a->bits != 64) { + if (!lt_ptr->only_x32 || a->config->bits != 64) { ut64 opcode = lt_ptr->opcode; int i = lt_ptr->size - 1; for (; i >= 0; i--) { diff --git a/libr/asm/p/asm_x86_vm.c b/libr/asm/p/asm_x86_vm.c index 17045bbafd..cf65eecb3e 100644 --- a/libr/asm/p/asm_x86_vm.c +++ b/libr/asm/p/asm_x86_vm.c @@ -31,7 +31,7 @@ void decompile_vm(RAsm *a, RAsmOp *op, const ut8 *buf, int len) { r_strf_buffer (64); const char *buf_asm = "invalid"; if (len > 3 && buf[0] == 0x0F && buf[1] == 0x3F && (VPCEXT2 (buf, 0x01) || VPCEXT2 (buf, 0x05) || VPCEXT2 (buf, 0x07) || VPCEXT2 (buf, 0x0D) || VPCEXT2 (buf, 0x10))) { - if (a->syntax == R_ASM_SYNTAX_ATT) { + if (a->config->syntax == R_ASM_SYNTAX_ATT) { buf_asm = r_strf ("vpcext $0x%x, $0x%x", buf[3], buf[2]); } else { buf_asm = r_strf ("vpcext %xh, %xh", buf[2], buf[3]); diff --git a/libr/asm/p/asm_xcore_cs.c b/libr/asm/p/asm_xcore_cs.c index 059a7bd2b6..1e7b3ab443 100644 --- a/libr/asm/p/asm_xcore_cs.c +++ b/libr/asm/p/asm_xcore_cs.c @@ -8,7 +8,7 @@ static int disassemble(RAsm *a, RAsmOp *op, const ut8 *buf, int len) { csh handle; cs_insn* insn; int mode, n, ret = -1; - mode = a->big_endian? CS_MODE_BIG_ENDIAN: CS_MODE_LITTLE_ENDIAN; + mode = a->config->big_endian? CS_MODE_BIG_ENDIAN: CS_MODE_LITTLE_ENDIAN; memset (op, 0, sizeof (RAsmOp)); op->size = 4; ret = cs_open (CS_ARCH_XCORE, mode, &handle); diff --git a/libr/asm/p/asm_xtensa.c b/libr/asm/p/asm_xtensa.c index a315ee8376..9ba5bedb0d 100644 --- a/libr/asm/p/asm_xtensa.c +++ b/libr/asm/p/asm_xtensa.c @@ -47,14 +47,14 @@ static int disassemble(RAsm *a, RAsmOp *op, const ut8 *buf, int len) { /* prepare disassembler */ memset (&disasm_obj, '\0', sizeof (struct disassemble_info)); - disasm_obj.disassembler_options=(a->bits==64)?"64":""; + disasm_obj.disassembler_options = (a->config->bits == 64)?"64":""; disasm_obj.buffer = bytes; disasm_obj.buffer_length = len; disasm_obj.read_memory_func = &xtensa_buffer_read_memory; disasm_obj.symbol_at_address_func = &symbol_at_address; disasm_obj.memory_error_func = &memory_error_func; disasm_obj.print_address_func = &generic_print_address_func; - disasm_obj.endian = !a->big_endian; + disasm_obj.endian = !a->config->big_endian; disasm_obj.fprintf_func = &generic_fprintf_func; disasm_obj.stream = stdout; diff --git a/libr/asm/p/cs_mnemonics.c b/libr/asm/p/cs_mnemonics.c index 0becb5221b..6bdbd86d7e 100644 --- a/libr/asm/p/cs_mnemonics.c +++ b/libr/asm/p/cs_mnemonics.c @@ -8,28 +8,28 @@ static char *mnemonics(RAsm *a, int id, bool json) { } return name? strdup (name): NULL; } - RStrBuf *buf = r_strbuf_new (""); + PJ *pj = NULL; + RStrBuf *buf = NULL; if (json) { - r_strbuf_append (buf, "["); + pj = pj_new (); + pj_a (pj); + } else { + r_strbuf_new (""); } for (i = 1; ; i++) { const char *op = cs_insn_name (cd, i); if (!op) { break; } - if (json) { - r_strbuf_append (buf, "\""); - } - r_strbuf_append (buf, op); - if (json) { - if (cs_insn_name (cd, i + 1)) { - r_strbuf_append (buf, "\","); - } else { - r_strbuf_append (buf, "\"]\n"); - } + if (pj) { + pj_s (pj, op); } else { + r_strbuf_append (buf, op); r_strbuf_append (buf, "\n"); } } - return r_strbuf_drain (buf); + if (pj) { + pj_end (pj); + } + return pj? pj_drain (pj): r_strbuf_drain (buf); } diff --git a/libr/core/anal_objc.c b/libr/core/anal_objc.c index fc0ac93347..ef03cb86a5 100644 --- a/libr/core/anal_objc.c +++ b/libr/core/anal_objc.c @@ -194,7 +194,7 @@ static RCoreObjc *core_objc_new(RCore *core) { if (!o->file_size) { o->file_size = 512*1024*1024; } - o->word_size = (core->rasm->bits == 64)? 8: 4; + o->word_size = (core->rasm->config->bits == 64)? 8: 4; if (o->word_size != 8) { eprintf ("Warning: aao experimental on 32bit binaries\n"); } diff --git a/libr/core/canal.c b/libr/core/canal.c index d7933ffe63..fa32743479 100644 --- a/libr/core/canal.c +++ b/libr/core/canal.c @@ -3841,7 +3841,7 @@ R_API int r_core_anal_search(RCore *core, ut64 from, ut64 to, ut64 ref, int mode ut64 at; char bckwrds, do_bckwrd_srch; int arch = -1; - if (core->rasm->bits == 64) { + if (core->rasm->config->bits == 64) { // speedup search if (!strncmp (core->rasm->cur->name, "arm", 3)) { arch = R2_ARCH_ARM64; @@ -4313,7 +4313,7 @@ R_API int r_core_anal_data(RCore *core, ut64 addr, int count, int depth, int wor ut64 dstaddr = 0LL; ut8 *buf = core->block; int len = core->blocksize; - int word = wordsize ? wordsize: core->rasm->bits / 8; + int word = wordsize ? wordsize: core->rasm->config->bits / 8; char *str; int i, j; @@ -4922,7 +4922,7 @@ static bool esilbreak_reg_write(RAnalEsil *esil, const char *name, ut64 *val) { } } } - if (core->rasm->bits == 32 && strstr (core->rasm->cur->name, "arm")) { + if (core->rasm->config->bits == 32 && strstr (core->rasm->cur->name, "arm")) { if ((!(at & 1)) && r_io_is_valid_offset (anal->iob.io, at, 0)) { // !core->anal->opt.noncode)) { add_string_ref (anal->coreb.core, esil->address, at); } diff --git a/libr/core/cbin.c b/libr/core/cbin.c index d7080a51a1..5f01dcd78a 100644 --- a/libr/core/cbin.c +++ b/libr/core/cbin.c @@ -722,7 +722,7 @@ static void load_types_from(RCore *core, const char *fmt, ...) { R_API void r_core_anal_type_init(RCore *core) { r_return_if_fail (core && core->anal); - int bits = core->rasm->bits; + int bits = core->rasm->config->bits; Sdb *types = core->anal->sdb_types; // make sure they are empty this is initializing sdb_reset (types); @@ -4358,7 +4358,7 @@ R_API bool r_core_bin_update_arch_bits(RCore *r) { return 0; } if (r->rasm) { - bits = r->rasm->bits; + bits = r->rasm->config->bits; if (r->rasm->cur) { arch = r->rasm->cur->arch; } diff --git a/libr/core/cconfig.c b/libr/core/cconfig.c index 7852ef3398..aef3af8f3f 100644 --- a/libr/core/cconfig.c +++ b/libr/core/cconfig.c @@ -797,7 +797,7 @@ static bool cb_asmarch(void *user, void *data) { } //if (!strcmp (node->value, "bf")) // r_config_set (core->config, "dbg.backend", "bf"); - __setsegoff (core->config, node->value, core->rasm->bits); + __setsegoff (core->config, node->value, core->rasm->config->bits); // set a default endianness int bigbin = r_bin_is_big_endian (core->bin); @@ -867,7 +867,7 @@ static bool cb_asmbits(void *user, void *data) { if (!bits) { return false; } - if (bits == core->rasm->bits && bits == core->anal->bits && bits == core->dbg->bits) { + if (bits == core->rasm->config->bits && bits == core->anal->bits && bits == core->dbg->bits) { // early optimization return true; } @@ -963,9 +963,9 @@ static bool cb_asmfeatures(void *user, void *data) { print_node_options (node); return 0; } - R_FREE (core->rasm->features); + R_FREE (core->rasm->config->features); if (node->value[0]) { - core->rasm->features = strdup (node->value); + core->rasm->config->features = strdup (node->value); } return 1; } @@ -1046,7 +1046,7 @@ static bool cb_asm_armimm(void *user, void *data) { static bool cb_asm_invhex(void *user, void *data) { RCore *core = (RCore *) user; RConfigNode *node = (RConfigNode *) data; - core->rasm->invhex = node->i_value; + core->rasm->config->invhex = node->i_value; return true; } @@ -1057,7 +1057,7 @@ static bool cb_asm_pcalign(void *user, void *data) { if (align < 0) { align = 0; } - core->rasm->pcalign = align; + core->rasm->config->pcalign = align; core->anal->pcalign = align; return true; } @@ -2647,7 +2647,7 @@ static bool cb_segoff(void *user, void *data) { static bool cb_seggrn(void *user, void *data) { RCore *core = (RCore *) user; RConfigNode *node = (RConfigNode *) data; - core->rasm->seggrn = node->i_value; + core->rasm->config->seggrn = node->i_value; core->anal->seggrn = node->i_value; core->print->seggrn = node->i_value; return true; diff --git a/libr/core/cfile.c b/libr/core/cfile.c index ce2566b081..d657f8958f 100644 --- a/libr/core/cfile.c +++ b/libr/core/cfile.c @@ -255,7 +255,7 @@ R_API char *r_core_sysenv_begin(RCore *core, const char *cmd) { } r_sys_setenv ("R2_OFFSET", r_strf ("%"PFMT64d, core->offset)); r_sys_setenv ("R2_XOFFSET", r_strf ("0x%08"PFMT64x, core->offset)); - r_sys_setenv ("R2_ENDIAN", core->rasm->big_endian? "big": "little"); + r_sys_setenv ("R2_ENDIAN", core->rasm->config->big_endian? "big": "little"); r_sys_setenv ("R2_BSIZE", r_strf ("%d", core->blocksize)); #if 0 // dump current config file so other r2 tools can use the same options @@ -450,7 +450,7 @@ static int r_core_file_do_load_for_io_plugin(RCore *r, ut64 baseaddr, ut64 loada if (!info) { return false; } - info->bits = r->rasm->bits; + info->bits = r->rasm->config->bits; // set use of raw strings r_core_bin_set_arch_bits (r, binfile->file, info->arch, info->bits); // r_config_set_i (r->config, "io.va", false); @@ -860,7 +860,7 @@ R_API RIODesc *r_core_file_open(RCore *r, const char *file, int flags, ut64 load if (!flags) { flags = R_PERM_R; } - r->io->bits = r->rasm->bits; // TODO: we need an api for this + r->io->bits = r->rasm->config->bits; // TODO: we need an api for this RIODesc *fd = r_io_open_nomap (r->io, file, flags, 0644); if (r_cons_is_breaked()) { goto beach; diff --git a/libr/core/cmd_anal.c b/libr/core/cmd_anal.c index 786cf51f9a..eb908f56dc 100644 --- a/libr/core/cmd_anal.c +++ b/libr/core/cmd_anal.c @@ -2029,7 +2029,7 @@ R_API char *cmd_syscall_dostr(RCore *core, st64 n, ut64 addr) { // XXX this is a hack to make syscall args work on x86-32 and x86-64 // we need to shift sn first.. which is bad, but needs to be redesigned int regidx = i; - if (core->rasm->bits == 32 && core->rasm->cur && !strcmp (core->rasm->cur->arch, "x86")) { + if (core->rasm->config->bits == 32 && core->rasm->cur && !strcmp (core->rasm->cur->arch, "x86")) { regidx++; } ut64 arg = r_debug_arg_get (core->dbg, cc, regidx); @@ -8062,7 +8062,7 @@ static void _anal_calls(RCore *core, ut64 addr, ut64 addr_end, bool printCommand setBits = hint->bits; } r_anal_hint_free (hint); - if (setBits != core->rasm->bits) { + if (setBits != core->rasm->config->bits) { r_config_set_i (core->config, "asm.bits", setBits); } if (r_anal_op (core->anal, &op, addr, buf + bufi, bsz - bufi, 0) > 0) { @@ -10778,7 +10778,7 @@ static void cmd_anal_aad(RCore *core, const char *input) { static bool archIsThumbable(RCore *core) { RAsm *as = core ? core->rasm : NULL; - if (as && as->cur && as->bits <= 32 && as->cur->name) { + if (as && as->cur && as->config->bits <= 32 && as->cur->name) { return strstr (as->cur->name, "arm"); } return false; @@ -10867,7 +10867,7 @@ static void cmd_anal_aav(RCore *core, const char *input) { r_print_rowlog_done (core->print, oldstr); int vsize = 4; // 32bit dword - if (core->rasm->bits == 64) { + if (core->rasm->config->bits == 64) { vsize = 8; } @@ -11282,7 +11282,7 @@ static int cmd_anal_all(RCore *core, const char *input) { if (r_cons_is_breaked ()) { goto jacuzzi; } - bool isPreludableArch = core->rasm->bits == 64 && r_str_startswith (r_config_get (core->config, "asm.arch"), "arm"); + bool isPreludableArch = core->rasm->config->bits == 64 && r_str_startswith (r_config_get (core->config, "asm.arch"), "arm"); if (!didAap && isPreludableArch) { didAap = true; @@ -11546,7 +11546,7 @@ static bool anal_fcn_data_gaps(RCore *core, const char *input) { ut64 end = UT64_MAX; RAnalFunction *fcn; RListIter *iter; - int i, wordsize = (core->rasm->bits == 64)? 8: 4; + int i, wordsize = (core->rasm->config->bits == 64)? 8: 4; r_list_sort (core->anal->fcns, cmpaddr); r_list_foreach (core->anal->fcns, iter, fcn) { if (end != UT64_MAX) { diff --git a/libr/core/cmd_debug.c b/libr/core/cmd_debug.c index 1e455b3ce1..0f2103393e 100644 --- a/libr/core/cmd_debug.c +++ b/libr/core/cmd_debug.c @@ -1227,7 +1227,7 @@ static int grab_bits(RCore *core, const char *arg, int *pcbits2) { const char *pcname = r_reg_get_name (core->anal->reg, R_REG_NAME_PC); RRegItem *reg = r_reg_get (core->anal->reg, pcname, 0); if (reg) { - if (core->rasm->bits != reg->size) + if (core->rasm->config->bits != reg->size) pcbits = reg->size; } } @@ -1417,7 +1417,7 @@ static int r_debug_heap(RCore *core, const char *input) { const char *m = r_config_get (core->config, "dbg.malloc"); if (m && !strcmp ("glibc", m)) { #if __linux__ && __GNU_LIBRARY__ && __GLIBC__ && __GLIBC_MINOR__ - if (core->rasm->bits == 64) { + if (core->rasm->config->bits == 64) { cmd_dbg_map_heap_glibc_64 (core, input + 1); } else { cmd_dbg_map_heap_glibc_32 (core, input + 1); @@ -1427,7 +1427,7 @@ static int r_debug_heap(RCore *core, const char *input) { #endif #if HAVE_JEMALLOC } else if (m && !strcmp ("jemalloc", m)) { - if (core->rasm->bits == 64) { + if (core->rasm->config->bits == 64) { cmd_dbg_map_jemalloc_64 (core, input + 1); } else { cmd_dbg_map_jemalloc_32 (core, input + 1); @@ -1907,7 +1907,7 @@ R_API void r_core_debug_ri(RCore *core, RReg *reg, int mode) { HtUP *db = ht_up_new0 (); r_list_foreach (list, iter, r) { - if (r->size != core->rasm->bits) { + if (r->size != core->rasm->config->bits) { continue; } ut64 value = r_reg_get_value (reg, r); @@ -1960,7 +1960,7 @@ R_API void r_core_debug_rr(RCore *core, RReg *reg, int mode) { bool use_colors = had_colors != 0; int delta = 0; ut64 diff, value; - int bits = core->rasm->bits; + int bits = core->rasm->config->bits; //XXX: support other RRegisterType RList *list = r_reg_get_list (reg, R_REG_TYPE_GPR); RListIter *iter; @@ -2497,7 +2497,7 @@ static void cmd_debug_reg(RCore *core, const char *str) { r_print_hexdump (core->print, 0ll, buf, len, 64, 8, 1); break; default: - if (core->rasm->bits == 64) { + if (core->rasm->config->bits == 64) { r_print_hexdump (core->print, 0ll, buf, len, 64, 8, 1); } else { r_print_hexdump (core->print, 0ll, buf, len, 32, 4, 1); @@ -3001,7 +3001,7 @@ static void cmd_debug_reg(RCore *core, const char *str) { const char *pcname = r_reg_get_name (core->anal->reg, R_REG_NAME_PC); RRegItem *reg = r_reg_get (core->anal->reg, pcname, 0); if (reg) { - if (core->rasm->bits != reg->size) { + if (core->rasm->config->bits != reg->size) { pcbits = reg->size; } } diff --git a/libr/core/cmd_egg.c b/libr/core/cmd_egg.c index 63ac0c02f3..fc038ced26 100644 --- a/libr/core/cmd_egg.c +++ b/libr/core/cmd_egg.c @@ -133,7 +133,7 @@ static int cmd_egg(void *data, const char *input) { char *oa, *p; r_egg_setup (egg, r_config_get (core->config, "asm.arch"), - core->rasm->bits, 0, + core->rasm->config->bits, 0, r_config_get (core->config, "asm.os")); // XXX switch (*input) { case 's': // "gs" diff --git a/libr/core/cmd_open.c b/libr/core/cmd_open.c index cd11c7a7ee..c0cf7170b1 100644 --- a/libr/core/cmd_open.c +++ b/libr/core/cmd_open.c @@ -1319,7 +1319,7 @@ R_API void r_core_file_reopen_remote_debug(RCore *core, char *uri, ut64 addr) { RList *old_sections = __save_old_sections (core); ut64 old_base = core->bin->cur->o->baddr_shift; - int bits = core->rasm->bits; + int bits = core->rasm->config->bits; r_config_set_i (core->config, "asm.bits", bits); r_config_set_b (core->config, "cfg.debug", true); // Set referer as the original uri so we could return to it with `oo` @@ -1389,7 +1389,7 @@ R_API void r_core_file_reopen_debug(RCore *core, const char *args) { RList *old_sections = __save_old_sections (core); ut64 old_base = core->bin->cur->o->baddr_shift; - int bits = core->rasm->bits; + int bits = core->rasm->config->bits; char *bin_abspath = r_file_abspath (binpath); if (strstr (bin_abspath, "://")) { free (bin_abspath); diff --git a/libr/core/cmd_print.c b/libr/core/cmd_print.c index eec90205fc..e9f168ac09 100644 --- a/libr/core/cmd_print.c +++ b/libr/core/cmd_print.c @@ -3200,7 +3200,7 @@ static void cmd_print_pv(RCore *core, const char *input, bool useBytes) { int blocksize = core->blocksize; ut8 *heaped_block = NULL; ut8 *block_end = core->block + blocksize; - int i, n = core->rasm->bits / 8; + int i, n = core->rasm->config->bits / 8; int type = 'v'; bool fixed_size = true; switch (input[0]) { @@ -3420,14 +3420,14 @@ static void cmd_print_pv(RCore *core, const char *input, bool useBytes) { break; default: v = r_read_ble64 (block, core->print->big_endian); - switch (core->rasm->bits / 8) { + switch (core->rasm->config->bits / 8) { case 1: r_cons_printf ("0x%02" PFMT64x "\n", v & UT8_MAX); break; case 2: r_cons_printf ("0x%04" PFMT64x "\n", v & UT16_MAX); break; case 4: r_cons_printf ("0x%08" PFMT64x "\n", v & UT32_MAX); break; case 8: r_cons_printf ("0x%016" PFMT64x "\n", v & UT64_MAX); break; default: break; } - block += core->rasm->bits / 8; + block += core->rasm->config->bits / 8; break; } } while (repeat > 0); @@ -4554,14 +4554,14 @@ static void disasm_ropchain(RCore *core, ut64 addr, char type_print) { (void)r_io_read_at (core->io, addr, buf, core->blocksize); while (p + 4 < core->blocksize) { const bool be = core->print->big_endian; - if (core->rasm->bits == 64) { + if (core->rasm->config->bits == 64) { n = r_read_ble64 (buf + p, be); } else { n = r_read_ble32 (buf + p, be); } r_cons_printf ("[0x%08"PFMT64x"] 0x%08"PFMT64x"\n", addr + p, n); disasm_until_optype (core, n, type_print, R_ANAL_OP_TYPE_RET, 1024); - if (core->rasm->bits == 64) { + if (core->rasm->config->bits == 64) { p += 8; } else { p += 4; @@ -4934,7 +4934,7 @@ static void cmd_pxr(RCore *core, int len, int mode, int wordsize, const char *ar } } else { const int ocols = core->print->cols; - int bitsize = core->rasm->bits; + int bitsize = core->rasm->config->bits; /* Thumb is 16bit arm but handles 32bit data */ if (bitsize == 16) { bitsize = 32; diff --git a/libr/core/cmd_search.c b/libr/core/cmd_search.c index 3dffcccafc..bf89d423c5 100644 --- a/libr/core/cmd_search.c +++ b/libr/core/cmd_search.c @@ -4336,7 +4336,7 @@ reread: int ochunksize; int i, len, chunksize = r_config_get_i (core->config, "search.chunk"); if (chunksize < 1) { - chunksize = core->rasm->bits / 8; + chunksize = core->rasm->config->bits / 8; } len = r_str_unescape (str); ochunksize = chunksize = R_MIN (len, chunksize); diff --git a/libr/core/core.c b/libr/core/core.c index d5a1342497..9a808ca201 100644 --- a/libr/core/core.c +++ b/libr/core/core.c @@ -560,7 +560,7 @@ static ut64 num_callback(RNum *userptr, const char *str, int *ok) { case '[': { ut64 n = 0LL; - int refsz = core->rasm->bits / 8; + int refsz = core->rasm->config->bits / 8; const char *p = NULL; if (strlen (str) > 5) { p = strchr (str + 5, ':'); @@ -2297,7 +2297,7 @@ static char *getvalue(ut64 value, int bits) { * no json support */ R_API char *r_core_anal_hasrefs_to_depth(RCore *core, ut64 value, PJ *pj, int depth) { - const int bits = core->rasm->bits; + const int bits = core->rasm->config->bits; r_return_val_if_fail (core, NULL); RStrBuf *s = r_strbuf_new (NULL); if (pj) { @@ -3985,7 +3985,7 @@ R_API RBuffer *r_core_syscall(RCore *core, const char *name, const char *args) { } //bits check - switch (core->rasm->bits) { + switch (core->rasm->config->bits) { case 32: if (strcmp (name, "setup") && !num ) { r_cons_eprintf ("syscall not found!\n"); diff --git a/libr/core/disasm.c b/libr/core/disasm.c index 9d1f5d0035..394a6cd054 100644 --- a/libr/core/disasm.c +++ b/libr/core/disasm.c @@ -424,7 +424,7 @@ static void ds_print_ref_lines(char *line, char *line_col, RDisasmState *ds) { } static void get_bits_comment(RCore *core, RAnalFunction *f, char *cmt, int cmt_size) { - if (core && f && cmt && cmt_size > 0 && f->bits && f->bits != core->rasm->bits) { + if (core && f && cmt && cmt_size > 0 && f->bits && f->bits != core->rasm->config->bits) { const char *asm_arch = r_config_get (core->config, "asm.arch"); if (asm_arch && *asm_arch && strstr (asm_arch, "arm")) { switch (f->bits) { @@ -1118,7 +1118,7 @@ static void ds_build_op_str(RDisasmState *ds, bool print_color) { if (core->parser->subrel && ds->analop.refptr) { if (core->parser->subrel_addr == 0) { ut64 killme = UT64_MAX; - const int be = core->rasm->big_endian; + const int be = core->rasm->config->big_endian; r_io_read_i (core->io, ds->analop.ptr, &killme, ds->analop.refptr, be); core->parser->subrel_addr = killme; } @@ -3740,7 +3740,7 @@ static ut64 get_ptr(RDisasmState *ds, ut64 addr) { ut8 buf[sizeof (ut64)] = {0}; r_io_read_at (ds->core->io, addr, buf, sizeof (buf)); ut64 n64_32; - if (ds->core->rasm->bits == 64) { + if (ds->core->rasm->config->bits == 64) { n64_32 = r_read_ble64 (buf, 0); } else { n64_32 = r_read_ble32 (buf, 0); @@ -3750,10 +3750,10 @@ static ut64 get_ptr(RDisasmState *ds, ut64 addr) { static ut64 get_ptr_ble(RDisasmState *ds, ut64 addr) { ut8 buf[sizeof (ut64)] = {0}; - int endian = ds->core->rasm->big_endian; + int endian = ds->core->rasm->config->big_endian; ut64 n64_32; r_io_read_at (ds->core->io, addr, buf, sizeof (buf)); - if (ds->core->rasm->bits == 64) { + if (ds->core->rasm->config->bits == 64) { n64_32 = r_read_ble64 (buf, endian); } else { n64_32 = r_read_ble32 (buf, endian); @@ -3788,10 +3788,10 @@ static bool ds_print_core_vmode(RDisasmState *ds, int pos) { ut64 size; RAnalMetaItem *mi = r_meta_get_at (ds->core->anal, ds->at, R_META_TYPE_ANY, &size); if (mi) { - int obits = ds->core->rasm->bits; - ds->core->rasm->bits = size * 8; + int obits = ds->core->rasm->config->bits; + ds->core->rasm->config->bits = size * 8; slen = ds_print_shortcut(ds, get_ptr (ds, ds->at), pos); - ds->core->rasm->bits = obits; + ds->core->rasm->config->bits = obits; gotShortcut = true; } } @@ -4077,7 +4077,7 @@ static void ds_print_str(RDisasmState *ds, const char *str, int len, ut64 refadd } // do not resolve strings on arm64 pointed with ADRP if (ds->analop.type == R_ANAL_OP_TYPE_LEA) { - if (ds->core->rasm->bits == 64 && r_str_startswith (r_config_get (ds->core->config, "asm.arch"), "arm")) { + if (ds->core->rasm->config->bits == 64 && r_str_startswith (r_config_get (ds->core->config, "asm.arch"), "arm")) { return; } } @@ -4608,7 +4608,7 @@ static bool myregwrite(RAnalEsil *esil, const char *name, ut64 *val) { ignored = true; break; case R_ANAL_OP_TYPE_LEA: - if (ds->core->rasm->bits == 64 && r_str_startswith (r_config_get (ds->core->config, "asm.arch"), "arm")) { + if (ds->core->rasm->config->bits == 64 && r_str_startswith (r_config_get (ds->core->config, "asm.arch"), "arm")) { ignored = true; } break; @@ -5829,9 +5829,9 @@ toro: ret = ds_print_middle (ds, ret); ds_print_asmop_payload (ds, ds_bufat (ds)); - if (core->rasm->syntax != R_ASM_SYNTAX_INTEL) { + if (core->rasm->config->syntax != R_ASM_SYNTAX_INTEL) { RAsmOp ao; /* disassemble for the vm .. */ - int os = core->rasm->syntax; + int os = core->rasm->config->syntax; r_asm_set_syntax (core->rasm, R_ASM_SYNTAX_INTEL); r_asm_disassemble (core->rasm, &ao, ds_bufat (ds), ds_left (ds) + 5); r_asm_set_syntax (core->rasm, os); @@ -5868,9 +5868,9 @@ toro: ret = ds_print_middle (ds, ret); ds_print_asmop_payload (ds, ds_bufat (ds)); - if (core->rasm->syntax != R_ASM_SYNTAX_INTEL) { + if (core->rasm->config->syntax != R_ASM_SYNTAX_INTEL) { RAsmOp ao; /* disassemble for the vm .. */ - int os = core->rasm->syntax; + int os = core->rasm->config->syntax; r_asm_set_syntax (core->rasm, R_ASM_SYNTAX_INTEL); r_asm_disassemble (core->rasm, &ao, ds_bufat (ds), ds_left (ds) + 5); r_asm_set_syntax (core->rasm, os); diff --git a/libr/core/hack.c b/libr/core/hack.c index 69169580a9..19a5627305 100644 --- a/libr/core/hack.c +++ b/libr/core/hack.c @@ -78,12 +78,12 @@ R_API bool r_core_hack_arm64(RCore *core, const char *op, const RAnalOp *analop) return true; } R_API bool r_core_hack_arm(RCore *core, const char *op, const RAnalOp *analop) { - const int bits = core->rasm->bits; + const int bits = core->rasm->config->bits; const ut8 *b = core->block; if (!strcmp (op, "nop")) { - const int nopsize = (bits==16)? 2: 4; - const char *nopcode = (bits==16)? "00bf":"0000a0e1"; + const int nopsize = (bits == 16)? 2: 4; + const char *nopcode = (bits == 16)? "00bf":"0000a0e1"; const int len = analop->size; char* str; int i; @@ -266,7 +266,7 @@ R_API bool r_core_hack_x86(RCore *core, const char *op, const RAnalOp *analop) { R_API int r_core_hack(RCore *core, const char *op) { bool (*hack)(RCore *core, const char *op, const RAnalOp *analop) = NULL; const char *asmarch = r_config_get (core->config, "asm.arch"); - const int asmbits = core->rasm->bits; + const int asmbits = core->rasm->config->bits; if (!asmarch) { return false; diff --git a/libr/core/visual.c b/libr/core/visual.c index 33b6c8aea4..ff8e0bb3c5 100644 --- a/libr/core/visual.c +++ b/libr/core/visual.c @@ -205,7 +205,7 @@ static const char *stackPrintCommand(RCore *core) { if (r_config_get_i (core->config, "stack.bytes")) { return "px"; } - switch (core->rasm->bits) { + switch (core->rasm->config->bits) { case 64: return "pxq"; break; case 32: return "pxw"; break; } @@ -3450,7 +3450,7 @@ R_API int r_core_visual_cmd(RCore *core, const char *arg) { if (core->seltab) { const char *creg = core->dbg->creg; if (creg) { - int delta = core->rasm->bits / 8; + int delta = core->rasm->config->bits / 8; r_core_cmdf (core, "dr %s = %s-%d\n", creg, creg, delta); } } else { @@ -3493,7 +3493,7 @@ R_API int r_core_visual_cmd(RCore *core, const char *arg) { if (core->seltab) { const char *creg = core->dbg->creg; if (creg) { - int delta = core->rasm->bits / 8; + int delta = core->rasm->config->bits / 8; r_core_cmdf (core, "dr %s = %s+%d\n", creg, creg, delta); } } else { diff --git a/libr/core/vmenus.c b/libr/core/vmenus.c index bcbf0c66af..5beaf5dabc 100644 --- a/libr/core/vmenus.c +++ b/libr/core/vmenus.c @@ -1685,7 +1685,7 @@ R_API int r_core_visual_view_rop(RCore *core) { RStrBuf *sb = r_strbuf_new (""); char *msg; r_list_foreach (core->ropchain, iter, msg) { - if (core->rasm->bits == 64) { + if (core->rasm->config->bits == 64) { ut64 n = r_num_get (NULL, msg); n = r_read_be64 (&n); r_strbuf_appendf (sb, "%016"PFMT64x, n); diff --git a/libr/include/r_asm.h b/libr/include/r_asm.h index 6cd98a7873..db7b829d21 100644 --- a/libr/include/r_asm.h +++ b/libr/include/r_asm.h @@ -91,16 +91,27 @@ typedef struct { char *value; } RAsmEqu; -#define _RAsmPlugin struct r_asm_plugin_t -typedef struct r_asm_t { +typedef struct r_asm_config_t { char *cpu; int bits; int big_endian; int syntax; + // + int pcalign; + int dataalign; + int seggrn; + int invhex; + int bitshift; + char *features; +} RAsmConfig; + +#define _RAsmPlugin struct r_asm_plugin_t +typedef struct r_asm_t { + RAsmConfig *config; ut64 pc; void *user; - _RAsmPlugin *cur; - _RAsmPlugin *acur; + _RAsmPlugin *cur; // disassemble + _RAsmPlugin *acur; // assemble RList *plugins; RBinBind binb; RAnalBind analb; @@ -109,14 +120,9 @@ typedef struct r_asm_t { Sdb *pair; RSyscall *syscall; RNum *num; - char *features; - int invhex; // invalid instructions displayed in hex - int pcalign; int dataalign; - int bitshift; bool immdisp; // Display immediates with # symbol (for arm stuff). HtPP *flags; - int seggrn; bool pseudo; } RAsm; diff --git a/libr/main/rasm2.c b/libr/main/rasm2.c index 48c8226785..7efa28cf74 100644 --- a/libr/main/rasm2.c +++ b/libr/main/rasm2.c @@ -599,7 +599,7 @@ static int print_assembly_output(RAsmState *as, const char *buf, ut64 offset, ut } printf ("wx "); } - int ret = rasm_asm (as, (char *)buf, offset, len, as->a->bits, bin, use_spp, hexwords); + int ret = rasm_asm (as, (char *)buf, offset, len, as->a->config->bits, bin, use_spp, hexwords); if (rad) { printf ("f entry = $$\n"); printf ("f label.main = $$ + 1\n"); @@ -875,6 +875,7 @@ R_API int r_main_rasm2(int argc, const char *argv[]) { if (file) { char *content; size_t length = 0; + const int bits = as->a->config->bits; if (!strcmp (file, "-")) { int sz = 0; ut8 *buf = (ut8 *)r_stdin_slurp (&sz); @@ -890,12 +891,12 @@ R_API int r_main_rasm2(int argc, const char *argv[]) { length -= skip; } } - ret = rasm_disasm (as, offset, (char *)buf, len, as->a->bits, bin, dis - 1); + ret = rasm_disasm (as, offset, (char *)buf, len, bits, bin, dis - 1); } else if (analinfo) { ret = show_analinfo (as, (const char *)buf, offset); } else { ret = print_assembly_output (as, (char *)buf, offset, len, - as->a->bits, bin, use_spp, rad, hexwords, arch); + bits, bin, use_spp, rad, hexwords, arch); } ret = !ret; free (buf); @@ -918,12 +919,12 @@ R_API int r_main_rasm2(int argc, const char *argv[]) { } if (dis) { ret = rasm_disasm (as, offset, content, - length, as->a->bits, bin, dis - 1); + length, bits, bin, dis - 1); } else if (analinfo) { ret = show_analinfo (as, (const char *)content, offset); } else { ret = print_assembly_output (as, content, offset, length, - as->a->bits, bin, use_spp, rad, hexwords, arch); + bits, bin, use_spp, rad, hexwords, arch); } ret = !ret; } @@ -962,11 +963,11 @@ R_API int r_main_rasm2(int argc, const char *argv[]) { } } if (dis) { - ret = rasm_disasm (as, offset, (char *)buf, length, as->a->bits, bin, dis - 1); + ret = rasm_disasm (as, offset, (char *)buf, length, bits, bin, dis - 1); } else if (analinfo) { ret = show_analinfo (as, (const char *)buf, offset); } else { - ret = rasm_asm (as, (const char *)buf, offset, length, as->a->bits, bin, use_spp, hexwords); + ret = rasm_asm (as, (const char *)buf, offset, length, bits, bin, use_spp, hexwords); } idx += ret; offset += ret; @@ -998,12 +999,12 @@ R_API int r_main_rasm2(int argc, const char *argv[]) { printf ("\"wa "); } ret = rasm_disasm (as, offset, (char *)usrstr, len, - as->a->bits, bin, dis - 1); + as->a->config->bits, bin, dis - 1); free (usrstr); } else if (analinfo) { ret = show_analinfo (as, (const char *)opt.argv[opt.ind], offset); } else { - ret = print_assembly_output (as, opt.argv[opt.ind], offset, len, as->a->bits, + ret = print_assembly_output (as, opt.argv[opt.ind], offset, len, as->a->config->bits, bin, use_spp, rad, hexwords, arch); } if (!ret) {