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Add dh in anal.x86-64.reg and fix some arm/x86 esil bugs
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07ff9bb5fb
commit
f7fbbc419e
@ -141,7 +141,7 @@ R_API int r_anal_esil_fire_interrupt(RAnalEsil *esil, int interrupt) {
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return false;
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i = sdb_itoa ((ut64)interrupt, t, 16);
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if (!sdb_num_exists (esil->interrupts, i)) {
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eprintf ("0x%08"PFMT64x" Cannot find interrupt-handler for interrupt %d\n",
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eprintf ("0x%08"PFMT64x" Invalid interrupt/syscall 0x%08x\n",
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esil->address, interrupt);
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return false;
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}
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@ -1103,7 +1103,7 @@ static int esil_div(RAnalEsil *esil) {
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if (src && r_anal_esil_get_parm (esil, src, &s)) {
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if (dst && r_anal_esil_get_parm (esil, dst, &d)) {
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if (s == 0) {
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eprintf ("esil_div: Division by zero!\n");
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eprintf ("0x%08"PFMT64x" esil_div: Division by zero!\n", esil->address);
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esil->trap = R_ANAL_TRAP_DIVBYZERO;
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esil->trap_code = 0;
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} else {
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@ -1112,7 +1112,7 @@ static int esil_div(RAnalEsil *esil) {
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ret = 1;
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}
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} else {
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eprintf ("esil_div: invalid parameters");
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eprintf ("0x%08"PFMT64x" esil_div: invalid parameters\n", esil->address);
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}
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free (src);
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free (dst);
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@ -1134,7 +1134,7 @@ static int esil_diveq(RAnalEsil *esil) {
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}
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r_anal_esil_reg_write (esil, dst, d / s);
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} else {
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eprintf ("esil_diveq: Division by zero!\n");
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// eprintf ("0x%08"PFMT64x" esil_diveq: Division by zero!\n", esil->address);
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esil->trap = R_ANAL_TRAP_DIVBYZERO;
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esil->trap_code = 0;
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}
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@ -1206,7 +1206,7 @@ static int esil_add(RAnalEsil *esil) {
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ret = true;
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}
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} else {
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eprintf ("esil_add: invalid parameters\n");
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eprintf ("0x%08"PFMT64x" esil_add: invalid parameters\n", esil->address);
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}
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free (src);
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free (dst);
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@ -1256,14 +1256,14 @@ static int esil_inceq(RAnalEsil *esil) {
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ut64 sd;
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char *src_dst = r_anal_esil_pop (esil);
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if (src_dst && (r_anal_esil_get_parm_type (esil, src_dst) == R_ANAL_ESIL_PARM_REG) && r_anal_esil_get_parm (esil, src_dst, &sd)) {
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esil->old = sd;
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sd++;
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// inc rax
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esil->old = sd++;
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esil->cur = sd;
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r_anal_esil_reg_write (esil, src_dst, sd);
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esil->lastsz = esil_internal_sizeof_reg (esil, src_dst);
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ret = true;
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} else {
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eprintf ("esil_inceq: invalid parameters\n");
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eprintf ("0x%08"PFMT64x" esil_inceq: invalid parameters\n", esil->address);
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}
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free (src_dst);
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return ret;
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@ -1352,7 +1352,7 @@ static int esil_deceq(RAnalEsil *esil) {
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esil->lastsz = esil_internal_sizeof_reg (esil, src_dst);
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ret = true;
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} else {
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eprintf ("esil_deceq: invalid parameters\n");
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eprintf ("0x%08"PFMT64x" esil_deceq: invalid parameters\n", esil->address);
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}
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free (src_dst);
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return ret;
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@ -586,9 +586,13 @@ r4,r5,r6,3,sp,[*],12,sp,+=
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4 * insn->detail->arm.op_count);
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break;
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case ARM_INS_LDM:
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{
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const char *comma = "";
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for (i=1; i<insn->detail->arm.op_count; i++) {
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r_strbuf_appendf (&op->esil, "%s,%d,+,[4],%s,=",
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ARG (0), i*4, REG (i));
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r_strbuf_appendf (&op->esil, "%s%s,%d,+,[4],%s,=",
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comma, ARG (0), i*4, REG (i));
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comma = ",";
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}
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}
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break;
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case ARM_INS_CMP:
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@ -1092,7 +1092,13 @@ SETL/SETNGE
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op->val = 1;
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if (a->decode) {
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char *src = getarg (&gop, 0, 0, NULL);
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esilprintf (op, "%s,++=,$o,of,=,$s,sf,=,$z,zf,=,$p,pf,=", src);
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if (strchr (src, '[')) {
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char *dst = r_str_replace (strdup (src), "[", "=[", 1);
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esilprintf (op, "1,%s,++,%s,$o,of,=,$s,sf,=,$z,zf,=,$p,pf,=", src, dst);
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free (dst);
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} else {
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esilprintf (op, "%s,++=,$o,of,=,$s,sf,=,$z,zf,=,$p,pf,=", src);
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}
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free (src);
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}
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break;
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@ -1103,7 +1109,8 @@ SETL/SETNGE
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op->val = 1;
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if (a->decode) {
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char *src = getarg (&gop, 0, 0, NULL);
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esilprintf (op, "%s,--=,$o,of,=,$s,sf,=,$z,zf,=,$p,pf,=", src);
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//esilprintf (op, "%s,--=,$o,of,=,$s,sf,=,$z,zf,=,$p,pf,=", src);
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esilprintf (op, "1,%s,[4],-,%s,=[4],$o,of,=,$s,sf,=,$z,zf,=,$p,pf,=", src, src);
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free (src);
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}
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break;
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@ -1209,7 +1216,15 @@ SETL/SETNGE
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char *a1 = getarg (&gop, 1, 0, NULL);
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char *a2 = getarg (&gop, 2, 0, NULL);
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// TODO update flags & handle signedness
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esilprintf (op, "%s,%s,/,%s,=", a2, a1, a0);
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if (!a2 && !a1) {
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// TODO: IDIV rbx not implemented. this is just a workaround
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// http://www.tptp.cc/mirrors/siyobik.info/instruction/IDIV.html
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// Divides (signed) the value in the AX, DX:AX, or EDX:EAX registers (dividend) by the source operand (divisor) and stores the result in the AX (AH:AL), DX:AX, or EDX:EAX registers. The source operand can be a general-purpose register or a memory location. The action of this instruction depends on the operand size (dividend/divisor), as shown in the following table:
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// IDIV RBX == RDX:RAX /= RBX
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esilprintf (op, "%s,%s,/=", a0, "rax");
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} else {
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esilprintf (op, "%s,%s,/,%s,=", a2, a1, a0);
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}
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free (a0);
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free (a1);
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free (a2);
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@ -1634,18 +1649,22 @@ static int set_reg_profile(RAnal *anal) {
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"gpr eax .32 80 0\n"
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"gpr ax .16 80 0\n"
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"gpr al .8 80 0\n"
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"gpr ah .8 81 0\n"
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"gpr rbx .64 40 0\n"
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"gpr ebx .32 40 0\n"
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"gpr bx .16 40 0\n"
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"gpr bl .8 40 0\n"
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"gpr bh .8 41 0\n"
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"gpr rcx .64 88 0\n"
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"gpr ecx .32 88 0\n"
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"gpr cx .16 88 0\n"
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"gpr cl .8 88 0\n"
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"gpr ch .8 89 0\n"
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"gpr rdx .64 96 0\n"
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"gpr edx .32 96 0\n"
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"gpr dx .16 96 0\n"
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"gpr dl .8 96 0\n"
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"gpr dh .8 97 0\n"
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"gpr rsi .64 104 0\n"
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"gpr esi .32 104 0\n"
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"gpr si .16 104 0\n"
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@ -2280,7 +2280,7 @@ static int esilbreak_mem_read(RAnalEsil *esil, ut64 addr, ut8 *buf, int len) {
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if (refptr) {
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snprintf (cmd2, sizeof (cmd2), "axd 0x%"PFMT64x" 0x%"PFMT64x,
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esil->address, addr);
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eprintf ("%s\n", cmd2);
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//eprintf ("%s\n", cmd2);
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r_core_cmd0 (mycore, cmd2);
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}
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}
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@ -2406,7 +2406,7 @@ R_API void r_core_anal_esil (RCore *core, const char *str) {
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ut64 dst = r_reg_getv (core->anal->reg, pcname);
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if (myvalid (dst) && r_io_is_valid_offset (mycore->io, dst, 0)) {
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// get pc
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eprintf ("0x%08"PFMT64x" UCALL 0x%08"PFMT64x"\n", cur, dst);
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//eprintf ("0x%08"PFMT64x" UCALL 0x%08"PFMT64x"\n", cur, dst);
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//r_core_cmdf (core, "axc 0x%08"PFMT64x" 0x%"PFMT64x, cur, dst);
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r_anal_ref_add (core->anal, dst, cur, 'c');
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} else {
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@ -1,4 +1,4 @@
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/* radare - LGPL - Copyright 2009-2015 - pancake */
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/* radare - LGPL - Copyright 2009-2016 - pancake */
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#include <r_userconf.h>
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#include <r_debug.h>
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