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Fix some more arm-rel-pc issues (by CalArcher)
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7b0622f85d
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@ -545,7 +545,7 @@ static int analop_esil(RAnal *a, RAnalOp *op, ut64 addr, const ut8 *buf, int len
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int i;
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char str[32][32];
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int msr_flags;
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int pcdelta = (thumb ? 4 : 8); // - op->size;
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int pcdelta = (thumb ? 4 : 8);
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r_strbuf_init (&op->esil);
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r_strbuf_set (&op->esil, "");
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switch (insn->detail->arm.cc) {
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@ -724,20 +724,10 @@ r4,r5,r6,3,sp,[*],12,sp,+=
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if (!strcmp (ARG(2), "")) {
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if (!strcmp (ARG(1), "pc")) {
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int delta = thumb ? 4 : 8;
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if (thumb) {
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delta -= op->size;
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if (!(addr & 2))
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delta += 2;
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}
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#if 1
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r_strbuf_appendf (&op->esil,
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"%d,2,2,%s,>>,<<,+,%s,+=",
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delta, ARG(1), ARG(0));
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#else
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const char *pc = "$$";
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r_strbuf_appendf (&op->esil,
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"%d,%s,+,%s,+=",
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delta, ARG(1), ARG(0));
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#endif
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delta, pc, ARG(0));
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} else {
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if (!strcmp (ARG(0), ARG(1))) {
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r_strbuf_appendf (&op->esil, "2,%s,*=", ARG(0));
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@ -747,8 +737,9 @@ r4,r5,r6,3,sp,[*],12,sp,+=
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}
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} else {
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if (!strcmp (ARG(1), "pc")) {
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int delta = 4; //thumb ? 4 : 8;
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r_strbuf_appendf (&op->esil, "%d,%s,+,%s,+,%s,=", delta, ARG(2), ARG(1), ARG(0));
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const char *pc = "$$";
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int delta = thumb ? 4 : 8;
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r_strbuf_appendf (&op->esil, "%d,%s,+,%s,+,%s,=", delta, ARG(2), pc, ARG(0));
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} else {
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if (!strcmp (ARG(0), ARG(1))) {
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r_strbuf_appendf (&op->esil, "%s,%s,+=", ARG(2), ARG(0));
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@ -798,8 +789,8 @@ r4,r5,r6,3,sp,[*],12,sp,+=
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const char *pc = "$$";
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if (REGBASE(1) == ARM_REG_PC) {
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op->refptr = 4;
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op->ptr = addr + pcdelta - MEMDISP(1);
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r_strbuf_appendf (&op->esil, "0x%"PFMT64x",%s,+,[4],%s,=",
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op->ptr = addr + pcdelta + MEMDISP(1);
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r_strbuf_appendf (&op->esil, "0x%"PFMT64x",2,2,%s,>>,<<,+,[4],%s,=",
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MEMDISP(1), pc, REG(0));
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} else {
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int disp = MEMDISP(1);
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@ -818,20 +809,14 @@ r4,r5,r6,3,sp,[*],12,sp,+=
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op->refptr = 4;
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op->ptr = addr + pcdelta + MEMDISP(1);
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if (ISMEM(1) && LSHIFT2(1)) {
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//r_strbuf_appendf (&op->esil, "2,2,%d,%s,+,>>,<<,%d,%s,<<,+,[4],%s,=",
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// pcdelta, pc, LSHIFT2(1), MEMINDEX(1), REG(0));
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r_strbuf_appendf (&op->esil, "%d,%s,+,%d,%s,<<,+,[4],%s,=",
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r_strbuf_appendf (&op->esil, "2,2,%d,%s,+,>>,<<,%d,%s,<<,+,[4],%s,=",
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pcdelta, pc, LSHIFT2(1), MEMINDEX(1), REG(0));
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} else {
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if (ISREG(1)) {
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//r_strbuf_appendf (&op->esil, "2,2,%d,%s,+,>>,<<,%s,+,[4],%s,=",
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// pcdelta, pc, MEMINDEX(1), REG(0));
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r_strbuf_appendf (&op->esil, "%d,%s,+,%s,+,[4],%s,=",
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r_strbuf_appendf (&op->esil, "2,2,%d,%s,+,>>,<<,%s,+,[4],%s,=",
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pcdelta, pc, MEMINDEX(1), REG(0));
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} else {
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//r_strbuf_appendf (&op->esil, "2,2,%d,%s,+,>>,<<,%d,+,[4],%s,=",
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//pcdelta, pc, MEMDISP(1), REG(0));
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r_strbuf_appendf (&op->esil, "%d,%s,+,%d,+,[4],%s,=",
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r_strbuf_appendf (&op->esil, "2,2,%d,%s,+,>>,<<,%d,+,[4],%s,=",
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pcdelta, pc, MEMDISP(1), REG(0));
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}
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}
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@ -1229,9 +1214,8 @@ jmp $$ + 4 + ( [delta] * 2 )
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case ARM_INS_ADD:
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op->type = R_ANAL_OP_TYPE_ADD;
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if (REGID(1) == ARM_REG_PC) {
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op->ptr = (addr & ~3) + (thumb ? 4 : 8) + IMM(2);
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//if (addr & 2) { op->ptr += 2; }
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op->refptr = 4;
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//op->ptr = pc + addr + (thumb ? 4 : 8) + IMM(2);
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//op->refptr = 4;
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}
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break;
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case ARM_INS_VMOV:
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@ -1430,7 +1414,8 @@ static int analop(RAnal *a, RAnalOp *op, ut64 addr, const ut8 *buf, int len) {
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if (n<1) {
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op->type = R_ANAL_OP_TYPE_ILL;
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} else {
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bool thumb = cs_insn_group (handle, insn, ARM_GRP_THUMB);
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//bool thumb = cs_insn_group (handle, insn, ARM_GRP_THUMB);
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bool thumb = a->bits == 16;
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op->size = insn->size;
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if (a->bits == 64) {
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anop64 (handle, op, insn);
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