Magic-Mirror/radare2
1
0
Fork 0
mirror of https://github.com/radareorg/radare2.git synced 2024-10-07 18:43:45 +00:00
Code Issues Actions 7 Packages Projects Releases Wiki Activity

Tricore basic analysis plugin with reg profile (#16522) ##arch

Browse Source
This commit is contained in:
curly 2020-04-12 20:42:58 +00:00 committed by GitHub
parent ef07476e38
commit f9d78db7e2
No known key found for this signature in database
GPG Key ID: 4AEE18F83AFDEB23
9 changed files with 181 additions and 2 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

1
libr/anal/meson.build
View File

@ -81,6 +81,7 @@ r_anal_sources = [
'p/anal_tms320.c',
'p/anal_tms320_c55x_plus.c',
#'p/anal_tms320c64x.c',
'p/anal_tricore.c',
'p/anal_v810.c',
'p/anal_v850.c',
'p/anal_vax.c',

2
libr/anal/p/Makefile
View File

@ -12,7 +12,7 @@ all: ${ALL_TARGETS}
ALL_TARGETS=
# TODO: rename to enabled plugins
ARCHS=null.mk ppc_gnu.mk ppc_cs.mk arm_gnu.mk avr.mk xap.mk dalvik.mk sh.mk ebc.mk gb.mk malbolge.mk ws.mk h8300.mk cr16.mk v850.mk msp430.mk sparc_gnu.mk sparc_cs.mk x86_cs.mk cris.mk 6502.mk snes.mk riscv.mk vax.mk xtensa.mk rsp.mk mcore.mk
ARCHS=null.mk ppc_gnu.mk ppc_cs.mk arm_gnu.mk avr.mk xap.mk dalvik.mk sh.mk ebc.mk gb.mk malbolge.mk ws.mk h8300.mk cr16.mk v850.mk msp430.mk sparc_gnu.mk sparc_cs.mk x86_cs.mk cris.mk 6502.mk snes.mk riscv.mk vax.mk xtensa.mk rsp.mk mcore.mk tricore.mk
include $(ARCHS)
clean:

91
libr/anal/p/anal_tricore.c Normal file
View File

@ -0,0 +1,91 @@
#include <string.h>
#include <r_types.h>
#include <r_lib.h>
#include <r_asm.h>
#include <r_anal.h>
#include "../../asm/arch/tricore/gnu/tricore-opc.c"
static bool set_reg_profile(RAnal *anal) {
const char *p =
"=PC pc\n"
"=SP a10\n"
"gpr p0 .64 0 0\n"
"gpr a0 .32 0 0\n"
"gpr a1 .32 4 0\n"
"gpr p2 .64 8 0\n"
"gpr a2 .32 8 0\n"
"gpr a3 .32 12 0\n"
"gpr p4 .64 16 0\n"
"gpr a4 .32 16 0\n"
"gpr a5 .32 20 0\n"
"gpr p6 .64 24 0\n"
"gpr a6 .32 24 0\n"
"gpr a7 .32 28 0\n"
"gpr p8 .64 32 0\n"
"gpr a8 .32 32 0\n"
"gpr a9 .32 36 0\n"
"gpr p10 .64 40 0\n"
"gpr a10 .32 40 0\n"
"gpr a11 .32 44 0\n"
"gpr p12 .64 48 0\n"
"gpr a12 .32 48 0\n"
"gpr a13 .32 52 0\n"
"gpr p14 .64 56 0\n"
"gpr a14 .32 56 0\n"
"gpr a15 .32 60 0\n"
"gpr e0 .64 64 0\n"
"gpr d0 .32 64 0\n"
"gpr d1 .32 68 0\n"
"gpr e2 .64 72 0\n"
"gpr d2 .32 72 0\n"
"gpr d3 .32 76 0\n"
"gpr e4 .64 80 0\n"
"gpr d4 .32 80 0\n"
"gpr d5 .32 84 0\n"
"gpr e6 .64 88 0\n"
"gpr d6 .32 88 0\n"
"gpr d7 .32 92 0\n"
"gpr e8 .64 96 0\n"
"gpr d8 .32 96 0\n"
"gpr d9 .32 100 0\n"
"gpr e10 .64 104 0\n"
"gpr d10 .32 104 0\n"
"gpr d11 .32 108 0\n"
"gpr e12 .64 112 0\n"
"gpr d12 .32 112 0\n"
"gpr d13 .32 114 0\n"
"gpr e14 .64 118 0\n"
"gpr d14 .32 118 0\n"
"gpr d15 .32 120 0\n"
"gpr PSW .32 124 0\n"
"gpr PCXI .32 128 0\n"
"gpr FCX .32 132 0\n"
"gpr LCX .32 136 0\n"
"gpr ISP .32 140 0\n"
"gpr ICR .32 144 0\n"
"gpr PIPN .32 148 0\n"
"gpr BIV .32 152 0\n"
"gpr BTV .32 156 0\n"
"gpr pc .32 160 0\n";
return r_reg_set_profile_string (anal->reg, p);
}
struct r_anal_plugin_t r_anal_plugin_tricore = {
.name = "tricore",
.desc = "TRICORE analysis plugin",
.license = "LGPL3",
.arch = "tricore",
.bits = 32,
.set_reg_profile = set_reg_profile,
};
#ifndef R2_PLUGIN_INCORE
R_API RLibStruct radare_plugin = {
.type = R_LIB_TYPE_ANAL,
.data = &r_anal_plugin_tricore,
.version = R2_VERSION
};
#endif

10
libr/anal/p/tricore.mk Normal file
View File

@ -0,0 +1,10 @@
OBJ_TRICORE=anal_tricore.o
STATIC_OBJ+=${OBJ_TRICORE}
TARGET_TRICORE=anal_tricore.${EXT_SO}
ALL_TARGETS+=${TARGET_TRICORE}
${TARGET_TRICORE}: ${OBJ_TRICORE}
${CC} $(call libname,anal_tricore) ${LDFLAGS} ${CFLAGS} \
-o $(TARGET_TRICORE) $(OBJ_TRICORE)

8
libr/asm/arch/tricore/README.md
View File

@ -1,2 +1,8 @@
Based on code from https://www.hightec-rt.com/en/downloads/sources/14-sources-for-tricore-v3-3-7-9-binutils-1.html
Tricore ISA 1.3: https://www.infineon.com/dgdl/tc_v131_corearchitecture_v__138.pdf?fileId=db3a304412b407950112b409c4500359
Tricore ISA 1.6: https://www.infineon.com/dgdl/tc1_6__architecture_vol1.pdf?fileId=db3a3043372d5cc801373b0f374d5d67
Tricore 1.6P and 1.6E: https://www.infineon.com/dgdl/Infineon-TC2xx_Architecture_vol2-UM-v01_00-EN.pdf?fileId=5546d46269bda8df0169ca1bf33124a8
EABI: https://www.infineon.com/dgdl/TriCore_EABI_v2_3.pdf?fileId=db3a304412b407950112b40f8d7a142b

1
libr/include/r_anal.h
View File

@ -2020,6 +2020,7 @@ extern RAnalPlugin r_anal_plugin_sparc_gnu;
extern RAnalPlugin r_anal_plugin_sysz;
extern RAnalPlugin r_anal_plugin_tms320;
extern RAnalPlugin r_anal_plugin_tms320c64x;
extern RAnalPlugin r_anal_plugin_tricore;
extern RAnalPlugin r_anal_plugin_v810;
extern RAnalPlugin r_anal_plugin_v850;
extern RAnalPlugin r_anal_plugin_vax;

1
libr/meson.build
View File

@ -41,6 +41,7 @@ anal_plugins = [
'sysz',
'tms320',
#'tms320c64x',
'tricore',
'v810',
'v850',
'vax',

1
plugins.def.cfg
View File

@ -34,6 +34,7 @@ anal.sparc_cs
anal.sparc_gnu
anal.sysz
anal.tms320
anal.tricore
anal.v850
anal.ws
anal.xap

68
test/new/db/anal/tricore
View File

@ -45,3 +45,71 @@ EXPECT=<<EOF
arch tricore
EOF
RUN
NAME=TriCore return_0.elf
FILE=../bins/tricore/return_0.elf
CMDS=drp
EXPECT=<<EOF
=PC pc
=SP a10
gpr p0 .64 0 0
gpr a0 .32 0 0
gpr a1 .32 4 0
gpr p2 .64 8 0
gpr a2 .32 8 0
gpr a3 .32 12 0
gpr p4 .64 16 0
gpr a4 .32 16 0
gpr a5 .32 20 0
gpr p6 .64 24 0
gpr a6 .32 24 0
gpr a7 .32 28 0
gpr p8 .64 32 0
gpr a8 .32 32 0
gpr a9 .32 36 0
gpr p10 .64 40 0
gpr a10 .32 40 0
gpr a11 .32 44 0
gpr p12 .64 48 0
gpr a12 .32 48 0
gpr a13 .32 52 0
gpr p14 .64 56 0
gpr a14 .32 56 0
gpr a15 .32 60 0
gpr e0 .64 64 0
gpr d0 .32 64 0
gpr d1 .32 68 0
gpr e2 .64 72 0
gpr d2 .32 72 0
gpr d3 .32 76 0
gpr e4 .64 80 0
gpr d4 .32 80 0
gpr d5 .32 84 0
gpr e6 .64 88 0
gpr d6 .32 88 0
gpr d7 .32 92 0
gpr e8 .64 96 0
gpr d8 .32 96 0
gpr d9 .32 100 0
gpr e10 .64 104 0
gpr d10 .32 104 0
gpr d11 .32 108 0
gpr e12 .64 112 0
gpr d12 .32 112 0
gpr d13 .32 114 0
gpr e14 .64 118 0
gpr d14 .32 118 0
gpr d15 .32 120 0
gpr PSW .32 124 0
gpr PCXI .32 128 0
gpr FCX .32 132 0
gpr LCX .32 136 0
gpr ISP .32 140 0
gpr ICR .32 144 0
gpr PIPN .32 148 0
gpr BIV .32 152 0
gpr BTV .32 156 0
gpr pc .32 160 0
EOF
RUN