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Fix pseudo and esil of the TST instruction on ARM32 #18108 (#18110)

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Liumeo 2020-12-26 17:55:10 -05:00 committed by GitHub
parent 057854a0cd
commit fd2dfd63d7
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GPG Key ID: 4AEE18F83AFDEB23
3 changed files with 27 additions and 3 deletions
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2
libr/anal/p/anal_arm_cs.c
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@ -2341,7 +2341,7 @@ r6,r5,r4,3,sp,[*],12,sp,+=
} }
break; break;
case ARM_INS_TST: case ARM_INS_TST:
r_strbuf_appendf (&op->esil, "%s,%s,==,$z,zf,:=", ARG(1), ARG(0)); r_strbuf_appendf (&op->esil, "0,%s,%s,&,==", ARG(1), ARG(0));
break; break;
case ARM_INS_LDRD: case ARM_INS_LDRD:
case ARM_INS_LDRB: case ARM_INS_LDRB:

4
libr/parse/p/parse_arm_pseudo.c
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@ -53,7 +53,7 @@ static int replace(int argc, const char *argv[], char *newstr) {
{ 0, "cmn", "if (# != #)", { 1, 2 } }, { 0, "cmn", "if (# != #)", { 1, 2 } },
{ 0, "cmp", "if (# == #)", { 1, 2 } }, { 0, "cmp", "if (# == #)", { 1, 2 } },
{ 0, "fcmp", "if (# == #)", { 1, 2 } }, { 0, "fcmp", "if (# == #)", { 1, 2 } },
{ 0, "tst", "if (# == #)", { 1, 2 } }, { 0, "tst", "if ((# & #) == 0)", { 1, 2 } },
{ 0, "dvf", "# = # / #", { 1, 2, 3 } }, { 0, "dvf", "# = # / #", { 1, 2, 3 } },
{ 0, "eor", "# = # ^ #", { 1, 2, 3 } }, { 0, "eor", "# = # ^ #", { 1, 2, 3 } },
{ 1, "bkpt", "breakpoint #", { 1 } }, { 1, "bkpt", "breakpoint #", { 1 } },
@ -127,7 +127,7 @@ static int replace(int argc, const char *argv[], char *newstr) {
{ 0, "vdiv.f64", "# = (float) # / #", { 1, 2, 3 } }, { 0, "vdiv.f64", "# = (float) # / #", { 1, 2, 3 } },
{ 0, "addw", "# = # + #", { 1, 2, 3 } }, { 0, "addw", "# = # + #", { 1, 2, 3 } },
{ 0, "sub.w", "# = # - #", { 1, 2, 3 } }, { 0, "sub.w", "# = # - #", { 1, 2, 3 } },
{ 0, "tst.w", "if (# == #)", { 1, 2 } }, { 0, "tst.w", "if ((# & #) == 0)", { 1, 2 } },
{ 0, "lsr.w", "# = # >> #", { 1, 2, 3 } }, { 0, "lsr.w", "# = # >> #", { 1, 2, 3 } },
{ 0, "lsl.w", "# = # << #", { 1, 2, 3 } }, { 0, "lsl.w", "# = # << #", { 1, 2, 3 } },
{ 0, "pop.w", "pop #", { 1 } }, { 0, "pop.w", "pop #", { 1 } },

24
test/db/esil/arm_32
View File

@ -525,6 +525,30 @@ EXPECT=<<EOF
EOF EOF
RUN RUN
NAME=tst nz
FILE=-
CMDS=<<EOF
e asm.arch=arm
e asm.bits=32
wx 050010e3 0100a003
pd 2
ao 2~esil
aei
ar r0=4
2aes
ar?r0
EOF
EXPECT=<<EOF
0x00000000 050010e3 tst r0, 5
0x00000004 0100a003 moveq r0, 1
esilcost: 0
esil: 0,5,r0,&,==,$z,zf,:=,31,$s,nf,:=
esilcost: 0
esil: zf,?{,1,r0,=,}
0x00000004
EOF
RUN
NAME=ldr r0, [r1, 7] NAME=ldr r0, [r1, 7]
FILE=malloc://0x200 FILE=malloc://0x200
CMDS=<<EOF CMDS=<<EOF