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12,213 Commits 55 Branches 118 Tags
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629 Commits

Author SHA1 Message Date
pancake
4429de16f9 Fix pa/pad for big/lil endian 2016-09-01 22:34:28 +02:00
pancake
dc545c8102 Fix regression in rasm2 -e 2016-09-01 21:50:04 +02:00
pancake
fe0530aa9c Fix OOB read in vax disassembler 2016-08-14 19:35:24 +02:00
pancake
a211c48bd5 Update some indentation in asm.dalvik 2016-08-06 11:58:54 +02:00
pancake
cc01682132 Some playground with DEX 2016-08-05 13:11:30 +02:00
Sven Steinbauer
ca96796268 Prevent possible max shift value (#5391) 
Protect against shifts that might be bigger than 31
 2016-07-27 13:21:36 +02:00
Álvaro Felipe Melchor
9e412a9048 fix again the crash in nz 2016-07-26 23:08:29 +02:00
Álvaro Felipe Melchor
5d493c1950 refix crash in nz assembler 2016-07-26 22:37:20 +02:00
Álvaro Felipe Melchor
3c8066ce57 fix crash in nz assembler 2016-07-26 22:08:25 +02:00
pancake
2dda628da1 Null terminate array of instructions in x86.nz to fix a crash 2016-07-26 18:46:48 +02:00
pancake
b342358513 Fix x86.nz warnings from clang 2016-07-25 21:26:35 +02:00
Sven Steinbauer
e436e66428 Kill dead code (#5378) 
Fix dead code warnings from coverity scan
 2016-07-25 21:24:29 +02:00
Sven Steinbauer
c5635eec3c Fix error on invalid reg (#5374) 
some instructions wouldn't error on invalid source or dest values.
Set valid reg to false by default and only set true if actually valid
 2016-07-25 18:52:58 +02:00
Sven Steinbauer
887f5bfa8c Support extended 64bit registers [Fix #5364] 2016-07-25 18:02:46 +02:00
pancake
6c549b424a Remove x86.tab from r2 master (moved to extras) 2016-07-25 03:47:47 +02:00
pancake
845bfebc9e Fix null deref in x86.nz 2016-07-25 03:42:28 +02:00
Maijin
22de895ef5 Rename CSR disasm/anal into XAP4 Fix #5355 2016-07-23 00:41:42 +02:00
Sven Steinbauer
996e767e0d Refactor nz assembler 
Refactor nz assembler
 2016-07-22 18:33:54 +02:00
bsmiles32
622e828e1d Add basic support for N64 RSP processor. (#5269) 
* Add basic support for N64 RSP processor.
This includes:
* a table driven instruction decoder (rsp_idec)
* a disassembler
* a very primitive anal plugin
 2016-07-03 22:03:26 +02:00
pancake
2cc433cefa Fixes for avr to make travis green 2016-07-02 02:37:00 +02:00
pancake
98e90dd3cf Implement RSyscall.IO in disasm loop for X86 and AVR 2016-06-29 17:02:43 +02:00
Sven Steinbauer
2c086751b9 Add fsincos instruction [fix #5204] (#5205) 2016-06-24 15:08:52 +02:00
Sven Steinbauer
995c952c5d Fix #5097 : mov instruction with rex regs 
sil, dil, spl, and bpl, registers now supported
 2016-06-22 13:04:23 +02:00
Sven Steinbauer
db76ef6497 Add bt instruction [fix #1277] (#5194) 2016-06-22 12:31:08 +02:00
Sylvain Pelissier
50aed82b66 Add lfence, mfence and sfence to x86.nz (#5193) 2016-06-22 10:29:26 +02:00
Sven Steinbauer
d45101eebe Add offset support to add instruction (#5137) 
support syntax for

add eax, [ecx]
add ecx, [eba +/- 3]
 2016-06-15 15:33:14 +02:00
pancake
e032a48cbe Fix latest 26 COVs 2016-06-14 23:47:58 +02:00
Sven Steinbauer
deebcc5f46 Add check for 64bit overflow (#5116) 2016-06-10 17:02:51 +02:00
Sven Steinbauer
00e964e9b6 Add support to mov for negative immediates (#5090) 
mov eax, -3
 2016-06-07 12:23:44 +02:00
Sven Steinbauer
6e4a1b55b1 Error if moving 64bit val to 32bit reg (#5088) 
mov eax, 0x1122334455667788 now errors if trying to assemble with -b64.
 2016-06-07 11:01:35 +02:00
pancake
eb9feef231 Fixes for powerpc endian in mach0 and other issues 2016-06-06 22:57:22 +02:00
pancake
95b2e511f5 Fix some warnings 2016-06-01 12:23:10 +02:00
Sven Steinbauer
63dd8590d7 Refactor mov assembly for nz (#5057) 
* reg offset code consolidated to single location and simplified
* Refactor `getreg` for `arg` and `arg2` to use `r0` and `r1` throughout
        `mov` case

Should clean it up a little.
 2016-06-01 12:15:33 +02:00
Sven Steinbauer
c58689bae1 Fixes for mov op for nz assembler (#5020) 
A number of fixes and updates to the `mov` command for the nz assembler
including:

* handling of `esp` register in more cases
* able to handle negative offsets for target register both byte and word
* able to handle negative offsets for target with immediate value as
        source, both byte and word
* refactor mov block of code to be more consistent (further work needed)
 2016-05-27 18:11:01 +02:00
Sven Steinbauer
76a4e0ca7a Add support for immediate word for sub (#5006) 
`nz` now generates the correct opcode when using a word as an immediate
in the `sub` instruction with a register + offset as the target

Also adds support for word register offsets and refactors that portion
of the code a little

For 32bit only so far
 2016-05-25 17:22:00 +02:00
Jeffrey Crowell
2a77791616 add 64bit xchg instruction 
still broken for the special case of xchg (E|R)ax, r(32|64)

but will add that next
 2016-05-24 15:13:37 +00:00
Anton Kochkov
f6b18bcb56 Fix CID 1356018 2016-05-24 08:54:39 +03:00
Sven Steinbauer
8da8ad740f Cleanup fixes 
* For commit comments and compiler errors
* Fixes for PR comments
* fix some "infer fixes" commits

Signed-off-by: Riccardo Schirone <sirmy15@gmail.com>
 2016-05-23 11:25:44 +02:00
Sven Steinbauer
599b6553e4 Infer fixes for asm 
Signed-off-by: Riccardo Schirone <sirmy15@gmail.com>
 2016-05-23 11:25:44 +02:00
pancake
7f6029f17c Fix OR x86.nz test 2016-05-18 11:17:26 +02:00
pancake
2fd754a76c Fix #4938 - Implement 'or REG, NUM' in the x86.nz assembler 2016-05-18 10:48:48 +02:00
pancake
22989f1ce9 Workaround for x86.nz inc [eax] 2016-05-14 10:59:54 +02:00
Sven Steinbauer
074b327c1c Fix #3644 : Add SIB addressing support to nz compiler 2016-05-13 11:45:54 +02:00
Sven Steinbauer
766b9ec4f0 Add support for dword offsets (#4825) 
* Add support for dword offsets to internal assembler

Internal assembler produces incorrect opcodes for offsets that were
greater than a short.

    rasm2 "mov eax, [eax + 1337]"
    8b8039

This adds support for values >127.

    rasm2 "mov eax, [eax + 1337]"
    8b8039050000

producing the same output as the `nasm` assembler.

* Fix support for negative short and dword offsets

Handle negative offsets for `mov` instructions both short and dword
sizes.

* Whitespace fixes

* Remove rogue character

Remove the reogue `:` that got into the code
 2016-05-09 15:25:20 +02:00
Sven Steinbauer
7c0b3eb64a Fix #4745 incorrect assembly for x86 mov (#4791) 2016-05-06 16:08:41 +02:00
Damien Zammit
632dccc217 Remove LIL_ENDIAN macro and configure option 
TODO: Remove other endian cruft from:
- hashing algs
- judy
- squashfs
- grub
- tms320

Signed-off-by: Damien Zammit <damien@zamaudio.com>
 2016-05-06 10:21:55 +02:00
Damien Zammit
af0a865d9f WIP - Totally remove host endianness dependence 
- Adds endian aware functions
- Removes references to host endian
- Uses binary detected endianness else tries LE and restricts by RAsmPlugin
- Fixes gdb debugger endianness when debugging BE qemu gdbserver

Signed-off-by: Damien Zammit <damien@zamaudio.com>
 2016-05-04 23:42:17 +10:00
Álvaro Felipe Melchor
149c7567ed improve arm/thumb detection for .so 2016-05-02 23:00:53 +02:00
pancake
e9dc4ae89e Fix #4695 - no prompt after r2 -qp 2016-04-26 19:11:11 +02:00
Christoph Sarnowski
145688a60a Fix tricore disasm buffer copy function 
- Did not take `memaddr' argument into account, resulting in wrong disassembly.
- Check boundaries
 2016-04-15 15:51:28 +02:00