Sven Steinbauer
599b6553e4
Infer fixes for asm
...
Signed-off-by: Riccardo Schirone <sirmy15@gmail.com>
2016-05-23 11:25:44 +02:00
pancake
7f6029f17c
Fix OR x86.nz test
2016-05-18 11:17:26 +02:00
pancake
2fd754a76c
Fix #4938 - Implement 'or REG, NUM' in the x86.nz assembler
2016-05-18 10:48:48 +02:00
Riccardo Schirone
5b92204c27
asm/arch/avr: do not print space if there are no operands
2016-05-17 13:18:23 +02:00
pancake
22989f1ce9
Workaround for x86.nz inc [eax]
2016-05-14 10:59:54 +02:00
Sven Steinbauer
074b327c1c
Fix #3644 : Add SIB addressing support to nz compiler
2016-05-13 11:45:54 +02:00
pancake
b4bb247791
Add nop for arm64 assembler
2016-05-10 11:22:13 +02:00
Sven Steinbauer
766b9ec4f0
Add support for dword offsets ( #4825 )
...
* Add support for dword offsets to internal assembler
Internal assembler produces incorrect opcodes for offsets that were
greater than a short.
rasm2 "mov eax, [eax + 1337]"
8b8039
This adds support for values >127.
rasm2 "mov eax, [eax + 1337]"
8b8039050000
producing the same output as the `nasm` assembler.
* Fix support for negative short and dword offsets
Handle negative offsets for `mov` instructions both short and dword
sizes.
* Whitespace fixes
* Remove rogue character
Remove the reogue `:` that got into the code
2016-05-09 15:25:20 +02:00
Damien Zammit
5e1ad580db
build: fix warnings
2016-05-08 12:21:11 +02:00
Sven Steinbauer
7c0b3eb64a
Fix #4745 incorrect assembly for x86 mov ( #4791 )
2016-05-06 16:08:41 +02:00
Damien Zammit
632dccc217
Remove LIL_ENDIAN macro and configure option
...
TODO: Remove other endian cruft from:
- hashing algs
- judy
- squashfs
- grub
- tms320
Signed-off-by: Damien Zammit <damien@zamaudio.com>
2016-05-06 10:21:55 +02:00
Damien Zammit
af0a865d9f
WIP - Totally remove host endianness dependence
...
- Adds endian aware functions
- Removes references to host endian
- Uses binary detected endianness else tries LE and restricts by RAsmPlugin
- Fixes gdb debugger endianness when debugging BE qemu gdbserver
Signed-off-by: Damien Zammit <damien@zamaudio.com>
2016-05-04 23:42:17 +10:00
Álvaro Felipe Melchor
149c7567ed
improve arm/thumb detection for .so
2016-05-02 23:00:53 +02:00
pancake
1f7db90e41
Priorize keystone plugins and other random changes
2016-05-02 02:46:01 +02:00
pancake
b417da6d4d
Add setarch/(from|to).string simplified RAsm APIs
2016-04-29 11:30:38 +02:00
Riccardo Schirone
26fc8f92ef
libr: remove some unused variables and functions
2016-04-27 12:59:45 +02:00
pancake
bfc8e5318e
More fixes from osx-ppc
2016-04-27 11:27:22 +02:00
pancake
e9dc4ae89e
Fix #4695 - no prompt after r2 -qp
2016-04-26 19:11:11 +02:00
kolen
a65ea77725
Fix 'ed' opcode range resulted in overflow
...
Should be:
40 41 .. 4a 4b
maps to
00 01 .. 0a 0b
Was:
3a 3b 3c 3d 3e 3f 40 41 .. 4a 4b
maps to
fa fb fc fd fe ff 00 01 .. 0a 0b
2016-04-21 15:33:26 +02:00
Christoph Sarnowski
145688a60a
Fix tricore disasm buffer copy function
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- Did not take `memaddr' argument into account, resulting in wrong disassembly.
- Check boundaries
2016-04-15 15:51:28 +02:00
NaveenBoggarapu
4c04b98b47
few memory leaks fixed
2016-04-13 21:55:48 +02:00
Travis Goodspeed
3ca3b4f534
This patch fixes a bug in which many MSP430 instructions would be mistaken for emulated instructions.
2016-04-12 23:11:14 +02:00
pancake
5ef2b3cc0f
Fix many warnings
2016-04-11 12:22:15 +02:00
Alexander Couzens
7c6ec5f146
fix mips forward assembler when using negative offset
...
Fix 'Invalid reg name (-0x5c60)' when try to assemble
'lw t9, -0x5c60(gp)'
2016-04-11 00:58:04 +02:00
pancake
4e0a71c0c3
Fix #4573 - fix oobread in java disassembler
2016-04-10 01:23:18 +02:00
pancake
3f7a70fb7d
Fix #4564 - oobread in dalvik disasm+analyzer
2016-04-10 01:12:58 +02:00
pancake
6f4518a247
Fix #4588 - uninit memory in m68k dis
2016-04-10 01:06:16 +02:00
pancake
eb99ec8580
Fix android build
2016-04-07 16:20:29 +02:00
Anton Kochkov
d558dec5b7
Fix CID 1353073
2016-04-05 12:38:34 +03:00
pancake
62195cc005
Fix #4502 - Implement blx for thumb
2016-04-05 00:15:45 +02:00
Anders Kaare
cb2d45e491
fixing m68k branch disasm bug
...
16bit displacement must be signed, but were unsigned. I've converted the
branch variants to 8/16/32bit signed casts rather than duplicating the
8bit ISBITSET() special case.
2016-04-04 21:27:06 +02:00
pancake
e8263655be
Fix more memleaks
2016-04-04 00:17:57 +02:00
pancake
9eb63df89f
Fix #4502 - Implement blx address for arm32 assembler
2016-04-03 17:35:52 +02:00
Evan Shaw
58328def22
Show absolute offsets for relative branches in SNES disassembly
...
This makes the disassembly easier to read.
2016-04-02 10:02:27 +02:00
Anders Kaare
ff21bb5fbf
fixing 6502 analysis
...
36e42b33fe37e922f132e286508bd88ef9fb137d broke analysis by introducing a
new enum value. The analysis code didn't switch on the enum but rather
used it directly as an integer, so since the new SNES_OP_IMM has 5 as
its integer value the analysis code would think that the op was 5 bytes
in length.
2016-03-30 22:08:52 +02:00
Léo Gaspard
353ff45443
Add EBC 'not' instruction decoding
2016-03-29 17:10:04 +02:00
Léo Gaspard
5c8a663e23
Identify external calls for EBC
2016-03-29 01:22:48 +02:00
Léo Gaspard
7595af19e3
Use decode_index32 for EBC calls
2016-03-29 01:22:48 +02:00
Léo Gaspard
ff4bce16db
Actually follow UEFI spec for index{32,64}
2016-03-29 01:22:48 +02:00
pancake
d629165ec8
Remove unnecessary = NULL in bin/p/*.c
2016-03-27 23:02:29 +02:00
pancake
9d62ee0ddf
Fix m68k.cs disassembler issue, honor asm.cpu in anal.m68k.cs
2016-03-24 16:21:49 +01:00
pancake
a461bbc536
Fix #4304 - asm.filter for m68k
2016-03-22 12:45:05 +01:00
pancake
76fa5bddcf
Add missing signature
2016-03-18 17:19:06 +01:00
pancake
446add902f
Fix #4345 - Add scas{bwd} for x86.nz
2016-03-18 16:59:47 +01:00
pancake
dc33b03011
Handle movk and movz in the arm64 assembler and pseudo disassembler
2016-03-17 17:26:08 +01:00
pancake
ae32acc5bc
Add missing space after commas in m68k
2016-03-15 11:59:19 +01:00
pancake
1c443caccf
Fix some COVs in snes disassembler
2016-03-13 21:04:12 +01:00
pancake
526d8d8e63
Fix #4275 - Fix lanai format string warnings
2016-03-13 03:23:54 +01:00
Evan Shaw
36e42b33fe
Support 16-bit immediate operands in SNES
...
Size for immediate operands depends on the value of the M flag
(for register A) or the X flag (for registers X and Y). A register is
8-bit when its respective flag is set and 16-bit when clear.
These flags can be set or unset independently, so this still isn't quite right
for when one flag is set and the other isn't, but it's an improvement. It's
possible to force a particular instruction to decode correctly by using the
`afh` command.
2016-03-12 03:06:46 +01:00
oddcoder
966900121d
adding bunch of another esil & fixing the bits
2016-03-09 15:32:50 +01:00
