1376 Commits

Author SHA1 Message Date
Wladimir J. van der Laan
78089cd34f riscv: Return actual instruction length
Support instructions of varying length.
Addresses #6849.
2017-02-26 23:06:32 +01:00
Maijin
266eee75ae Fix #6560 Unify Windows/Win32 define 2017-02-26 16:51:03 +01:00
alvarofe
f992370474 Fix some memory leaks after ht clean up 2017-02-25 23:50:33 +01:00
alvarofe
0b97b11d38 Fix regression on tms320 2017-02-24 23:42:17 +01:00
alvarofe
8ff55080ea Use ht_* in tms320 2017-02-24 23:42:17 +01:00
Sven Steinbauer
7d71bf5fa2 x86.nz infer bits from register names (#6792) 2017-02-15 11:49:35 +01:00
Sven Steinbauer
65791475ff Refactor msr mrs instructions 2017-02-10 13:11:14 +01:00
Sven Steinbauer
d5c9a65a97 Refactor exceptions 2017-02-10 13:11:14 +01:00
Sven Steinbauer
70a16f14df Refactor branch instructions 2017-02-10 13:11:14 +01:00
Sven Steinbauer
59aac1fdc4 Fix arithmetic op encoding 2017-02-10 13:11:14 +01:00
Sven Steinbauer
3480b9c799 Add lsl and shift to operand 2017-02-10 13:11:14 +01:00
Sven Steinbauer
cb36fd40cb refactor mov instructions 2017-02-10 13:11:14 +01:00
Sven Steinbauer
4ef134e5c4 Add parsing routines 2017-02-10 13:11:14 +01:00
Sven Steinbauer
f6120770eb Add ldrex strex to ARM assembler 2017-02-08 18:29:02 +01:00
Sven Steinbauer
6e9ae1772b Fix #6696 - Prevent infinite loop on visual assembler (#6709) 2017-02-08 12:31:15 +01:00
Sven Steinbauer
8847e121d7 x86.nz fixes enhancements (#6720)
* Fix group 1 assemble
Fix assembling of group 1 instructions
* add byte [0x452343], 0x34
* add byte [0x435341], al
* Add support for register based offsets
mov [eax + ecx], 0x33

* Fix lea with large values in second operand

* Add movsx and movzx ops
2017-02-07 17:26:35 +01:00
SchumBlubBlub
6c00c9e2d5 Reorganize string macros 2017-02-06 00:00:03 +01:00
pancake
bd25a763d8 Fix null deref and infinite loop when building with no plugins 2017-02-02 13:25:21 +01:00
pancake
5fa9601abe Implement add+sub for arm64 2017-01-29 14:48:13 +01:00
pancake
f64b082bd2 Implement adr instruction for the arm64 assembler 2017-01-29 14:08:04 +01:00
pancake
3c9e80372f Fix #6598 - r2pm db2 issue and add 2 arm64 bonus ops to the assembler 2017-01-29 03:44:18 +01:00
pancake
1627b990ad Add hvc and smc instructions in the arm64 assembler 2017-01-29 03:24:47 +01:00
pancake
196c800b87 Implement svc instruction for the arm64 assembler 2017-01-29 02:36:44 +01:00
Sven Steinbauer
4e73901e31 Add arm64 mov instruction (#6594)
Only handles immediates up to 32 at the moment.

FIX #6588
2017-01-27 20:49:34 +01:00
Álvaro Felipe Melchor
088c13ddad Fix UAF in cb_asmarch 2017-01-25 23:20:20 +01:00
pancake
d9fb5713db Fix racy set of asm.cpu and asm.arch 2017-01-24 13:57:17 +01:00
pancake
197443d42a asm.cpu=cortex required for arm (not by default) 2017-01-23 03:02:35 +01:00
Sven Steinbauer
7c49535f07 Add cmov* support to x86.nz (#6544) 2017-01-20 17:14:08 +01:00
pancake
9467d350cc nomclass is not for arm64 2017-01-18 15:14:31 +01:00
pancake
40f70bdf21 Fix #6400 - Properly set CS_MODE_MCLASS for Thumb 2017-01-17 18:25:48 +01:00
Sven Steinbauer
658241f038 Fix spp directive replacement 2017-01-17 15:24:04 +00:00
Sven Steinbauer
a8d3d5b996 Retire x86_olly to r2e (#6521) 2017-01-17 14:28:14 +00:00
Sven Steinbauer
4687135c5b Add asm directives help (-hh) and update manpage 2017-01-16 12:03:06 +01:00
pancake
2a83f21a3e Make gcc6 warnings happy 2017-01-15 22:02:57 +01:00
Sven Steinbauer
4fe5d34b44 Add comment for r_asm_from_string 2017-01-10 12:27:09 +00:00
Sven Steinbauer
58252b4cc2 Fix #6356 - Move spp integration to libr/asm.c
* Make spp parsing optional
* Add -p arg to rasm2
2017-01-10 00:57:49 +01:00
pancake
529c578487 Fix rax2 Ox (octal output) 2017-01-09 00:46:32 +01:00
Sven Steinbauer
583ca82dd9 ARM asm Fix #6436 (#6441)
Fix order of opcodes in comparison list to check against ands over and.
2017-01-07 01:45:10 +01:00
Sven Steinbauer
b517c80945 Fix check for al register (#6382)
Also check it's not memory. Move checks into own function.
2016-12-27 10:41:42 +01:00
Sven Steinbauer
8c30faf35c group1 instructions generate short opcodes FIX #6377 (#6378)
For group 1 instructions with AL for op1 and a constant for op2, nz will
now generate the shorter opcodes
2016-12-26 14:13:36 +01:00
pancake
130c22fc49 XOR assemble for x86.nz requires 2 parameters 2016-12-26 02:20:57 +01:00
pancake
d7240fac8e Fix latest covs 2016-12-22 16:13:49 +01:00
Álvaro Felipe Melchor
1a05aecaa4 Fix uaf in bin_dex.c and oob write in pi with dex 2016-12-19 19:41:10 +01:00
Álvaro Felipe Melchor
88d4649cc6 fix more coverities 2016-12-19 17:23:30 +01:00
pancake
50d73d1547 Fix a lot of memleaks, null derefs and undef behaviour thanks to clang-analyzer 2016-12-19 16:44:51 +01:00
pancake
9039228b58 Honor Q as an alias for q! in visual and prompt 2016-12-19 04:46:50 +01:00
pancake
2c5400e03e Fix more CIDs, memleaks mainly 2016-12-19 04:21:56 +01:00
Álvaro Felipe Melchor
a874de805e clean up code applying coding style 2016-12-15 21:04:27 +01:00
Gerardo García Peña
f40cbcee33 Set ATmega8 MCU by default. (#6291) 2016-12-08 01:22:54 +01:00
Álvaro Felipe Melchor
028e8f0ca3 Fix few covs 2016-12-04 22:26:17 +01:00