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Code Issues Actions 7 Packages Projects Releases Wiki Activity
18,705 Commits 45 Branches 118 Tags 261 MiB
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1794 Commits

Author SHA1 Message Date
Adrian
e154d759b3 cleanup sdb for 8051 2018-04-09 17:49:52 +02:00
wargio
afc9ecebff ppc descriptions first patch 2018-04-09 00:42:30 +02:00
pancake
52d31c66e7 Update PowerPC instruction descriptions 2018-04-08 21:08:34 +02:00
pancake
f24f44cf97 Update SPARC asm.describe 2018-04-08 20:19:56 +02:00
pancake
e94e54d695 Fix last covs and leak in izz 2018-04-05 10:49:36 +02:00
xarkes
c276ae6c54 Fixed smd/m68k issues (Fix #9790) 2018-04-03 13:19:13 +02:00
Paul I
ca3652da4b Meson: Add version info for shared libs (#9763) 2018-03-24 18:18:32 +01:00
Paul I
4e73ad7d19 Meson: some cleanup (#9753) 2018-03-23 07:47:46 +01:00
pancake
a880699409 Fix #9725 - Fix oobread overflow in disasm loop 2018-03-21 16:23:48 +01:00
pancake
251fe5b1e7 Fix last covs 2018-03-21 11:51:20 +01:00
vdf-git
2efb14af3a ARM Thumb/Const argcodes (#9730) 2018-03-20 17:06:37 +01:00
vdf-git
eb03a87d1a New implementation of opcodes a through C 2018-03-20 12:21:54 +01:00
pancake
fe7ae5d0af Fix last 20 coverity issues 2018-03-19 11:51:04 +01:00
pancake
560dc5d472 Fix crash in paadd [d,[,R,1d 2018-03-19 11:22:50 +01:00
Florian Märkl
94bdf5ce56 Enable xtensa in meson 
Fix r_anal_op() for anal_xtensa if ESIL is disabled

Fix anal_xtensa for Windows
 2018-03-16 11:10:15 +01:00
pancake
2682d34291 Fix warnings 2018-03-14 23:54:27 +01:00
pancake
023e4389ed Remove more udis86 references 2018-03-14 23:43:53 +01:00
pancake
3e8f8a2863 Move the asm and anal plugins for x86.udis to extras 
Available via r2pm -ci udis86
 2018-03-14 22:38:41 +01:00
vdf-git
42b5bbd882 Arm thumb/thumb selector for the armass (#9681) 
* added function to translate number to imm12
* added function to get thumb shifts easily
* added selector, newfangled implementation of adc
* add bitmask for command suffixes
* added new routine for parsing suffixes to opcodes. Error check added in getnum. Bugfixes.
 2018-03-14 13:07:03 +01:00
Paul I
69e655fd49 Meson: enable Propeller and Java (#9639) 2018-03-09 20:05:47 +08:00
vdf-git
5fa1b0d218 Arm assembler thumb/thumb shift (#9621) 2018-03-09 00:32:19 +01:00
vdf-git
b526d7af16 Added function to translate number to imm12 (#9604) 2018-03-07 09:39:29 +01:00
Sven Steinbauer
55a3dcaa1c Remove compiler warnings from nz (#9609) 
FIX #9592
 2018-03-06 21:50:04 +01:00
Paul I
9c0d682e60 Meson: Invoke python via <python3> module + some little fixes (#9594) 
* Meson: Invoke python via <python3> module

* Meson: Added version check

* Meson: Disable git output for capstone cloning command
 2018-03-06 08:28:40 +01:00
vdf-git
e85be034e3 solves issue #9524 (#9559) 2018-03-05 09:40:31 +01:00
Paul I
13f7013696 Meson: Added sdb building/installation rules (#9575) 2018-03-05 00:10:28 +01:00
Florian Märkl
5e1f811ec0 Fix meson indentation (#9567) 2018-03-03 22:08:37 +01:00
Florian Märkl
95a1b75784 Install Headers and .pc Files with Meson (#9548) 
Use meson pkgconfig for .pc files

meson 0.44

Install same headers as acr
 2018-03-03 20:00:18 +08:00
fergomatic
056d5ab859 tricore: added support for BOL format of st.b (#9474) 2018-02-23 09:13:54 +01:00
Anton Kochkov
0341b8455d Fix MSVC dynamic linking 2018-02-21 13:04:46 +08:00
Giovanni
0c776c0e71 warnings from lib (#9445) 2018-02-20 23:19:35 +01:00
pancake
0e372b9041 Make ,, an alias for \n in RAsm.massemble to make wa/pa nicer to use 2018-02-20 21:55:00 +01:00
Paul I
bb4f61580e Cleanup meson files (#9424) 2018-02-20 09:33:19 +01:00
Fangrui Song
320a2d5a58 Add FUNC_ATTR_USED and fix some warnings (#9413) 2018-02-17 20:19:33 -06:00
StefanBruens
9d92c2d2f0 Consolidate thumb BL and BLX, simplify, bugfix (#9391) 
Encoding for BL and BLX with immediate offset is identical, only
difference is the opcode in the second half of the instruction pair.

Use r_num_math instead of getnum, as the latter does not work correctly
for large arguments (>= 0x80000000).

Simplify logic for 16 bit aligned origin addresses. In case the origin
is not 32 bit aligned copy bit[1] to the target address (which is masked
by the decoder) and calculate the offset based on the modified address.

Using the same implementaton also fixes the missing offset handling in BL.

Fix for #9319
 2018-02-14 15:08:00 -06:00
Michael Scherer
8c683eab91 Add REV and others to Rasm2, related to bug #7250 (#9365) 2018-02-12 16:09:31 +01:00
Giovanni
e46939eb4f merged fixes from contributor to libvle (#9380) 2018-02-12 16:09:19 +01:00
Giuseppe
1e9bce4a8d Fix #9197 - aarch64 ldur instruction was missing (#9372) 2018-02-11 20:44:52 +01:00
Michael Scherer
b35f936b73 Fix first parameter position for CLZ asm code (#9364) 
Fix error in 4b74942
 2018-02-10 20:44:08 +01:00
Michael Scherer
4b7494252e Add CLZ instruction to rasm2 (#9363) 
Partially fix #7250
 2018-02-10 19:24:34 +01:00
Sven Steinbauer
1b60dbd9e2 Correctly assemble blx for arm32 and arm16 (#9352) 
FIX #9319

Tests added to r2r master
 2018-02-09 15:27:39 +01:00
pancake
05915305a0 Fix build 2018-02-09 12:10:35 +01:00
Giovanni
782c448c1e non compliant x86 instructions disasm for VM environment (#9350) 2018-02-09 03:49:09 +01:00
Anton Kochkov
9aabb06939
Enable hexagon for Windows builds (#9337) 2018-02-07 14:57:32 +08:00
pancake
6ba461f1c1 Fix memleak in massemble 2018-02-06 14:34:41 +01:00
Anton Kochkov
56e5012142 Fix hexagon duplexes recognition 2018-02-06 12:51:53 +08:00
Anton Kochkov
129b1ced20 Fix GCC parentheses warnings 2018-02-06 12:47:38 +08:00
Anton Kochkov
1b73ae0777
Fix Hexagon OOB problem 2018-02-05 18:50:11 +08:00
Anton Kochkov
a3153a4801
Fix Hexagon OOB problem 2018-02-05 18:39:46 +08:00
Anton Kochkov
efcc2bef68 Hexagon QDSP6 v6 support - LGPLv3 (#9289) 2018-02-02 13:10:40 +01:00
Sven Steinbauer
d304cef875 Add support for mul ops (#9281) 2018-02-01 15:38:25 +01:00
Sven Steinbauer
adc13ded07 Fix #6512 - Implemented .incbin 
* User RBuf for storing incbin data

The incbin data is stored in an rbuffer and then appended to the output
which is reallocated to allow for addition of the inc data.

Refactoring buf_hex to be an rbuffer is ideal, but would need
refactoring in multiple places in the future.
 2018-01-31 11:19:29 +01:00
ampotos
1742fe8f1d fix asm be thumb assembly by armass #9219 (#9271) 2018-01-31 09:50:30 +01:00
Adrian Studer
02997bfaa2 8051: added configurable mapping of address spaces (#9275) 2018-01-31 09:48:25 +01:00
pancake
2a3246e20b Fix jmp asm bounds 2018-01-28 22:11:15 +01:00
pancake
b97360807f Fix #9246 - Error when trying to assemble an invalid jmp address 2018-01-28 19:12:58 +01:00
pancake
ce11904471 Fix mov dx assembler on 16bit mode 2018-01-26 10:17:05 +01:00
fenugrec
a010d09204 sh: fix disassembly of branch opcodes (#9238) 
The displacement field must be sign-extended and multiplied by 2, not
cast to an unsigned type !
 2018-01-25 16:25:00 +01:00
pancake
6b6ff20ca9 Quick fix out for x86.nz assembler 2018-01-24 18:06:27 +01:00
pancake
5642883db9 Initial rework of sysregs 2018-01-24 15:12:33 +01:00
Maijin
5ff5a67643
AVR default CPU ATmega8 to avoid regressions 2018-01-21 19:16:53 +01:00
Maijin
bf1fb2d31f Expose all the AVR cpu in e asm.cpu 2018-01-21 16:38:41 +01:00
emvivre
0104b092fc Add VMPTRST operator for x86 assembler (Store Pointer to Virtual-Machine Control Structure) (#9208) 2018-01-17 01:14:21 +01:00
pancake
31d550a54b Introduce r_sys_prefix 2018-01-16 11:58:47 +01:00
pancake
303820dbac Initial purge of R2_PREFIX towards dir.prefix 2018-01-16 11:13:21 +01:00
emvivre
de23ede7ca Add VMPTRLD operator for x86 assembler (Load Pointer to Virtual-Machine Control Structure) (#9203) 2018-01-16 09:55:24 +01:00
emvivre
94eb5a289d Add VMXON operator for x86 assembler (Enter VMX Operation) (#9195) 2018-01-14 19:37:10 +01:00
Giovanni
9a63f43d01 Fixed illegal access on libps (#9192) 2018-01-14 17:55:05 +01:00
wargio
ddb5fd0575 fixed bad load/store for ppc:ps 2018-01-14 10:18:39 +01:00
emvivre
82a911781f Add VMCLEAR operator for x86 assembler (Clear Virtual-Machine Control Structure) 2018-01-13 20:33:32 +01:00
emvivre
da058608bd Add VERR/VERW operator for x86 assembler (Verify a Segment for Reading or Writing) 2018-01-13 10:07:39 +01:00
whitequark
c816dc7e66 Don't try to build shared libraries if configured as --without-pic. 
Specifically, avoid building all plugins as non-static objects,
as well as some supplementary libraries. In fact, a large amount
of plugins was already gated to build as shared objects only with
WITHPIC=1, but this was not done consistently.
This gating has been moved to */p/Makefile.

Building these shared objects is a waste of time and breaks
the --without-pic build unless CFLAGS is forced in the make
invocation.
 2018-01-11 23:09:22 +01:00
emvivre
fa942fdc8b Add some operators for x86 assembly (SIDT, SLDT, SMSW). (#9176) 
* Add SIDT operator for x86 assembler (Store Interrupt Descriptor Table Register)
* Add SLDT operator for x86 assembler (Store Local Descriptor Table Register)
* Add SMSW operator for x86 assembler (Store Machine Status Word)
 2018-01-11 23:07:42 +01:00
emvivre
fbe2063e0c Add new operators to x86 assembly (SGDT, STMXCSR, STR). (#9171) 
* Add SGDT operator for x86 assembler (Store Global Descriptor Table Register)
* Add STMXCSR operator for x86 assembler (Store MXCSR Register State)
* Add STR operator for x86 assembler (Store Task Register)
 2018-01-11 21:59:37 +01:00
Giovanni
f32cc2777a added ppc Paired single (#9172) 2018-01-11 14:07:30 +01:00
emvivre
a3f7ce2336 Add several operators for x86 assembly (LLDT, LMSW, LGDT/LIDT) (#9165) 
* Add LLDT operator for x86 assembler (Load Local Descriptor Table Register)

* Add LMSW operator for x86 assembler (Load Machine Status Word)

* Add LGDT/LIDT operator for x86 assembler (Load Global/Interrupt Descriptor Table Register)
 2018-01-09 20:17:28 +01:00
emvivre
3d6584f934 Add several float operators for x64 assembly (FSTCW/FNSTCW, FSTSW/FNSTSW, FSAVE/FNSAVE) (#9154) 
* Add FSTCW/FNSTCW operator for x86 assembler (Store x87 FPU Control Word)

* Add FSTSW/FNSTSW operator for x86 assembler (Store x87 FPU Status Word)

* Fix some issues of float instructions for x86 assembler.

* Add FSAVE/FNSAVE operator for x86 assembler (Store x87 FPU State)
 2018-01-09 10:38:54 +01:00
pancake
06311f718b Fix #9126 - Bring back the good old LEA syntax 2018-01-08 14:17:52 +01:00
pancake
6b00784cb1 Add more priviledged arm64 instruction types and opcode descriptions 2018-01-08 11:21:48 +01:00
pancake
335938be58 r_str_chop -> r_str_trim 2018-01-08 03:22:26 +01:00
emvivre
28918381e9 Add FSUBR/FSUBRP/FISUBR operator for x86 assembler (Reverse Subtract) 2018-01-07 20:40:05 +01:00
emvivre
ab3ff60f2e Add FSUB/FSUBP/FISUB operator for x86 assembler (Subtract) 2018-01-07 20:40:05 +01:00
emvivre
65a71bcaed Add FMUL/FMULP/FIMUL operator for x86 assembler (Multiply) 2018-01-07 20:40:05 +01:00
emvivre
ae36701d6c Add FDIVR/FDIVRP/FIDIVR operator for x86 assembler (Reverse Divide) 2018-01-07 20:40:05 +01:00
emvivre
a8bd708a39 Add FDIV/FDIVP/FIDIV operator for x86 assembler (Divide) 2018-01-07 20:40:05 +01:00
pancake
c1ef0d7580 Fix dsb, dmb regressions 2018-01-07 13:54:38 +01:00
Sven Steinbauer
9e516fe6dc Fix clflush to work with r/m mod 2018-01-07 04:02:35 +01:00
Sven Steinbauer
ea9492b660 Remove compiler warnings 2018-01-07 04:02:35 +01:00
emvivre
5abaf1dc66 Add others operators related to float operations for x86 assembly (FBLD, FBSTP, FXRSTOR, FXSAVE, FIST/FISTP, FISTTP, FSTENV/FNSTENV) (#9137) 
* Add FBLD operator for x86 assembler (Load Binary Coded Decimal)

* Add FBSTP operator for x86 assembler (Store BCD Integer and Pop)

* Add FXRSTOR operator for x86 assembler (Restore x87 FPU, MMX Technology, SSE, SSE2, and SSE3 State)

* Add FXSAVE operator for x86 assembler (Save x87 FPU, MMX Technology, SSE, and SSE2 State)

* Add FIST/FISTP operator for x86 assembler (Store Integer)

* Add FISTTP operator for x86 assembler (Store Integer with Truncation)

* Add FSTENV/FNSTENV operator for x86 assembler (Store x87 FPU Environment)
 2018-01-07 04:01:31 +01:00
pancake
1bc0fcdea5 Implement isb, dsb and dmb for the arm64 assembler 2018-01-05 00:45:50 +01:00
emvivre
dbd5b68b22 Add FLDENV operator for x86 assembler (Load x87 FPU Environment) 2018-01-05 00:29:30 +01:00
emvivre
1d99f9e778 Add FLDCW operator for x86 assembler (Load x87 FPU Control Word) 2018-01-05 00:29:30 +01:00
emvivre
346d6b9ad9 Add FILD operator for x86 assembler (Load Integer) 2018-01-05 00:29:30 +01:00
emvivre
e12b788a51 Add FICOM/FICOMP operator for x86 assembler (Compare Integer) 2018-01-05 00:29:30 +01:00
emvivre
2915c54b57 Add FADD/FADDP/FIADD operator for x86 assembler (Add) 2018-01-05 00:29:30 +01:00
Lowly Worm
7260de3496 add support for clflush instruction to nz 2018-01-04 14:10:43 -05:00
pancake
b06d57a068 Fix avr build with meson 2018-01-04 18:46:35 +01:00
pancake
1d7f75fb91 Fix non-null terminated string issue in 8051 disassembler 2018-01-04 18:39:17 +01:00
emvivre
0e9ae8deb0 Add more checking on the operands type of some instuctions in the x86 assembler. 2018-01-04 01:24:08 +01:00
emvivre
c999058e01 Add FXCH operator for x86 assembler (Exchange Register Contents) 2018-01-04 01:24:08 +01:00