- Support for aap (function preludes with pacibsp)
- Handle LDURSW properly
- Define op->type for PAC instructions (not just family)
- Add more asm descriptions for pac instructions
In line 694 a buffer of size (sizeof(char*)*32) is allocated. Later on,
this buffer is realloced to 64. This decreases the size of the allocated
buffer instead of increase. This may lead to memory corruption.
Notes:
* SH opcodes array, file libr/asm/arch/sh/gnu/sh-dis.c from GNU binutils, defines "bf.s" and "bf/s", same with "bt.s" and "bt/s".
* Both pairs are identical, e.g. bt.s and bt/s mean the same thing.
* As *.s variants come first in the table, radare and binutils-objdump print bf.s and bt.s names.
* Still true for latest binutils (v2.32 2019-02-02).
* Renesas chip hardware manuals and IDA Pro only use bf/s and bt/s.
* Reimplement r_buf_fread/fwrite
* Add slice buffer and introduce readonly field
* Do nothing if size is 0
* Prevents an overflow when 8 is subtracted from size.
* Fix ragg2 when patching outside currently existing buffer
* Implement r_mem_mmap_resize for systems where mremap is not defined
* r_buf_buffer can be called with no size arg as well
* Use size_t instead of ut64
* SP was declared as 'sp' in the register profile which doesn't exist. Stack pointer is a7.
* Most C compilers for m68k (e.g. LatticeC) use a6 as stack frame pointer via LINK and UNLK instructions, declare a6 as BP
- Fill op->jump and op->fail for all branch and jump instructions
- Handle short and word variants of BSR (BSR.S and BSR.W)
- DBxx instructions treated as conditional branches
- Handle PC relative variant of JMP & JSR
- Bugfix for the decoding of long instructions (code in asm_m68k_cs.c assumed a maximum of 8 bytes, but maximum is 10 bytes)
