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123 lines
4.6 KiB
Plaintext
123 lines
4.6 KiB
Plaintext
adc=add with carry
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add=add two values
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adds=add two values and update flags
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addeq=add two values if Z set (equal)
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addne=add two values if Z clear (not equal)
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and=logical AND
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ands=logical AND that updates flags
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andeq=logical AND if Z set (equal)
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andne=logical AND if Z clear (not equal)
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b=branches the program counter to dst (pc aka r15)
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bcc=branch if C clear (no carry)
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bcs=branch if C set (carry)
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beq=branches if equal (see 'b') Z is set
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bge=branch if N clear and V clear
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bgt=branch if Z, N and V clear
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bhi=branch if C set and Z clear
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bic=logical bit clear
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bl=branches and link, similar to call in i386, set lr(r14) = pc, changes pc (r15) )
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ble=branch if (Z || (N && V)) or !N && V) or !N && V
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bls=branch if C clear or Z set
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blt=branch if N clear and V set
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blx=branch link and optionally exchange to Thumb
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bmi=branch if N set
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bne=branch if Z clear (not equal)
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bpl=branch if N clear
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bvc=branch if V clear
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bvs=branch if V set
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bx=branches and exchanges cpu mode to 16 bits (thumb mode)
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bxj=branches and exchanges cpu mode to Jazzele (jumps to a bytecode vector)
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cdp=coprocessor data operations
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cmn=compare negated
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cmp=compare
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cmp=compares two registers
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cps=change processor state
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eor=logical exclusive OR (XOR)
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eors=logical exclusive OR (XOR) and update flags
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eoreq=logical exclusive OR (XOR) if Z set (equal)
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eorne=logical exclusive OR (XOR) if Z clear (not equal)
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flt=armfpu: convert int to float: flt
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ldc=load from memory to coprocessor
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ldf=armfpu: load float value pointed by reg+(offset): ldf f0, [r0,#off]
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ldm.w=load multiple words from memory into registers
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ldmda=decrement after
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ldmdb=decrement before
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ldmia=incrememnt after
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ldmib=increment before
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ldr=load from memory to register
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ldr.w=load from memory to register
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ldrb=load byte from memory to register
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ldrb.w=load from memory to register
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ldreq=load from memory to register if Z set (equal)
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ldrne=load from memory to register if Z clear (not equal)
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mcr=move to coprocessor from ARM register
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mcrr=move to coprocessor from two ARM register
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mov.w=move 3byte immediate into register
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mov=move value between registers
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movs=move immediate into register and update flags
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asr=arithmetic shift right
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asrs=arithmetic shift right and update flags
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movt=write 16 bit value on top of halfword
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movw=write 16 bit value on lower bits
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orr=logical inclusive OR
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orrs=logical inclusive OR and update flags
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orreq=logical inclusive OR if Z set (equal)
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orrne=logical inclusive OR if Z clear (not equal)
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rfe=return from exception (loads pc+cpsr)
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rsb=reverse substract
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rsc=reverse substract with carry
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sbc=substract with carry
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sbfx=signed bit field extract
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srs=store return state
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stc=store coprocessor register
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stc=store from coprocessor to memory
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stf=armfpu: store float value pointed by reg+(offset): ldf [r0,#off]
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str=store register into memory
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strb=store byte value in register into memory
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strb.w=store byte value in register into memory
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strh=store byte value in register into memory
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strh.w=store byte value in register into memory
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strd=store floating point value in memory
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streq=store register into memory if Z set (equal)
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strne=store register into memory if Z clear (not equal)
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sub=substract two values
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subs=substract two values and update flags
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lsr=logical shift right
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lsrs=logical shift right and update flags
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subeq=substract two values if Z set (equal)
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subne=substract two values if Z clear (not equal)
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svc=supervisor call
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teq=test equivalence
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tst.w=logical AND register value with 12-bit immediate value
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tst=test
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ubfx=unsigned bit field extract
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uxtab16=zero extend bytes to halfwords add halfwords
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uxtab=zero extend byte to word, add
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vadd=vector add
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vsri=vector shift right and insert
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wfs=armfpu: write fp status register. wfs r0
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cpsie=like msr, but only enable interrupts (i or f)
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cpsid=like msr, but only disable interrupts (i or f)
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uxth=extracts bits[15:0] and zero extends to 32 bits.
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sxth=extracts bits[15:0] and sign extends to 32 bits.
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uxtb=extracts bits[7:0] and zero extends to 32 bits.
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sxtb=extracts bits[7:0] and sign extends to 32 bits.
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pop=load N elements from stack into given registers
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vldmia=vector load memory into paired registers
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pop.w=load N words from stack into registers
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it=if then
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bics=Bitwise bit clear (shifted register), setting the condition flags.
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bics.w=word bitwise bit clear and update flags
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udiv=unsigned division
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sdiv=signed division
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mul=multiply
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mla=multiply and accumulate
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mls=multiply and substract
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rsbs=subtracts the value from zero, producing the arithmetic negative of the value, and updates flags
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rsbs.w=substract the negative value
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uxtab=zero extend Byte and Add. Extends an 8-bit value to a 32-bit value.
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uxtb.w=zero textend word and add, extend to 32bit value
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wfi=wait for interrupt
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wfe=wait for event
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yield=alias for hint instructrion
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