mirror of
https://github.com/radareorg/radare2.git
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1b5a746786
* add more fixes to msvc build * more fixes
225 lines
5.4 KiB
C
225 lines
5.4 KiB
C
/* radare2 - LGPL - Copyright 2017 - pancake */
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#include <r_anal.h>
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#include <r_lib.h>
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#include <capstone/capstone.h>
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#ifdef CAPSTONE_TMS320C64X_H
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#define CAPSTONE_HAS_TMS320C64X 1
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#else
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#define CAPSTONE_HAS_TMS320C64X 0
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#warning Cannot find capstone-tms320c64x support
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#endif
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#if CS_API_MAJOR < 2
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#undef CAPSONT_HAS_TMS320C64X
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#define CAPSTONE_HAS_TMS320C64X 0
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#endif
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#if CAPSTONE_HAS_TMS320C64X
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#define esilprintf(op, fmt, ...) r_strbuf_setf (&op->esil, fmt, __VA_ARGS__)
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#define INSOP(n) insn->detail->tms320c64x.operands[n]
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#define INSCC insn->detail->tms320c64x.cc
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static void opex(RStrBuf *buf, csh handle, cs_insn *insn) {
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int i;
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r_strbuf_init (buf);
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r_strbuf_append (buf, "{");
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cs_tms320c64x *x = &insn->detail->tms320c64x;
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r_strbuf_append (buf, "\"operands\":[");
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for (i = 0; i < x->op_count; i++) {
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cs_tms320c64x_op *op = &x->operands[i];
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if (i > 0) {
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r_strbuf_append (buf, ",");
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}
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r_strbuf_append (buf, "{");
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switch (op->type) {
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case TMS320C64X_OP_REG:
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r_strbuf_append (buf, "\"type\":\"reg\"");
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r_strbuf_appendf (buf, ",\"value\":\"%s\"", cs_reg_name (handle, op->reg));
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break;
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case TMS320C64X_OP_IMM:
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r_strbuf_append (buf, "\"type\":\"imm\"");
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r_strbuf_appendf (buf, ",\"value\":%"PFMT64d, op->imm);
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break;
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case TMS320C64X_OP_MEM:
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r_strbuf_append (buf, "\"type\":\"mem\"");
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if (op->mem.base != SPARC_REG_INVALID) {
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r_strbuf_appendf (buf, ",\"base\":\"%s\"", cs_reg_name (handle, op->mem.base));
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}
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r_strbuf_appendf (buf, ",\"disp\":%"PFMT64d"", op->mem.disp);
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break;
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default:
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r_strbuf_append (buf, "\"type\":\"invalid\"");
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break;
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}
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r_strbuf_append (buf, "}");
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}
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r_strbuf_append (buf, "]}");
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}
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static int tms320c64x_analop(RAnal *a, RAnalOp *op, ut64 addr, const ut8 *buf, int len) {
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static csh handle = 0;
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static int omode;
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cs_insn *insn;
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int mode = 0, n, ret;
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if (mode != omode) {
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cs_close (&handle);
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handle = 0;
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omode = mode;
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}
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if (handle == 0) {
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ret = cs_open (CS_ARCH_TMS320C64X, mode, &handle);
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if (ret != CS_ERR_OK) {
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return -1;
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}
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cs_option (handle, CS_OPT_DETAIL, CS_OPT_ON);
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}
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op->type = R_ANAL_OP_TYPE_NULL;
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op->size = 0;
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op->delay = 0;
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op->jump = UT64_MAX;
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op->fail = UT64_MAX;
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op->val = UT64_MAX;
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op->ptr = UT64_MAX;
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r_strbuf_init (&op->esil);
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// capstone-next
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n = cs_disasm (handle, (const ut8*)buf, len, addr, 1, &insn);
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if (n < 1) {
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op->type = R_ANAL_OP_TYPE_ILL;
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} else {
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opex (&op->opex, handle, insn);
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op->size = insn->size;
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op->id = insn->id;
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switch (insn->id) {
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case TMS320C64X_INS_INVALID:
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op->type = R_ANAL_OP_TYPE_ILL;
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break;
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case TMS320C64X_INS_AND:
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case TMS320C64X_INS_ANDN:
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op->type = R_ANAL_OP_TYPE_AND;
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break;
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case TMS320C64X_INS_NOT:
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op->type = R_ANAL_OP_TYPE_NOT;
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break;
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case TMS320C64X_INS_NEG:
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op->type = R_ANAL_OP_TYPE_NOT;
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break;
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case TMS320C64X_INS_SWAP2:
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case TMS320C64X_INS_SWAP4:
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op->type = R_ANAL_OP_TYPE_MOV;
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op->type = R_ANAL_OP_TYPE_MOV;
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break;
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case TMS320C64X_INS_BNOP:
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case TMS320C64X_INS_NOP:
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op->type = R_ANAL_OP_TYPE_NOP;
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break;
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case TMS320C64X_INS_CMPEQ:
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case TMS320C64X_INS_CMPEQ2:
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case TMS320C64X_INS_CMPEQ4:
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case TMS320C64X_INS_CMPGT:
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case TMS320C64X_INS_CMPGT2:
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case TMS320C64X_INS_CMPGTU4:
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case TMS320C64X_INS_CMPLT:
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case TMS320C64X_INS_CMPLTU:
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op->type = R_ANAL_OP_TYPE_CMP;
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break;
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case TMS320C64X_INS_B:
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op->type = R_ANAL_OP_TYPE_JMP;
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// higher 32bits of the 64bit address is lost, lets clone
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op->jump = INSOP(0).imm + (addr & 0xFFFFFFFF00000000);
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break;
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case TMS320C64X_INS_LDB:
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case TMS320C64X_INS_LDBU:
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case TMS320C64X_INS_LDDW:
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case TMS320C64X_INS_LDH:
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case TMS320C64X_INS_LDHU:
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case TMS320C64X_INS_LDNDW:
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case TMS320C64X_INS_LDNW:
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case TMS320C64X_INS_LDW:
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case TMS320C64X_INS_LMBD:
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op->type = R_ANAL_OP_TYPE_LOAD;
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break;
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case TMS320C64X_INS_STB:
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case TMS320C64X_INS_STDW:
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case TMS320C64X_INS_STH:
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case TMS320C64X_INS_STNDW:
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case TMS320C64X_INS_STNW:
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case TMS320C64X_INS_STW:
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op->type = R_ANAL_OP_TYPE_STORE;
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break;
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case TMS320C64X_INS_OR:
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op->type = R_ANAL_OP_TYPE_OR;
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break;
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case TMS320C64X_INS_SSUB:
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case TMS320C64X_INS_SUB:
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case TMS320C64X_INS_SUB2:
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case TMS320C64X_INS_SUB4:
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case TMS320C64X_INS_SUBAB:
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case TMS320C64X_INS_SUBABS4:
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case TMS320C64X_INS_SUBAH:
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case TMS320C64X_INS_SUBAW:
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case TMS320C64X_INS_SUBC:
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case TMS320C64X_INS_SUBU:
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op->type = R_ANAL_OP_TYPE_SUB;
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break;
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case TMS320C64X_INS_ADD:
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case TMS320C64X_INS_ADD2:
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case TMS320C64X_INS_ADD4:
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case TMS320C64X_INS_ADDAB:
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case TMS320C64X_INS_ADDAD:
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case TMS320C64X_INS_ADDAH:
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case TMS320C64X_INS_ADDAW:
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case TMS320C64X_INS_ADDK:
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case TMS320C64X_INS_ADDKPC:
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case TMS320C64X_INS_ADDU:
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case TMS320C64X_INS_SADD:
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case TMS320C64X_INS_SADD2:
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case TMS320C64X_INS_SADDU4:
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case TMS320C64X_INS_SADDUS2:
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op->type = R_ANAL_OP_TYPE_ADD;
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break;
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}
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cs_free (insn, n);
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}
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return op->size;
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}
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static int archinfo(RAnal *anal, int q) {
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return 4; /* :D */
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}
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#endif
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/*
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RAnalPlugin r_anal_plugin_tms320c64x = {
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.name = "tms320c64x",
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.desc = "Capstone TMS320C64X analysis",
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.license = "BSD",
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.arch = "tms320c64x",
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.bits = 32,
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.archinfo = archinfo,
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.op = &analop
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};
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#else
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RAnalPlugin r_anal_plugin_tms320c64x = {
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.name = "tms320c64x",
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.desc = "Capstone TMS320C64X analysis (unsupported)",
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.license = "BSD",
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.arch = "tms320c64x",
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.bits = 32
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};
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#endif
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#ifndef CORELIB
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RLibStruct radare_plugin = {
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.type = R_LIB_TYPE_ANAL,
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.data = &r_anal_plugin_tms320c64x,
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.version = R2_VERSION
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};
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#endif
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*/
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