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https://github.com/radareorg/radare2.git
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10d1df6dd2
* riscv: Update opcodes from binutils-gdb Update to riscv opcodes from [riscv-binutils-gdb](https://github.com/riscv/riscv-binutils-gdb/commit/08219b2) git 08219b2. * riscv: set no_alias=false while disassembling I'm not sure what the rationale was for setting no_alias to true originally. But setting it to false means that shorter and (usually) better readable aliases for instructions will be shown: Before | After ---------------------+------------ `c.jr ra` | `ret` `addi a5, zero, 123` | `li a5,123` `jal zero, 0x101dc` | `j 0x101dc` And so on.
333 lines
8.8 KiB
C
333 lines
8.8 KiB
C
/* RISC-V disassembler
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Copyright 2011-2015 Free Software Foundation, Inc.
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Contributed by Andrew Waterman (waterman@cs.berkeley.edu) at UC Berkeley.
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Based on MIPS target.
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This file is part of the GNU opcodes library.
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This library is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 3, or (at your option)
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any later version.
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It is distributed in the hope that it will be useful, but WITHOUT
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ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
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or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
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License for more details.
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You should have received a copy of the GNU General Public License
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along with this program; see the file COPYING3. If not,
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see <http://www.gnu.org/licenses/>.
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- Code changes to make r2 friendly (qnix@0x80.org)
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*/
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#include <stdio.h>
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#include <stdlib.h>
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#include <stdint.h>
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#include <ctype.h>
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#include <stdarg.h>
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#include <r_asm.h>
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#include <r_lib.h>
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#include <string.h>
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#include "riscv-opc.h"
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#include "riscv.h"
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#define ARRAY_SIZE(a) (sizeof(a) / sizeof(*a))
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// TODO : an conf to chose between abi or numeric
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static const char * const *riscv_gpr_names = riscv_gpr_names_abi;
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static const char * const *riscv_fpr_names = riscv_fpr_names_abi;
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static int init = 0;
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static void arg_p (char *buf, unsigned long val, const char* const* array, size_t size) {
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const char *s = val >= size || array[val] ? array[val] : "unknown";
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sprintf (buf+strlen (buf), "%s", s);
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}
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/* Print insn arguments for 32/64-bit code. */
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static void get_insn_args (char *buf, const char *d, insn_t l, uint64_t pc) {
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int rs1 = (l >> OP_SH_RS1) & OP_MASK_RS1;
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int rd = (l >> OP_SH_RD) & OP_MASK_RD;
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uint64_t target;
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if (*d != '\0') {
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sprintf (buf+strlen (buf), " ");
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}
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for (; *d != '\0'; d++) {
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switch (*d) {
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/* Xcustom */
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case '^':
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switch (*++d) {
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case 'd':
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sprintf (buf+strlen (buf), "%d", rd);
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break;
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case 's':
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sprintf (buf+strlen (buf), "%d", rs1);
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break;
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case 't':
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sprintf (buf+strlen (buf), "%d", (int) EXTRACT_OPERAND (RS2, l));
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break;
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case 'j':
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sprintf (buf+strlen (buf), "%d", (int) EXTRACT_OPERAND (CUSTOM_IMM, l));
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break;
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}
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break;
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case 'C': /* RVC */
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switch (*++d) {
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case 's': /* RS1 x8-x15 */
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case 'w': /* RS1 x8-x15 */
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sprintf (buf+strlen (buf), "%s",
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riscv_gpr_names[EXTRACT_OPERAND (CRS1S, l) + 8]);
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break;
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case 't': /* RS2 x8-x15 */
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case 'x': /* RS2 x8-x15 */
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sprintf (buf+strlen (buf), "%s",
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riscv_gpr_names[EXTRACT_OPERAND (CRS2S, l) + 8]);
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break;
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case 'U': /* RS1, constrained to equal RD */
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sprintf (buf+strlen (buf), "%s", riscv_gpr_names[rd]);
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break;
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case 'c': /* RS1, constrained to equal sp */
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sprintf (buf+strlen (buf), "%s", riscv_gpr_names[X_SP]);
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break;
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case 'V': /* RS2 */
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sprintf (buf+strlen (buf), "%s",
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riscv_gpr_names[EXTRACT_OPERAND (CRS2, l)]);
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break;
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case 'i':
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sprintf (buf+strlen (buf), "%d", (int)EXTRACT_RVC_SIMM3 (l));
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break;
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case 'j':
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sprintf (buf+strlen (buf), "%d", (int)EXTRACT_RVC_IMM (l));
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break;
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case 'k':
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sprintf (buf+strlen (buf), "%d", (int)EXTRACT_RVC_LW_IMM (l));
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break;
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case 'l':
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sprintf (buf+strlen (buf), "%d", (int)EXTRACT_RVC_LD_IMM (l));
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break;
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case 'm':
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sprintf (buf+strlen (buf), "%d", (int)EXTRACT_RVC_LWSP_IMM (l));
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break;
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case 'n':
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sprintf (buf+strlen (buf), "%d", (int)EXTRACT_RVC_LDSP_IMM (l));
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break;
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case 'K':
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sprintf (buf+strlen (buf), "%d", (int)EXTRACT_RVC_ADDI4SPN_IMM (l));
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break;
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case 'L':
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sprintf (buf+strlen (buf), "%d", (int)EXTRACT_RVC_ADDI16SP_IMM (l));
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break;
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case 'M':
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sprintf (buf+strlen (buf), "%d", (int)EXTRACT_RVC_SWSP_IMM (l));
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break;
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case 'N':
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sprintf (buf+strlen (buf), "%d", (int)EXTRACT_RVC_SDSP_IMM (l));
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break;
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case 'p':
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target = EXTRACT_RVC_B_IMM (l) + pc;
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sprintf (buf+strlen (buf), "0x%"PFMT64x, (ut64) target);
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break;
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case 'a':
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target = EXTRACT_RVC_J_IMM (l) + pc;
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sprintf (buf+strlen (buf), "0x%"PFMT64x, (ut64)target);
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break;
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case 'u':
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sprintf (buf+strlen (buf), "0x%x",
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(int) (EXTRACT_RVC_IMM (l) & (RISCV_BIGIMM_REACH-1)));
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break;
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case '>':
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sprintf (buf+strlen (buf), "0x%x", (int) EXTRACT_RVC_IMM (l) & 0x3f);
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break;
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case '<':
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sprintf (buf+strlen (buf), "0x%x", (int) EXTRACT_RVC_IMM (l) & 0x1f);
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break;
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case 'T': /* floating-point RS2 */
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sprintf (buf+strlen (buf), "%s",
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riscv_fpr_names[EXTRACT_OPERAND (CRS2, l)]);
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break;
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case 'D': /* floating-point RS2 x8-x15 */
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sprintf (buf+strlen (buf), "%s",
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riscv_fpr_names[EXTRACT_OPERAND (CRS2S, l) + 8]);
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break;
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}
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break;
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case ',':
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sprintf (buf+strlen (buf), "%c ", *d);
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break;
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case '(':
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case ')':
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case '[':
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case ']':
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sprintf (buf+strlen (buf), "%c", *d);
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break;
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case '0':
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/* Only print constant 0 if it is the last argument */
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if (!d[1]) {
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sprintf (buf+strlen (buf), "0");
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}
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break;
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case 'b':
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case 's':
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sprintf (buf+strlen (buf), "%s", riscv_gpr_names[rs1]);
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break;
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case 't':
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sprintf (buf+strlen (buf), "%s",
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riscv_gpr_names[EXTRACT_OPERAND (RS2, l)]);
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break;
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case 'u':
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sprintf (buf+strlen (buf), "0x%x",
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(unsigned) EXTRACT_UTYPE_IMM (l) >> RISCV_IMM_BITS);
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break;
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case 'm':
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arg_p (buf, EXTRACT_OPERAND (RM, l),
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riscv_rm, ARRAY_SIZE (riscv_rm));
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break;
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case 'P':
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arg_p (buf, EXTRACT_OPERAND (PRED, l),
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riscv_pred_succ, ARRAY_SIZE (riscv_pred_succ));
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break;
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case 'Q':
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arg_p (buf, EXTRACT_OPERAND (SUCC, l),
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riscv_pred_succ, ARRAY_SIZE (riscv_pred_succ));
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break;
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case 'o':
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case 'j':
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sprintf (buf+strlen (buf), "%d", (int) EXTRACT_ITYPE_IMM (l));
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break;
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case 'q':
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sprintf (buf+strlen (buf), "%d", (int) EXTRACT_STYPE_IMM (l));
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break;
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case 'a':
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target = EXTRACT_UJTYPE_IMM (l) + pc;
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sprintf (buf+strlen (buf), "0x%"PFMT64x, (ut64)target);
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break;
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case 'p':
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target = EXTRACT_SBTYPE_IMM (l) + pc;
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sprintf (buf+strlen (buf), "0x%"PFMT64x, (ut64)target);
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break;
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case 'd':
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sprintf (buf+strlen (buf), "%s", riscv_gpr_names[rd]);
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break;
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case 'z':
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sprintf (buf+strlen (buf), "%s", riscv_gpr_names[0]);
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break;
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case '>':
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sprintf (buf+strlen (buf), "0x%x", (int) EXTRACT_OPERAND (SHAMT, l));
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break;
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case '<':
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sprintf (buf+strlen (buf), "0x%x", (int) EXTRACT_OPERAND (SHAMTW, l));
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break;
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case 'S':
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case 'U':
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sprintf (buf+strlen (buf), "%s", riscv_fpr_names[rs1]);
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break;
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case 'T':
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sprintf (buf+strlen (buf), "%s", riscv_fpr_names[EXTRACT_OPERAND (RS2, l)]);
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break;
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case 'D':
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sprintf (buf+strlen (buf), "%s", riscv_fpr_names[rd]);
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break;
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case 'R':
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sprintf (buf+strlen (buf), "%s", riscv_fpr_names[EXTRACT_OPERAND (RS3, l)]);
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break;
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case 'E':
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{
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const char* csr_name = NULL;
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unsigned int csr = EXTRACT_OPERAND (CSR, l);
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switch (csr)
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{
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#define DECLARE_CSR(name, num) case num: csr_name = #name; break;
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#include "riscv-opc.h"
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#undef DECLARE_CSR
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}
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if (csr_name) {
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sprintf (buf+strlen (buf), "%s", csr_name);
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} else {
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sprintf (buf+strlen (buf), "0x%x", csr);
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}
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break;
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}
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case 'Z':
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sprintf (buf+strlen (buf), "%d", rs1);
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break;
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default:
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/* xgettext:c-format */
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sprintf (buf+strlen (buf), "# internal error, undefined modifier (%c)",
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*d);
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return;
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}
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}
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}
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static struct riscv_opcode *get_opcode (insn_t word) {
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struct riscv_opcode *op;
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static const struct riscv_opcode *riscv_hash[OP_MASK_OP + 1] = {0};
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#define OP_HASH_IDX(i) ((i) & (riscv_insn_length (i) == 2 ? 0x3 : OP_MASK_OP))
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if (!init) {
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for (op=riscv_opcodes; op < &riscv_opcodes[NUMOPCODES]; op++) {
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if (!riscv_hash[OP_HASH_IDX (op->match)]) {
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riscv_hash[OP_HASH_IDX (op->match)] = op;
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}
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}
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init = 1;
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}
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return (struct riscv_opcode *)riscv_hash[OP_HASH_IDX (word)];
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}
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static int
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riscv_disassemble(RAsm *a, RAsmOp *rop, insn_t word, int xlen) {
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const bool no_alias = false;
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const struct riscv_opcode *op = get_opcode (word);
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if (!op) {
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return -1;
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}
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for(; op < &riscv_opcodes[NUMOPCODES]; op++) {
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if ( !(op->match_func)(op, word) ) {
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continue;
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}
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if (no_alias && (op->pinfo & INSN_ALIAS)) {
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continue;
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}
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if (isdigit ((ut8)op->subset[0]) && atoi(op->subset) != xlen ) {
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continue;
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}
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if (op->name && op->args) {
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snprintf (rop->buf_asm, sizeof (rop->buf_asm), "%s", op->name);
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get_insn_args (rop->buf_asm, op->args, word, a->pc);
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return 0;
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} else {
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sprintf (rop->buf_asm, "invalid word(%"PFMT64x")", (ut64)word);
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return -1;
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}
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}
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return 0;
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}
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static int
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riscv_dis(RAsm *a, RAsmOp *rop, const ut8 *buf, ut64 len) {
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insn_t insn;
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if (len < 4) {
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return -1;
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}
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memcpy (&insn, buf, 4);
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riscv_disassemble (a, rop, insn, a->bits);
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return riscv_insn_length(insn);
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}
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