mirror of
https://github.com/radareorg/radare2.git
synced 2024-12-28 16:53:36 +00:00
119 lines
3.0 KiB
Plaintext
119 lines
3.0 KiB
Plaintext
abs_s=absolute value
|
|
abs=absolute value
|
|
abss=absolute and saturate
|
|
abssw=absolute and saturate of word
|
|
adc=add with carry
|
|
add_s=add
|
|
add=add
|
|
add1_s=add with left shift by 1 bits
|
|
add1=add with left shift by 1 bit
|
|
add2_s=add with left shift by 2 bits
|
|
add2=add with left shift by 2 bits
|
|
add3_s=add with left shift by 3 bits
|
|
add3=add with left shift by 3 bits
|
|
adds=add and saturate
|
|
addsdw=add and saturate dual word
|
|
and_s=logical and
|
|
and=logical and
|
|
asl_s=arithmetic shift left
|
|
asl=arithmetic shift left
|
|
asls=arithmetic shift left and saturate
|
|
asr_s=arithmetic shift right
|
|
asr=arithmetic shift right
|
|
asrs=arithmetic shift right and saturate
|
|
bbit0=branch if bit cleared to 0
|
|
bbit1=branch if bit set to 1
|
|
bcc_s=branch if condition true
|
|
bcc=branch if condition true
|
|
bclr_s=clear specified bit (to 0)
|
|
bclr=clear specified bit (to 0)
|
|
bic_s=bit-wise inverted and
|
|
bic=bit-wise inverted and
|
|
bl_s=branch and link
|
|
blcc=branch and link
|
|
bmsk_s=bit mask
|
|
bmsk=bit mask
|
|
brcc_s=branch on compare
|
|
brcc=branch on compare
|
|
brk_s=break (halt) processor
|
|
brk=break (halt) processor
|
|
bset_s=set specified bit (to 1)
|
|
bset=set specified bit (to 1)
|
|
btst_s=test value of specified bit
|
|
btst=test value of specified bit
|
|
bxor=bit xor
|
|
cmp_s=compare
|
|
cmp=compare
|
|
divaw=division assist
|
|
ex=atomic exchange
|
|
ext_s=unsigned extend
|
|
ext=unsigned extend
|
|
flag=write to status register
|
|
jcc_s=jump
|
|
jcc=jump
|
|
jl_s=jump and link
|
|
jlcc=jump and link
|
|
ld_s=load from memory
|
|
ld=load from memory
|
|
lpcc=loop (zero-overhead loops)
|
|
lr=load from auxiliary memory
|
|
lsr_s=logical shift right
|
|
lsr=logical shift left
|
|
max=return maximum
|
|
min=return minimum
|
|
mov_s=move (copy) to register
|
|
mov=move (copy) to register
|
|
mpy=32 x 32 signed multiply (low)
|
|
mpyh=32 x 32 signed multiply (high)
|
|
mpyhu=32 x 32 unsigned multiply (high)
|
|
mpyu=32 x 32 unsigned multiply (low)
|
|
mul64_s=32 x 32 multiply
|
|
mul64=32 x 32 signed multiply
|
|
mulu64=32 x 32 unsigned multiply
|
|
neg_s=negate
|
|
neg=negate
|
|
negs=negate and saturate
|
|
negsw=negate and saturate of word
|
|
nop_s=no operation
|
|
norm=normalize to 32 bits
|
|
normw=normalize to 16 bits
|
|
not_s=logical bit inversion
|
|
not=logical bit inversion
|
|
or_s=logical or
|
|
or=logical or
|
|
pop_s=restore register value from stack
|
|
prefetch=prefetch from memory
|
|
push_s=store register value on stack
|
|
rcmp=reverse compare
|
|
rlc=rotate left through carry
|
|
rnd16=round to word
|
|
ror=rotate right
|
|
rrc=rotate right through carry
|
|
rsub=reverse subtraction
|
|
rtie=return from interrupt/exception
|
|
sat16=saturate to word
|
|
sbc=subtract with carry
|
|
sex_s=signed extend
|
|
sex=signed extend
|
|
sleep=put processor in sleep mode
|
|
sr=store to auxiliary memory
|
|
st_s=store to memory
|
|
st=store to memory
|
|
sub_s=subtract
|
|
sub=subtract
|
|
sub1=subtract with left shift by 1 bit
|
|
sub2=subtract with left shift by 2 bits
|
|
sub3=subtract with left shift by 3 bits
|
|
subs=subtract and saturate
|
|
subsdw=subtract and saturate dual word
|
|
swap=swap 16 x 16
|
|
swi=software interrupt
|
|
sync=synchronize
|
|
trap_s=raise exception
|
|
trap0=raise exception with param. 0
|
|
tst_s=test
|
|
tst=test
|
|
unimp_s=unimplemented instruction
|
|
xor_s=logical exclusive-or
|
|
xor=logical exclusive-or
|