radare2/libr/asm/arch
StefanBruens 9d92c2d2f0 Consolidate thumb BL and BLX, simplify, bugfix (#9391)
Encoding for BL and BLX with immediate offset is identical, only
difference is the opcode in the second half of the instruction pair.

Use r_num_math instead of getnum, as the latter does not work correctly
for large arguments (>= 0x80000000).

Simplify logic for 16 bit aligned origin addresses. In case the origin
is not 32 bit aligned copy bit[1] to the target address (which is masked
by the decoder) and calculate the offset based on the modified address.

Using the same implementaton also fixes the missing offset handling in BL.

Fix for #9319
2018-02-14 15:08:00 -06:00
..
6502 SNES: (kinda) handle X and M flags (#7095) 2017-03-23 12:53:14 +01:00
8051 Fix non-null terminated string issue in 8051 disassembler 2018-01-04 18:39:17 +01:00
arc/gnu MSVC compile correctly (WIP) 2017-05-13 00:42:00 +02:00
arm Consolidate thumb BL and BLX, simplify, bugfix (#9391) 2018-02-14 15:08:00 -06:00
avr MSVC compile correctly (WIP) 2017-05-13 00:42:00 +02:00
cr16 Add changes to compile more plugins with MSVC 2017-05-17 23:42:22 +02:00
cris/gnu Fix some meamleaks (#6156) 2016-11-09 02:28:14 +01:00
dalvik Add DEX38 support 2017-08-01 05:00:48 +02:00
dcpu16 More fixes from osx-ppc 2016-04-27 11:27:22 +02:00
ebc Add changes to compile more plugins with MSVC 2017-05-17 23:42:22 +02:00
gb Fix #3286 - Use stdbool.h 2016-07-12 22:15:19 +02:00
h8300 Add changes to compile more plugins with MSVC 2017-05-17 23:42:22 +02:00
hexagon Fix hexagon duplexes recognition 2018-02-06 12:51:53 +08:00
hppa/gnu Typos fixed (#7970) 2017-07-20 10:44:43 +02:00
i4004 Fix i4004dis scr -> src opcode 2016-01-26 15:10:39 +01:00
i8080 Fix static build. Generate single libr.a 2013-01-04 14:38:07 +01:00
include update incorrect FSF addresses 2017-08-15 22:28:30 -07:00
lanai Fix #8139 - Fix null deref in format string in the LANAI disassembler 2017-08-07 12:02:50 +02:00
lh5801 Get rid of _Bool 2015-12-01 12:39:12 +01:00
lm32 add lm32 disassembly support 2015-09-20 23:58:12 +02:00
mcs96 add mcs96-disassembler (needs a lots of love) 2015-09-16 00:45:01 +00:00
mips Add move, bal, bgezal, and bltzal mips instructions (#8090) 2017-08-01 18:17:33 +02:00
msp430 Add changes to compile more plugins with MSVC 2017-05-17 23:42:22 +02:00
nios/gnu add more fixes to msvc build (#7468) 2017-05-10 22:12:49 +02:00
pic Add PIC Baseline ASM Plugin 2018-01-02 18:18:42 +01:00
ppc merged fixes from contributor to libvle (#9380) 2018-02-12 16:09:19 +01:00
propeller WIP - Totally remove host endianness dependence 2016-05-04 23:42:17 +10:00
riscv Fix riscv again :( 2017-09-17 23:14:34 +02:00
rsp Add basic support for N64 RSP processor. (#5269) 2016-07-03 22:03:26 +02:00
sh/gnu sh: fix disassembly of branch opcodes (#9238) 2018-01-25 16:25:00 +01:00
snes SNES: (kinda) handle X and M flags (#7095) 2017-03-23 12:53:14 +01:00
sparc/gnu add more fixes to msvc build (#7468) 2017-05-10 22:12:49 +02:00
spc700 add spc700-disassembler 2014-06-16 01:14:52 +02:00
tms320 Add changes to compile more plugins with MSVC 2017-05-17 23:42:22 +02:00
tricore update incorrect FSF addresses 2017-08-15 22:28:30 -07:00
v810 Add changes to compile more plugins with MSVC 2017-05-17 23:42:22 +02:00
v850 16 more bugs fixed. most are mem leaks. (#8307) 2017-08-24 17:20:39 +02:00
vax Fix #5633 - Change x == NULL to correct syntax 2016-09-19 14:44:47 +02:00
wasm WASM analysis - initial stub (#9091) 2017-12-29 19:56:33 +01:00
whitespace Fix for the whitespace disassembler 2017-08-26 12:56:14 +02:00
xap Improved MSVC support (WIP) 2017-05-09 14:25:57 +02:00
xtensa/gnu MSVC compile correctly (WIP) 2017-05-13 00:42:00 +02:00
z80 Merging all cov fixes (#8377) 2017-08-29 13:15:47 +02:00